saa9730.c 31 KB

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  1. /*
  2. * Copyright (C) 2000, 2005 MIPS Technologies, Inc. All rights reserved.
  3. * Authors: Carsten Langgaard <carstenl@mips.com>
  4. * Maciej W. Rozycki <macro@mips.com>
  5. * Copyright (C) 2004 Ralf Baechle <ralf@linux-mips.org>
  6. *
  7. * This program is free software; you can distribute it and/or modify it
  8. * under the terms of the GNU General Public License (Version 2) as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  14. * for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  19. *
  20. * SAA9730 ethernet driver.
  21. *
  22. * Changes:
  23. * Angelo Dell'Aera <buffer@antifork.org> : Conversion to the new PCI API
  24. * (pci_driver).
  25. * Conversion to spinlocks.
  26. * Error handling fixes.
  27. */
  28. #include <linux/init.h>
  29. #include <linux/netdevice.h>
  30. #include <linux/delay.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/module.h>
  33. #include <linux/skbuff.h>
  34. #include <linux/pci.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/types.h>
  37. #include <asm/addrspace.h>
  38. #include <asm/io.h>
  39. #include <asm/mips-boards/prom.h>
  40. #include "saa9730.h"
  41. #ifdef LAN_SAA9730_DEBUG
  42. int lan_saa9730_debug = LAN_SAA9730_DEBUG;
  43. #else
  44. int lan_saa9730_debug;
  45. #endif
  46. #define DRV_MODULE_NAME "saa9730"
  47. static struct pci_device_id saa9730_pci_tbl[] = {
  48. { PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
  49. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
  50. { 0, }
  51. };
  52. MODULE_DEVICE_TABLE(pci, saa9730_pci_tbl);
  53. /* Non-zero only if the current card is a PCI with BIOS-set IRQ. */
  54. static unsigned int pci_irq_line;
  55. static void evm_saa9730_enable_lan_int(struct lan_saa9730_private *lp)
  56. {
  57. writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT,
  58. &lp->evm_saa9730_regs->InterruptBlock1);
  59. writel(readl(&lp->evm_saa9730_regs->InterruptStatus1) | EVM_LAN_INT,
  60. &lp->evm_saa9730_regs->InterruptStatus1);
  61. writel(readl(&lp->evm_saa9730_regs->InterruptEnable1) | EVM_LAN_INT |
  62. EVM_MASTER_EN, &lp->evm_saa9730_regs->InterruptEnable1);
  63. }
  64. static void evm_saa9730_disable_lan_int(struct lan_saa9730_private *lp)
  65. {
  66. writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT,
  67. &lp->evm_saa9730_regs->InterruptBlock1);
  68. writel(readl(&lp->evm_saa9730_regs->InterruptEnable1) & ~EVM_LAN_INT,
  69. &lp->evm_saa9730_regs->InterruptEnable1);
  70. }
  71. static void evm_saa9730_clear_lan_int(struct lan_saa9730_private *lp)
  72. {
  73. writel(EVM_LAN_INT, &lp->evm_saa9730_regs->InterruptStatus1);
  74. }
  75. static void evm_saa9730_block_lan_int(struct lan_saa9730_private *lp)
  76. {
  77. writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT,
  78. &lp->evm_saa9730_regs->InterruptBlock1);
  79. }
  80. static void evm_saa9730_unblock_lan_int(struct lan_saa9730_private *lp)
  81. {
  82. writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT,
  83. &lp->evm_saa9730_regs->InterruptBlock1);
  84. }
  85. static void __attribute_used__ show_saa9730_regs(struct lan_saa9730_private *lp)
  86. {
  87. int i, j;
  88. printk("TxmBufferA = %p\n", lp->TxmBuffer[0][0]);
  89. printk("TxmBufferB = %p\n", lp->TxmBuffer[1][0]);
  90. printk("RcvBufferA = %p\n", lp->RcvBuffer[0][0]);
  91. printk("RcvBufferB = %p\n", lp->RcvBuffer[1][0]);
  92. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  93. for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
  94. printk("TxmBuffer[%d][%d] = %x\n", i, j,
  95. le32_to_cpu(*(unsigned int *)
  96. lp->TxmBuffer[i][j]));
  97. }
  98. }
  99. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  100. for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
  101. printk("RcvBuffer[%d][%d] = %x\n", i, j,
  102. le32_to_cpu(*(unsigned int *)
  103. lp->RcvBuffer[i][j]));
  104. }
  105. }
  106. printk("lp->evm_saa9730_regs->InterruptBlock1 = %x\n",
  107. readl(&lp->evm_saa9730_regs->InterruptBlock1));
  108. printk("lp->evm_saa9730_regs->InterruptStatus1 = %x\n",
  109. readl(&lp->evm_saa9730_regs->InterruptStatus1));
  110. printk("lp->evm_saa9730_regs->InterruptEnable1 = %x\n",
  111. readl(&lp->evm_saa9730_regs->InterruptEnable1));
  112. printk("lp->lan_saa9730_regs->Ok2Use = %x\n",
  113. readl(&lp->lan_saa9730_regs->Ok2Use));
  114. printk("lp->NextTxmBufferIndex = %x\n", lp->NextTxmBufferIndex);
  115. printk("lp->NextTxmPacketIndex = %x\n", lp->NextTxmPacketIndex);
  116. printk("lp->PendingTxmBufferIndex = %x\n",
  117. lp->PendingTxmBufferIndex);
  118. printk("lp->PendingTxmPacketIndex = %x\n",
  119. lp->PendingTxmPacketIndex);
  120. printk("lp->lan_saa9730_regs->LanDmaCtl = %x\n",
  121. readl(&lp->lan_saa9730_regs->LanDmaCtl));
  122. printk("lp->lan_saa9730_regs->DmaStatus = %x\n",
  123. readl(&lp->lan_saa9730_regs->DmaStatus));
  124. printk("lp->lan_saa9730_regs->CamCtl = %x\n",
  125. readl(&lp->lan_saa9730_regs->CamCtl));
  126. printk("lp->lan_saa9730_regs->TxCtl = %x\n",
  127. readl(&lp->lan_saa9730_regs->TxCtl));
  128. printk("lp->lan_saa9730_regs->TxStatus = %x\n",
  129. readl(&lp->lan_saa9730_regs->TxStatus));
  130. printk("lp->lan_saa9730_regs->RxCtl = %x\n",
  131. readl(&lp->lan_saa9730_regs->RxCtl));
  132. printk("lp->lan_saa9730_regs->RxStatus = %x\n",
  133. readl(&lp->lan_saa9730_regs->RxStatus));
  134. for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) {
  135. writel(i, &lp->lan_saa9730_regs->CamAddress);
  136. printk("lp->lan_saa9730_regs->CamData = %x\n",
  137. readl(&lp->lan_saa9730_regs->CamData));
  138. }
  139. printk("lp->stats.tx_packets = %lx\n", lp->stats.tx_packets);
  140. printk("lp->stats.tx_errors = %lx\n", lp->stats.tx_errors);
  141. printk("lp->stats.tx_aborted_errors = %lx\n",
  142. lp->stats.tx_aborted_errors);
  143. printk("lp->stats.tx_window_errors = %lx\n",
  144. lp->stats.tx_window_errors);
  145. printk("lp->stats.tx_carrier_errors = %lx\n",
  146. lp->stats.tx_carrier_errors);
  147. printk("lp->stats.tx_fifo_errors = %lx\n",
  148. lp->stats.tx_fifo_errors);
  149. printk("lp->stats.tx_heartbeat_errors = %lx\n",
  150. lp->stats.tx_heartbeat_errors);
  151. printk("lp->stats.collisions = %lx\n", lp->stats.collisions);
  152. printk("lp->stats.rx_packets = %lx\n", lp->stats.rx_packets);
  153. printk("lp->stats.rx_errors = %lx\n", lp->stats.rx_errors);
  154. printk("lp->stats.rx_dropped = %lx\n", lp->stats.rx_dropped);
  155. printk("lp->stats.rx_crc_errors = %lx\n", lp->stats.rx_crc_errors);
  156. printk("lp->stats.rx_frame_errors = %lx\n",
  157. lp->stats.rx_frame_errors);
  158. printk("lp->stats.rx_fifo_errors = %lx\n",
  159. lp->stats.rx_fifo_errors);
  160. printk("lp->stats.rx_length_errors = %lx\n",
  161. lp->stats.rx_length_errors);
  162. printk("lp->lan_saa9730_regs->DebugPCIMasterAddr = %x\n",
  163. readl(&lp->lan_saa9730_regs->DebugPCIMasterAddr));
  164. printk("lp->lan_saa9730_regs->DebugLanTxStateMachine = %x\n",
  165. readl(&lp->lan_saa9730_regs->DebugLanTxStateMachine));
  166. printk("lp->lan_saa9730_regs->DebugLanRxStateMachine = %x\n",
  167. readl(&lp->lan_saa9730_regs->DebugLanRxStateMachine));
  168. printk("lp->lan_saa9730_regs->DebugLanTxFifoPointers = %x\n",
  169. readl(&lp->lan_saa9730_regs->DebugLanTxFifoPointers));
  170. printk("lp->lan_saa9730_regs->DebugLanRxFifoPointers = %x\n",
  171. readl(&lp->lan_saa9730_regs->DebugLanRxFifoPointers));
  172. printk("lp->lan_saa9730_regs->DebugLanCtlStateMachine = %x\n",
  173. readl(&lp->lan_saa9730_regs->DebugLanCtlStateMachine));
  174. }
  175. static void lan_saa9730_buffer_init(struct lan_saa9730_private *lp)
  176. {
  177. int i, j;
  178. /* Init RX buffers */
  179. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  180. for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
  181. *(unsigned int *) lp->RcvBuffer[i][j] =
  182. cpu_to_le32(RXSF_READY <<
  183. RX_STAT_CTL_OWNER_SHF);
  184. }
  185. }
  186. /* Init TX buffers */
  187. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  188. for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
  189. *(unsigned int *) lp->TxmBuffer[i][j] =
  190. cpu_to_le32(TXSF_EMPTY <<
  191. TX_STAT_CTL_OWNER_SHF);
  192. }
  193. }
  194. }
  195. static void lan_saa9730_free_buffers(struct pci_dev *pdev,
  196. struct lan_saa9730_private *lp)
  197. {
  198. pci_free_consistent(pdev, lp->buffer_size, lp->buffer_start,
  199. lp->dma_addr);
  200. }
  201. static int lan_saa9730_allocate_buffers(struct pci_dev *pdev,
  202. struct lan_saa9730_private *lp)
  203. {
  204. void *Pa;
  205. unsigned int i, j, rxoffset, txoffset;
  206. int ret;
  207. /* Initialize buffer space */
  208. lp->DmaRcvPackets = LAN_SAA9730_RCV_Q_SIZE;
  209. lp->DmaTxmPackets = LAN_SAA9730_TXM_Q_SIZE;
  210. /* Initialize Rx Buffer Index */
  211. lp->NextRcvPacketIndex = 0;
  212. lp->NextRcvBufferIndex = 0;
  213. /* Set current buffer index & next available packet index */
  214. lp->NextTxmPacketIndex = 0;
  215. lp->NextTxmBufferIndex = 0;
  216. lp->PendingTxmPacketIndex = 0;
  217. lp->PendingTxmBufferIndex = 0;
  218. /*
  219. * Allocate all RX and TX packets in one chunk.
  220. * The Rx and Tx packets must be PACKET_SIZE aligned.
  221. */
  222. lp->buffer_size = ((LAN_SAA9730_RCV_Q_SIZE + LAN_SAA9730_TXM_Q_SIZE) *
  223. LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_BUFFERS) +
  224. LAN_SAA9730_PACKET_SIZE;
  225. lp->buffer_start = pci_alloc_consistent(pdev, lp->buffer_size,
  226. &lp->dma_addr);
  227. if (!lp->buffer_start) {
  228. ret = -ENOMEM;
  229. goto out;
  230. }
  231. Pa = (void *)ALIGN((unsigned long)lp->buffer_start,
  232. LAN_SAA9730_PACKET_SIZE);
  233. rxoffset = Pa - lp->buffer_start;
  234. /* Init RX buffers */
  235. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  236. for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
  237. *(unsigned int *) Pa =
  238. cpu_to_le32(RXSF_READY <<
  239. RX_STAT_CTL_OWNER_SHF);
  240. lp->RcvBuffer[i][j] = Pa;
  241. Pa += LAN_SAA9730_PACKET_SIZE;
  242. }
  243. }
  244. txoffset = Pa - lp->buffer_start;
  245. /* Init TX buffers */
  246. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  247. for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
  248. *(unsigned int *) Pa =
  249. cpu_to_le32(TXSF_EMPTY <<
  250. TX_STAT_CTL_OWNER_SHF);
  251. lp->TxmBuffer[i][j] = Pa;
  252. Pa += LAN_SAA9730_PACKET_SIZE;
  253. }
  254. }
  255. /*
  256. * Set rx buffer A and rx buffer B to point to the first two buffer
  257. * spaces.
  258. */
  259. writel(lp->dma_addr + rxoffset, &lp->lan_saa9730_regs->RxBuffA);
  260. writel(lp->dma_addr + rxoffset +
  261. LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_RCV_Q_SIZE,
  262. &lp->lan_saa9730_regs->RxBuffB);
  263. /*
  264. * Set txm_buf_a and txm_buf_b to point to the first two buffer
  265. * space
  266. */
  267. writel(lp->dma_addr + txoffset,
  268. &lp->lan_saa9730_regs->TxBuffA);
  269. writel(lp->dma_addr + txoffset +
  270. LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_TXM_Q_SIZE,
  271. &lp->lan_saa9730_regs->TxBuffB);
  272. /* Set packet number */
  273. writel((lp->DmaRcvPackets << PK_COUNT_RX_A_SHF) |
  274. (lp->DmaRcvPackets << PK_COUNT_RX_B_SHF) |
  275. (lp->DmaTxmPackets << PK_COUNT_TX_A_SHF) |
  276. (lp->DmaTxmPackets << PK_COUNT_TX_B_SHF),
  277. &lp->lan_saa9730_regs->PacketCount);
  278. return 0;
  279. out:
  280. return ret;
  281. }
  282. static int lan_saa9730_cam_load(struct lan_saa9730_private *lp)
  283. {
  284. unsigned int i;
  285. unsigned char *NetworkAddress;
  286. NetworkAddress = (unsigned char *) &lp->PhysicalAddress[0][0];
  287. for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) {
  288. /* First set address to where data is written */
  289. writel(i, &lp->lan_saa9730_regs->CamAddress);
  290. writel((NetworkAddress[0] << 24) | (NetworkAddress[1] << 16) |
  291. (NetworkAddress[2] << 8) | NetworkAddress[3],
  292. &lp->lan_saa9730_regs->CamData);
  293. NetworkAddress += 4;
  294. }
  295. return 0;
  296. }
  297. static int lan_saa9730_cam_init(struct net_device *dev)
  298. {
  299. struct lan_saa9730_private *lp = netdev_priv(dev);
  300. unsigned int i;
  301. /* Copy MAC-address into all entries. */
  302. for (i = 0; i < LAN_SAA9730_CAM_ENTRIES; i++) {
  303. memcpy((unsigned char *) lp->PhysicalAddress[i],
  304. (unsigned char *) dev->dev_addr, 6);
  305. }
  306. return 0;
  307. }
  308. static int lan_saa9730_mii_init(struct lan_saa9730_private *lp)
  309. {
  310. int i, l;
  311. /* Check link status, spin here till station is not busy. */
  312. i = 0;
  313. while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) & MD_CA_BUSY) {
  314. i++;
  315. if (i > 100) {
  316. printk("Error: lan_saa9730_mii_init: timeout\n");
  317. return -1;
  318. }
  319. mdelay(1); /* wait 1 ms. */
  320. }
  321. /* Now set the control and address register. */
  322. writel(MD_CA_BUSY | PHY_STATUS | PHY_ADDRESS << MD_CA_PHY_SHF,
  323. &lp->lan_saa9730_regs->StationMgmtCtl);
  324. /* check link status, spin here till station is not busy */
  325. i = 0;
  326. while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) & MD_CA_BUSY) {
  327. i++;
  328. if (i > 100) {
  329. printk("Error: lan_saa9730_mii_init: timeout\n");
  330. return -1;
  331. }
  332. mdelay(1); /* wait 1 ms. */
  333. }
  334. /* Wait for 1 ms. */
  335. mdelay(1);
  336. /* Check the link status. */
  337. if (readl(&lp->lan_saa9730_regs->StationMgmtData) &
  338. PHY_STATUS_LINK_UP) {
  339. /* Link is up. */
  340. return 0;
  341. } else {
  342. /* Link is down, reset the PHY first. */
  343. /* set PHY address = 'CONTROL' */
  344. writel(PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR | PHY_CONTROL,
  345. &lp->lan_saa9730_regs->StationMgmtCtl);
  346. /* Wait for 1 ms. */
  347. mdelay(1);
  348. /* set 'CONTROL' = force reset and renegotiate */
  349. writel(PHY_CONTROL_RESET | PHY_CONTROL_AUTO_NEG |
  350. PHY_CONTROL_RESTART_AUTO_NEG,
  351. &lp->lan_saa9730_regs->StationMgmtData);
  352. /* Wait for 50 ms. */
  353. mdelay(50);
  354. /* set 'BUSY' to start operation */
  355. writel(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR |
  356. PHY_CONTROL, &lp->lan_saa9730_regs->StationMgmtCtl);
  357. /* await completion */
  358. i = 0;
  359. while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) &
  360. MD_CA_BUSY) {
  361. i++;
  362. if (i > 100) {
  363. printk
  364. ("Error: lan_saa9730_mii_init: timeout\n");
  365. return -1;
  366. }
  367. mdelay(1); /* wait 1 ms. */
  368. }
  369. /* Wait for 1 ms. */
  370. mdelay(1);
  371. for (l = 0; l < 2; l++) {
  372. /* set PHY address = 'STATUS' */
  373. writel(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF |
  374. PHY_STATUS,
  375. &lp->lan_saa9730_regs->StationMgmtCtl);
  376. /* await completion */
  377. i = 0;
  378. while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) &
  379. MD_CA_BUSY) {
  380. i++;
  381. if (i > 100) {
  382. printk
  383. ("Error: lan_saa9730_mii_init: timeout\n");
  384. return -1;
  385. }
  386. mdelay(1); /* wait 1 ms. */
  387. }
  388. /* wait for 3 sec. */
  389. mdelay(3000);
  390. /* check the link status */
  391. if (readl(&lp->lan_saa9730_regs->StationMgmtData) &
  392. PHY_STATUS_LINK_UP) {
  393. /* link is up */
  394. break;
  395. }
  396. }
  397. }
  398. return 0;
  399. }
  400. static int lan_saa9730_control_init(struct lan_saa9730_private *lp)
  401. {
  402. /* Initialize DMA control register. */
  403. writel((LANMB_ANY << DMA_CTL_MAX_XFER_SHF) |
  404. (LANEND_LITTLE << DMA_CTL_ENDIAN_SHF) |
  405. (LAN_SAA9730_RCV_Q_INT_THRESHOLD << DMA_CTL_RX_INT_COUNT_SHF)
  406. | DMA_CTL_RX_INT_TO_EN | DMA_CTL_RX_INT_EN |
  407. DMA_CTL_MAC_RX_INT_EN | DMA_CTL_MAC_TX_INT_EN,
  408. &lp->lan_saa9730_regs->LanDmaCtl);
  409. /* Initial MAC control register. */
  410. writel((MACCM_MII << MAC_CONTROL_CONN_SHF) | MAC_CONTROL_FULL_DUP,
  411. &lp->lan_saa9730_regs->MacCtl);
  412. /* Initialize CAM control register. */
  413. writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_BROAD_ACC,
  414. &lp->lan_saa9730_regs->CamCtl);
  415. /*
  416. * Initialize CAM enable register, only turn on first entry, should
  417. * contain own addr.
  418. */
  419. writel(0x0001, &lp->lan_saa9730_regs->CamEnable);
  420. /* Initialize Tx control register */
  421. writel(TX_CTL_EN_COMP, &lp->lan_saa9730_regs->TxCtl);
  422. /* Initialize Rcv control register */
  423. writel(RX_CTL_STRIP_CRC, &lp->lan_saa9730_regs->RxCtl);
  424. /* Reset DMA engine */
  425. writel(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest);
  426. return 0;
  427. }
  428. static int lan_saa9730_stop(struct lan_saa9730_private *lp)
  429. {
  430. int i;
  431. /* Stop DMA first */
  432. writel(readl(&lp->lan_saa9730_regs->LanDmaCtl) &
  433. ~(DMA_CTL_EN_TX_DMA | DMA_CTL_EN_RX_DMA),
  434. &lp->lan_saa9730_regs->LanDmaCtl);
  435. /* Set the SW Reset bits in DMA and MAC control registers */
  436. writel(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest);
  437. writel(readl(&lp->lan_saa9730_regs->MacCtl) | MAC_CONTROL_RESET,
  438. &lp->lan_saa9730_regs->MacCtl);
  439. /*
  440. * Wait for MAC reset to have finished. The reset bit is auto cleared
  441. * when the reset is done.
  442. */
  443. i = 0;
  444. while (readl(&lp->lan_saa9730_regs->MacCtl) & MAC_CONTROL_RESET) {
  445. i++;
  446. if (i > 100) {
  447. printk
  448. ("Error: lan_sa9730_stop: MAC reset timeout\n");
  449. return -1;
  450. }
  451. mdelay(1); /* wait 1 ms. */
  452. }
  453. return 0;
  454. }
  455. static int lan_saa9730_dma_init(struct lan_saa9730_private *lp)
  456. {
  457. /* Stop lan controller. */
  458. lan_saa9730_stop(lp);
  459. writel(LAN_SAA9730_DEFAULT_TIME_OUT_CNT,
  460. &lp->lan_saa9730_regs->Timeout);
  461. return 0;
  462. }
  463. static int lan_saa9730_start(struct lan_saa9730_private *lp)
  464. {
  465. lan_saa9730_buffer_init(lp);
  466. /* Initialize Rx Buffer Index */
  467. lp->NextRcvPacketIndex = 0;
  468. lp->NextRcvBufferIndex = 0;
  469. /* Set current buffer index & next available packet index */
  470. lp->NextTxmPacketIndex = 0;
  471. lp->NextTxmBufferIndex = 0;
  472. lp->PendingTxmPacketIndex = 0;
  473. lp->PendingTxmBufferIndex = 0;
  474. writel(readl(&lp->lan_saa9730_regs->LanDmaCtl) | DMA_CTL_EN_TX_DMA |
  475. DMA_CTL_EN_RX_DMA, &lp->lan_saa9730_regs->LanDmaCtl);
  476. /* For Tx, turn on MAC then DMA */
  477. writel(readl(&lp->lan_saa9730_regs->TxCtl) | TX_CTL_TX_EN,
  478. &lp->lan_saa9730_regs->TxCtl);
  479. /* For Rx, turn on DMA then MAC */
  480. writel(readl(&lp->lan_saa9730_regs->RxCtl) | RX_CTL_RX_EN,
  481. &lp->lan_saa9730_regs->RxCtl);
  482. /* Set Ok2Use to let hardware own the buffers. */
  483. writel(OK2USE_RX_A | OK2USE_RX_B, &lp->lan_saa9730_regs->Ok2Use);
  484. return 0;
  485. }
  486. static int lan_saa9730_restart(struct lan_saa9730_private *lp)
  487. {
  488. lan_saa9730_stop(lp);
  489. lan_saa9730_start(lp);
  490. return 0;
  491. }
  492. static int lan_saa9730_tx(struct net_device *dev)
  493. {
  494. struct lan_saa9730_private *lp = netdev_priv(dev);
  495. unsigned int *pPacket;
  496. unsigned int tx_status;
  497. if (lan_saa9730_debug > 5)
  498. printk("lan_saa9730_tx interrupt\n");
  499. /* Clear interrupt. */
  500. writel(DMA_STATUS_MAC_TX_INT, &lp->lan_saa9730_regs->DmaStatus);
  501. while (1) {
  502. pPacket = lp->TxmBuffer[lp->PendingTxmBufferIndex]
  503. [lp->PendingTxmPacketIndex];
  504. /* Get status of first packet transmitted. */
  505. tx_status = le32_to_cpu(*pPacket);
  506. /* Check ownership. */
  507. if ((tx_status & TX_STAT_CTL_OWNER_MSK) !=
  508. (TXSF_HWDONE << TX_STAT_CTL_OWNER_SHF)) break;
  509. /* Check for error. */
  510. if (tx_status & TX_STAT_CTL_ERROR_MSK) {
  511. if (lan_saa9730_debug > 1)
  512. printk("lan_saa9730_tx: tx error = %x\n",
  513. tx_status);
  514. lp->stats.tx_errors++;
  515. if (tx_status &
  516. (TX_STATUS_EX_COLL << TX_STAT_CTL_STATUS_SHF))
  517. lp->stats.tx_aborted_errors++;
  518. if (tx_status &
  519. (TX_STATUS_LATE_COLL << TX_STAT_CTL_STATUS_SHF))
  520. lp->stats.tx_window_errors++;
  521. if (tx_status &
  522. (TX_STATUS_L_CARR << TX_STAT_CTL_STATUS_SHF))
  523. lp->stats.tx_carrier_errors++;
  524. if (tx_status &
  525. (TX_STATUS_UNDER << TX_STAT_CTL_STATUS_SHF))
  526. lp->stats.tx_fifo_errors++;
  527. if (tx_status &
  528. (TX_STATUS_SQ_ERR << TX_STAT_CTL_STATUS_SHF))
  529. lp->stats.tx_heartbeat_errors++;
  530. lp->stats.collisions +=
  531. tx_status & TX_STATUS_TX_COLL_MSK;
  532. }
  533. /* Free buffer. */
  534. *pPacket =
  535. cpu_to_le32(TXSF_EMPTY << TX_STAT_CTL_OWNER_SHF);
  536. /* Update pending index pointer. */
  537. lp->PendingTxmPacketIndex++;
  538. if (lp->PendingTxmPacketIndex >= LAN_SAA9730_TXM_Q_SIZE) {
  539. lp->PendingTxmPacketIndex = 0;
  540. lp->PendingTxmBufferIndex ^= 1;
  541. }
  542. }
  543. /* The tx buffer is no longer full. */
  544. netif_wake_queue(dev);
  545. return 0;
  546. }
  547. static int lan_saa9730_rx(struct net_device *dev)
  548. {
  549. struct lan_saa9730_private *lp = netdev_priv(dev);
  550. int len = 0;
  551. struct sk_buff *skb = 0;
  552. unsigned int rx_status;
  553. int BufferIndex;
  554. int PacketIndex;
  555. unsigned int *pPacket;
  556. unsigned char *pData;
  557. if (lan_saa9730_debug > 5)
  558. printk("lan_saa9730_rx interrupt\n");
  559. /* Clear receive interrupts. */
  560. writel(DMA_STATUS_MAC_RX_INT | DMA_STATUS_RX_INT |
  561. DMA_STATUS_RX_TO_INT, &lp->lan_saa9730_regs->DmaStatus);
  562. /* Address next packet */
  563. BufferIndex = lp->NextRcvBufferIndex;
  564. PacketIndex = lp->NextRcvPacketIndex;
  565. pPacket = lp->RcvBuffer[BufferIndex][PacketIndex];
  566. rx_status = le32_to_cpu(*pPacket);
  567. /* Process each packet. */
  568. while ((rx_status & RX_STAT_CTL_OWNER_MSK) ==
  569. (RXSF_HWDONE << RX_STAT_CTL_OWNER_SHF)) {
  570. /* Check the rx status. */
  571. if (rx_status & (RX_STATUS_GOOD << RX_STAT_CTL_STATUS_SHF)) {
  572. /* Received packet is good. */
  573. len = (rx_status & RX_STAT_CTL_LENGTH_MSK) >>
  574. RX_STAT_CTL_LENGTH_SHF;
  575. pData = (unsigned char *) pPacket;
  576. pData += 4;
  577. skb = dev_alloc_skb(len + 2);
  578. if (skb == 0) {
  579. printk
  580. ("%s: Memory squeeze, deferring packet.\n",
  581. dev->name);
  582. lp->stats.rx_dropped++;
  583. } else {
  584. lp->stats.rx_bytes += len;
  585. lp->stats.rx_packets++;
  586. skb->dev = dev;
  587. skb_reserve(skb, 2); /* 16 byte align */
  588. skb_put(skb, len); /* make room */
  589. eth_copy_and_sum(skb,
  590. (unsigned char *) pData,
  591. len, 0);
  592. skb->protocol = eth_type_trans(skb, dev);
  593. netif_rx(skb);
  594. dev->last_rx = jiffies;
  595. }
  596. } else {
  597. /* We got an error packet. */
  598. if (lan_saa9730_debug > 2)
  599. printk
  600. ("lan_saa9730_rx: We got an error packet = %x\n",
  601. rx_status);
  602. lp->stats.rx_errors++;
  603. if (rx_status &
  604. (RX_STATUS_CRC_ERR << RX_STAT_CTL_STATUS_SHF))
  605. lp->stats.rx_crc_errors++;
  606. if (rx_status &
  607. (RX_STATUS_ALIGN_ERR << RX_STAT_CTL_STATUS_SHF))
  608. lp->stats.rx_frame_errors++;
  609. if (rx_status &
  610. (RX_STATUS_OVERFLOW << RX_STAT_CTL_STATUS_SHF))
  611. lp->stats.rx_fifo_errors++;
  612. if (rx_status &
  613. (RX_STATUS_LONG_ERR << RX_STAT_CTL_STATUS_SHF))
  614. lp->stats.rx_length_errors++;
  615. }
  616. /* Indicate we have processed the buffer. */
  617. *pPacket = cpu_to_le32(RXSF_READY << RX_STAT_CTL_OWNER_SHF);
  618. /* Make sure A or B is available to hardware as appropriate. */
  619. writel(BufferIndex ? OK2USE_RX_B : OK2USE_RX_A,
  620. &lp->lan_saa9730_regs->Ok2Use);
  621. /* Go to next packet in sequence. */
  622. lp->NextRcvPacketIndex++;
  623. if (lp->NextRcvPacketIndex >= LAN_SAA9730_RCV_Q_SIZE) {
  624. lp->NextRcvPacketIndex = 0;
  625. lp->NextRcvBufferIndex ^= 1;
  626. }
  627. /* Address next packet */
  628. BufferIndex = lp->NextRcvBufferIndex;
  629. PacketIndex = lp->NextRcvPacketIndex;
  630. pPacket = lp->RcvBuffer[BufferIndex][PacketIndex];
  631. rx_status = le32_to_cpu(*pPacket);
  632. }
  633. return 0;
  634. }
  635. static irqreturn_t lan_saa9730_interrupt(const int irq, void *dev_id)
  636. {
  637. struct net_device *dev = dev_id;
  638. struct lan_saa9730_private *lp = netdev_priv(dev);
  639. if (lan_saa9730_debug > 5)
  640. printk("lan_saa9730_interrupt\n");
  641. /* Disable the EVM LAN interrupt. */
  642. evm_saa9730_block_lan_int(lp);
  643. /* Clear the EVM LAN interrupt. */
  644. evm_saa9730_clear_lan_int(lp);
  645. /* Service pending transmit interrupts. */
  646. if (readl(&lp->lan_saa9730_regs->DmaStatus) & DMA_STATUS_MAC_TX_INT)
  647. lan_saa9730_tx(dev);
  648. /* Service pending receive interrupts. */
  649. if (readl(&lp->lan_saa9730_regs->DmaStatus) &
  650. (DMA_STATUS_MAC_RX_INT | DMA_STATUS_RX_INT |
  651. DMA_STATUS_RX_TO_INT)) lan_saa9730_rx(dev);
  652. /* Enable the EVM LAN interrupt. */
  653. evm_saa9730_unblock_lan_int(lp);
  654. return IRQ_HANDLED;
  655. }
  656. static int lan_saa9730_open(struct net_device *dev)
  657. {
  658. struct lan_saa9730_private *lp = netdev_priv(dev);
  659. /* Associate IRQ with lan_saa9730_interrupt */
  660. if (request_irq(dev->irq, &lan_saa9730_interrupt, 0, "SAA9730 Eth",
  661. dev)) {
  662. printk("lan_saa9730_open: Can't get irq %d\n", dev->irq);
  663. return -EAGAIN;
  664. }
  665. /* Enable the Lan interrupt in the event manager. */
  666. evm_saa9730_enable_lan_int(lp);
  667. /* Start the LAN controller */
  668. if (lan_saa9730_start(lp))
  669. return -1;
  670. netif_start_queue(dev);
  671. return 0;
  672. }
  673. static int lan_saa9730_write(struct lan_saa9730_private *lp,
  674. struct sk_buff *skb, int skblen)
  675. {
  676. unsigned char *pbData = skb->data;
  677. unsigned int len = skblen;
  678. unsigned char *pbPacketData;
  679. unsigned int tx_status;
  680. int BufferIndex;
  681. int PacketIndex;
  682. if (lan_saa9730_debug > 5)
  683. printk("lan_saa9730_write: skb=%p\n", skb);
  684. BufferIndex = lp->NextTxmBufferIndex;
  685. PacketIndex = lp->NextTxmPacketIndex;
  686. tx_status = le32_to_cpu(*(unsigned int *)lp->TxmBuffer[BufferIndex]
  687. [PacketIndex]);
  688. if ((tx_status & TX_STAT_CTL_OWNER_MSK) !=
  689. (TXSF_EMPTY << TX_STAT_CTL_OWNER_SHF)) {
  690. if (lan_saa9730_debug > 4)
  691. printk
  692. ("lan_saa9730_write: Tx buffer not available: tx_status = %x\n",
  693. tx_status);
  694. return -1;
  695. }
  696. lp->NextTxmPacketIndex++;
  697. if (lp->NextTxmPacketIndex >= LAN_SAA9730_TXM_Q_SIZE) {
  698. lp->NextTxmPacketIndex = 0;
  699. lp->NextTxmBufferIndex ^= 1;
  700. }
  701. pbPacketData = lp->TxmBuffer[BufferIndex][PacketIndex];
  702. pbPacketData += 4;
  703. /* copy the bits */
  704. memcpy(pbPacketData, pbData, len);
  705. /* Set transmit status for hardware */
  706. *(unsigned int *)lp->TxmBuffer[BufferIndex][PacketIndex] =
  707. cpu_to_le32((TXSF_READY << TX_STAT_CTL_OWNER_SHF) |
  708. (TX_STAT_CTL_INT_AFTER_TX <<
  709. TX_STAT_CTL_FRAME_SHF) |
  710. (len << TX_STAT_CTL_LENGTH_SHF));
  711. /* Make sure A or B is available to hardware as appropriate. */
  712. writel(BufferIndex ? OK2USE_TX_B : OK2USE_TX_A,
  713. &lp->lan_saa9730_regs->Ok2Use);
  714. return 0;
  715. }
  716. static void lan_saa9730_tx_timeout(struct net_device *dev)
  717. {
  718. struct lan_saa9730_private *lp = netdev_priv(dev);
  719. /* Transmitter timeout, serious problems */
  720. lp->stats.tx_errors++;
  721. printk("%s: transmit timed out, reset\n", dev->name);
  722. /*show_saa9730_regs(lp); */
  723. lan_saa9730_restart(lp);
  724. dev->trans_start = jiffies;
  725. netif_wake_queue(dev);
  726. }
  727. static int lan_saa9730_start_xmit(struct sk_buff *skb,
  728. struct net_device *dev)
  729. {
  730. struct lan_saa9730_private *lp = netdev_priv(dev);
  731. unsigned long flags;
  732. int skblen;
  733. int len;
  734. if (lan_saa9730_debug > 4)
  735. printk("Send packet: skb=%p\n", skb);
  736. skblen = skb->len;
  737. spin_lock_irqsave(&lp->lock, flags);
  738. len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
  739. if (lan_saa9730_write(lp, skb, skblen)) {
  740. spin_unlock_irqrestore(&lp->lock, flags);
  741. printk("Error when writing packet to controller: skb=%p\n", skb);
  742. netif_stop_queue(dev);
  743. return -1;
  744. }
  745. lp->stats.tx_bytes += len;
  746. lp->stats.tx_packets++;
  747. dev->trans_start = jiffies;
  748. netif_wake_queue(dev);
  749. dev_kfree_skb(skb);
  750. spin_unlock_irqrestore(&lp->lock, flags);
  751. return 0;
  752. }
  753. static int lan_saa9730_close(struct net_device *dev)
  754. {
  755. struct lan_saa9730_private *lp = netdev_priv(dev);
  756. if (lan_saa9730_debug > 1)
  757. printk("lan_saa9730_close:\n");
  758. netif_stop_queue(dev);
  759. /* Disable the Lan interrupt in the event manager. */
  760. evm_saa9730_disable_lan_int(lp);
  761. /* Stop the controller */
  762. if (lan_saa9730_stop(lp))
  763. return -1;
  764. free_irq(dev->irq, (void *) dev);
  765. return 0;
  766. }
  767. static struct net_device_stats *lan_saa9730_get_stats(struct net_device
  768. *dev)
  769. {
  770. struct lan_saa9730_private *lp = netdev_priv(dev);
  771. return &lp->stats;
  772. }
  773. static void lan_saa9730_set_multicast(struct net_device *dev)
  774. {
  775. struct lan_saa9730_private *lp = netdev_priv(dev);
  776. /* Stop the controller */
  777. lan_saa9730_stop(lp);
  778. if (dev->flags & IFF_PROMISC) {
  779. /* accept all packets */
  780. writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_STATION_ACC |
  781. CAM_CONTROL_GROUP_ACC | CAM_CONTROL_BROAD_ACC,
  782. &lp->lan_saa9730_regs->CamCtl);
  783. } else {
  784. if (dev->flags & IFF_ALLMULTI) {
  785. /* accept all multicast packets */
  786. writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_GROUP_ACC |
  787. CAM_CONTROL_BROAD_ACC,
  788. &lp->lan_saa9730_regs->CamCtl);
  789. } else {
  790. /*
  791. * Will handle the multicast stuff later. -carstenl
  792. */
  793. }
  794. }
  795. lan_saa9730_restart(lp);
  796. }
  797. static void __devexit saa9730_remove_one(struct pci_dev *pdev)
  798. {
  799. struct net_device *dev = pci_get_drvdata(pdev);
  800. struct lan_saa9730_private *lp = netdev_priv(dev);
  801. if (dev) {
  802. unregister_netdev(dev);
  803. lan_saa9730_free_buffers(pdev, lp);
  804. iounmap(lp->lan_saa9730_regs);
  805. iounmap(lp->evm_saa9730_regs);
  806. free_netdev(dev);
  807. pci_release_regions(pdev);
  808. pci_disable_device(pdev);
  809. pci_set_drvdata(pdev, NULL);
  810. }
  811. }
  812. static int lan_saa9730_init(struct net_device *dev, struct pci_dev *pdev,
  813. unsigned long ioaddr, int irq)
  814. {
  815. struct lan_saa9730_private *lp = netdev_priv(dev);
  816. unsigned char ethernet_addr[6];
  817. int ret;
  818. if (get_ethernet_addr(ethernet_addr)) {
  819. ret = -ENODEV;
  820. goto out;
  821. }
  822. memcpy(dev->dev_addr, ethernet_addr, 6);
  823. dev->base_addr = ioaddr;
  824. dev->irq = irq;
  825. lp->pci_dev = pdev;
  826. /* Set SAA9730 LAN base address. */
  827. lp->lan_saa9730_regs = ioremap(ioaddr + SAA9730_LAN_REGS_ADDR,
  828. SAA9730_LAN_REGS_SIZE);
  829. if (!lp->lan_saa9730_regs) {
  830. ret = -ENOMEM;
  831. goto out;
  832. }
  833. /* Set SAA9730 EVM base address. */
  834. lp->evm_saa9730_regs = ioremap(ioaddr + SAA9730_EVM_REGS_ADDR,
  835. SAA9730_EVM_REGS_SIZE);
  836. if (!lp->evm_saa9730_regs) {
  837. ret = -ENOMEM;
  838. goto out_iounmap_lan;
  839. }
  840. /* Allocate LAN RX/TX frame buffer space. */
  841. if ((ret = lan_saa9730_allocate_buffers(pdev, lp)))
  842. goto out_iounmap;
  843. /* Stop LAN controller. */
  844. if ((ret = lan_saa9730_stop(lp)))
  845. goto out_free_consistent;
  846. /* Initialize CAM registers. */
  847. if ((ret = lan_saa9730_cam_init(dev)))
  848. goto out_free_consistent;
  849. /* Initialize MII registers. */
  850. if ((ret = lan_saa9730_mii_init(lp)))
  851. goto out_free_consistent;
  852. /* Initialize control registers. */
  853. if ((ret = lan_saa9730_control_init(lp)))
  854. goto out_free_consistent;
  855. /* Load CAM registers. */
  856. if ((ret = lan_saa9730_cam_load(lp)))
  857. goto out_free_consistent;
  858. /* Initialize DMA context registers. */
  859. if ((ret = lan_saa9730_dma_init(lp)))
  860. goto out_free_consistent;
  861. spin_lock_init(&lp->lock);
  862. dev->open = lan_saa9730_open;
  863. dev->hard_start_xmit = lan_saa9730_start_xmit;
  864. dev->stop = lan_saa9730_close;
  865. dev->get_stats = lan_saa9730_get_stats;
  866. dev->set_multicast_list = lan_saa9730_set_multicast;
  867. dev->tx_timeout = lan_saa9730_tx_timeout;
  868. dev->watchdog_timeo = (HZ >> 1);
  869. dev->dma = 0;
  870. ret = register_netdev (dev);
  871. if (ret)
  872. goto out_free_consistent;
  873. return 0;
  874. out_free_consistent:
  875. lan_saa9730_free_buffers(pdev, lp);
  876. out_iounmap:
  877. iounmap(lp->evm_saa9730_regs);
  878. out_iounmap_lan:
  879. iounmap(lp->lan_saa9730_regs);
  880. out:
  881. return ret;
  882. }
  883. static int __devinit saa9730_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
  884. {
  885. struct net_device *dev = NULL;
  886. unsigned long pci_ioaddr;
  887. int err;
  888. if (lan_saa9730_debug > 1)
  889. printk("saa9730.c: PCI bios is present, checking for devices...\n");
  890. err = pci_enable_device(pdev);
  891. if (err) {
  892. printk(KERN_ERR "Cannot enable PCI device, aborting.\n");
  893. goto out;
  894. }
  895. err = pci_request_regions(pdev, DRV_MODULE_NAME);
  896. if (err) {
  897. printk(KERN_ERR "Cannot obtain PCI resources, aborting.\n");
  898. goto out_disable_pdev;
  899. }
  900. pci_irq_line = pdev->irq;
  901. /* LAN base address in located at BAR 1. */
  902. pci_ioaddr = pci_resource_start(pdev, 1);
  903. pci_set_master(pdev);
  904. printk("Found SAA9730 (PCI) at %lx, irq %d.\n",
  905. pci_ioaddr, pci_irq_line);
  906. dev = alloc_etherdev(sizeof(struct lan_saa9730_private));
  907. if (!dev)
  908. goto out_disable_pdev;
  909. err = lan_saa9730_init(dev, pdev, pci_ioaddr, pci_irq_line);
  910. if (err) {
  911. printk("LAN init failed");
  912. goto out_free_netdev;
  913. }
  914. pci_set_drvdata(pdev, dev);
  915. SET_NETDEV_DEV(dev, &pdev->dev);
  916. return 0;
  917. out_free_netdev:
  918. free_netdev(dev);
  919. out_disable_pdev:
  920. pci_disable_device(pdev);
  921. out:
  922. pci_set_drvdata(pdev, NULL);
  923. return err;
  924. }
  925. static struct pci_driver saa9730_driver = {
  926. .name = DRV_MODULE_NAME,
  927. .id_table = saa9730_pci_tbl,
  928. .probe = saa9730_init_one,
  929. .remove = __devexit_p(saa9730_remove_one),
  930. };
  931. static int __init saa9730_init(void)
  932. {
  933. return pci_register_driver(&saa9730_driver);
  934. }
  935. static void __exit saa9730_cleanup(void)
  936. {
  937. pci_unregister_driver(&saa9730_driver);
  938. }
  939. module_init(saa9730_init);
  940. module_exit(saa9730_cleanup);
  941. MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
  942. MODULE_DESCRIPTION("Philips SAA9730 ethernet driver");
  943. MODULE_LICENSE("GPL");