rrunner.c 43 KB

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  1. /*
  2. * rrunner.c: Linux driver for the Essential RoadRunner HIPPI board.
  3. *
  4. * Copyright (C) 1998-2002 by Jes Sorensen, <jes@wildopensource.com>.
  5. *
  6. * Thanks to Essential Communication for providing us with hardware
  7. * and very comprehensive documentation without which I would not have
  8. * been able to write this driver. A special thank you to John Gibbon
  9. * for sorting out the legal issues, with the NDA, allowing the code to
  10. * be released under the GPL.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * Thanks to Jayaram Bhat from ODS/Essential for fixing some of the
  18. * stupid bugs in my code.
  19. *
  20. * Softnet support and various other patches from Val Henson of
  21. * ODS/Essential.
  22. *
  23. * PCI DMA mapping code partly based on work by Francois Romieu.
  24. */
  25. #define DEBUG 1
  26. #define RX_DMA_SKBUFF 1
  27. #define PKT_COPY_THRESHOLD 512
  28. #include <linux/module.h>
  29. #include <linux/types.h>
  30. #include <linux/errno.h>
  31. #include <linux/ioport.h>
  32. #include <linux/pci.h>
  33. #include <linux/kernel.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/hippidevice.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/init.h>
  38. #include <linux/delay.h>
  39. #include <linux/mm.h>
  40. #include <net/sock.h>
  41. #include <asm/system.h>
  42. #include <asm/cache.h>
  43. #include <asm/byteorder.h>
  44. #include <asm/io.h>
  45. #include <asm/irq.h>
  46. #include <asm/uaccess.h>
  47. #define rr_if_busy(dev) netif_queue_stopped(dev)
  48. #define rr_if_running(dev) netif_running(dev)
  49. #include "rrunner.h"
  50. #define RUN_AT(x) (jiffies + (x))
  51. MODULE_AUTHOR("Jes Sorensen <jes@wildopensource.com>");
  52. MODULE_DESCRIPTION("Essential RoadRunner HIPPI driver");
  53. MODULE_LICENSE("GPL");
  54. static char version[] __devinitdata = "rrunner.c: v0.50 11/11/2002 Jes Sorensen (jes@wildopensource.com)\n";
  55. /*
  56. * Implementation notes:
  57. *
  58. * The DMA engine only allows for DMA within physical 64KB chunks of
  59. * memory. The current approach of the driver (and stack) is to use
  60. * linear blocks of memory for the skbuffs. However, as the data block
  61. * is always the first part of the skb and skbs are 2^n aligned so we
  62. * are guarantted to get the whole block within one 64KB align 64KB
  63. * chunk.
  64. *
  65. * On the long term, relying on being able to allocate 64KB linear
  66. * chunks of memory is not feasible and the skb handling code and the
  67. * stack will need to know about I/O vectors or something similar.
  68. */
  69. /*
  70. * These are checked at init time to see if they are at least 256KB
  71. * and increased to 256KB if they are not. This is done to avoid ending
  72. * up with socket buffers smaller than the MTU size,
  73. */
  74. extern __u32 sysctl_wmem_max;
  75. extern __u32 sysctl_rmem_max;
  76. static int __devinit rr_init_one(struct pci_dev *pdev,
  77. const struct pci_device_id *ent)
  78. {
  79. struct net_device *dev;
  80. static int version_disp;
  81. u8 pci_latency;
  82. struct rr_private *rrpriv;
  83. void *tmpptr;
  84. dma_addr_t ring_dma;
  85. int ret = -ENOMEM;
  86. dev = alloc_hippi_dev(sizeof(struct rr_private));
  87. if (!dev)
  88. goto out3;
  89. ret = pci_enable_device(pdev);
  90. if (ret) {
  91. ret = -ENODEV;
  92. goto out2;
  93. }
  94. rrpriv = netdev_priv(dev);
  95. SET_MODULE_OWNER(dev);
  96. SET_NETDEV_DEV(dev, &pdev->dev);
  97. if (pci_request_regions(pdev, "rrunner")) {
  98. ret = -EIO;
  99. goto out;
  100. }
  101. pci_set_drvdata(pdev, dev);
  102. rrpriv->pci_dev = pdev;
  103. spin_lock_init(&rrpriv->lock);
  104. dev->irq = pdev->irq;
  105. dev->open = &rr_open;
  106. dev->hard_start_xmit = &rr_start_xmit;
  107. dev->stop = &rr_close;
  108. dev->get_stats = &rr_get_stats;
  109. dev->do_ioctl = &rr_ioctl;
  110. dev->base_addr = pci_resource_start(pdev, 0);
  111. /* display version info if adapter is found */
  112. if (!version_disp) {
  113. /* set display flag to TRUE so that */
  114. /* we only display this string ONCE */
  115. version_disp = 1;
  116. printk(version);
  117. }
  118. pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
  119. if (pci_latency <= 0x58){
  120. pci_latency = 0x58;
  121. pci_write_config_byte(pdev, PCI_LATENCY_TIMER, pci_latency);
  122. }
  123. pci_set_master(pdev);
  124. printk(KERN_INFO "%s: Essential RoadRunner serial HIPPI "
  125. "at 0x%08lx, irq %i, PCI latency %i\n", dev->name,
  126. dev->base_addr, dev->irq, pci_latency);
  127. /*
  128. * Remap the regs into kernel space.
  129. */
  130. rrpriv->regs = ioremap(dev->base_addr, 0x1000);
  131. if (!rrpriv->regs){
  132. printk(KERN_ERR "%s: Unable to map I/O register, "
  133. "RoadRunner will be disabled.\n", dev->name);
  134. ret = -EIO;
  135. goto out;
  136. }
  137. tmpptr = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
  138. rrpriv->tx_ring = tmpptr;
  139. rrpriv->tx_ring_dma = ring_dma;
  140. if (!tmpptr) {
  141. ret = -ENOMEM;
  142. goto out;
  143. }
  144. tmpptr = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
  145. rrpriv->rx_ring = tmpptr;
  146. rrpriv->rx_ring_dma = ring_dma;
  147. if (!tmpptr) {
  148. ret = -ENOMEM;
  149. goto out;
  150. }
  151. tmpptr = pci_alloc_consistent(pdev, EVT_RING_SIZE, &ring_dma);
  152. rrpriv->evt_ring = tmpptr;
  153. rrpriv->evt_ring_dma = ring_dma;
  154. if (!tmpptr) {
  155. ret = -ENOMEM;
  156. goto out;
  157. }
  158. /*
  159. * Don't access any register before this point!
  160. */
  161. #ifdef __BIG_ENDIAN
  162. writel(readl(&rrpriv->regs->HostCtrl) | NO_SWAP,
  163. &rrpriv->regs->HostCtrl);
  164. #endif
  165. /*
  166. * Need to add a case for little-endian 64-bit hosts here.
  167. */
  168. rr_init(dev);
  169. dev->base_addr = 0;
  170. ret = register_netdev(dev);
  171. if (ret)
  172. goto out;
  173. return 0;
  174. out:
  175. if (rrpriv->rx_ring)
  176. pci_free_consistent(pdev, RX_TOTAL_SIZE, rrpriv->rx_ring,
  177. rrpriv->rx_ring_dma);
  178. if (rrpriv->tx_ring)
  179. pci_free_consistent(pdev, TX_TOTAL_SIZE, rrpriv->tx_ring,
  180. rrpriv->tx_ring_dma);
  181. if (rrpriv->regs)
  182. iounmap(rrpriv->regs);
  183. if (pdev) {
  184. pci_release_regions(pdev);
  185. pci_set_drvdata(pdev, NULL);
  186. }
  187. out2:
  188. free_netdev(dev);
  189. out3:
  190. return ret;
  191. }
  192. static void __devexit rr_remove_one (struct pci_dev *pdev)
  193. {
  194. struct net_device *dev = pci_get_drvdata(pdev);
  195. if (dev) {
  196. struct rr_private *rr = netdev_priv(dev);
  197. if (!(readl(&rr->regs->HostCtrl) & NIC_HALTED)){
  198. printk(KERN_ERR "%s: trying to unload running NIC\n",
  199. dev->name);
  200. writel(HALT_NIC, &rr->regs->HostCtrl);
  201. }
  202. pci_free_consistent(pdev, EVT_RING_SIZE, rr->evt_ring,
  203. rr->evt_ring_dma);
  204. pci_free_consistent(pdev, RX_TOTAL_SIZE, rr->rx_ring,
  205. rr->rx_ring_dma);
  206. pci_free_consistent(pdev, TX_TOTAL_SIZE, rr->tx_ring,
  207. rr->tx_ring_dma);
  208. unregister_netdev(dev);
  209. iounmap(rr->regs);
  210. free_netdev(dev);
  211. pci_release_regions(pdev);
  212. pci_disable_device(pdev);
  213. pci_set_drvdata(pdev, NULL);
  214. }
  215. }
  216. /*
  217. * Commands are considered to be slow, thus there is no reason to
  218. * inline this.
  219. */
  220. static void rr_issue_cmd(struct rr_private *rrpriv, struct cmd *cmd)
  221. {
  222. struct rr_regs __iomem *regs;
  223. u32 idx;
  224. regs = rrpriv->regs;
  225. /*
  226. * This is temporary - it will go away in the final version.
  227. * We probably also want to make this function inline.
  228. */
  229. if (readl(&regs->HostCtrl) & NIC_HALTED){
  230. printk("issuing command for halted NIC, code 0x%x, "
  231. "HostCtrl %08x\n", cmd->code, readl(&regs->HostCtrl));
  232. if (readl(&regs->Mode) & FATAL_ERR)
  233. printk("error codes Fail1 %02x, Fail2 %02x\n",
  234. readl(&regs->Fail1), readl(&regs->Fail2));
  235. }
  236. idx = rrpriv->info->cmd_ctrl.pi;
  237. writel(*(u32*)(cmd), &regs->CmdRing[idx]);
  238. wmb();
  239. idx = (idx - 1) % CMD_RING_ENTRIES;
  240. rrpriv->info->cmd_ctrl.pi = idx;
  241. wmb();
  242. if (readl(&regs->Mode) & FATAL_ERR)
  243. printk("error code %02x\n", readl(&regs->Fail1));
  244. }
  245. /*
  246. * Reset the board in a sensible manner. The NIC is already halted
  247. * when we get here and a spin-lock is held.
  248. */
  249. static int rr_reset(struct net_device *dev)
  250. {
  251. struct rr_private *rrpriv;
  252. struct rr_regs __iomem *regs;
  253. struct eeprom *hw = NULL;
  254. u32 start_pc;
  255. int i;
  256. rrpriv = netdev_priv(dev);
  257. regs = rrpriv->regs;
  258. rr_load_firmware(dev);
  259. writel(0x01000000, &regs->TX_state);
  260. writel(0xff800000, &regs->RX_state);
  261. writel(0, &regs->AssistState);
  262. writel(CLEAR_INTA, &regs->LocalCtrl);
  263. writel(0x01, &regs->BrkPt);
  264. writel(0, &regs->Timer);
  265. writel(0, &regs->TimerRef);
  266. writel(RESET_DMA, &regs->DmaReadState);
  267. writel(RESET_DMA, &regs->DmaWriteState);
  268. writel(0, &regs->DmaWriteHostHi);
  269. writel(0, &regs->DmaWriteHostLo);
  270. writel(0, &regs->DmaReadHostHi);
  271. writel(0, &regs->DmaReadHostLo);
  272. writel(0, &regs->DmaReadLen);
  273. writel(0, &regs->DmaWriteLen);
  274. writel(0, &regs->DmaWriteLcl);
  275. writel(0, &regs->DmaWriteIPchecksum);
  276. writel(0, &regs->DmaReadLcl);
  277. writel(0, &regs->DmaReadIPchecksum);
  278. writel(0, &regs->PciState);
  279. #if (BITS_PER_LONG == 64) && defined __LITTLE_ENDIAN
  280. writel(SWAP_DATA | PTR64BIT | PTR_WD_SWAP, &regs->Mode);
  281. #elif (BITS_PER_LONG == 64)
  282. writel(SWAP_DATA | PTR64BIT | PTR_WD_NOSWAP, &regs->Mode);
  283. #else
  284. writel(SWAP_DATA | PTR32BIT | PTR_WD_NOSWAP, &regs->Mode);
  285. #endif
  286. #if 0
  287. /*
  288. * Don't worry, this is just black magic.
  289. */
  290. writel(0xdf000, &regs->RxBase);
  291. writel(0xdf000, &regs->RxPrd);
  292. writel(0xdf000, &regs->RxCon);
  293. writel(0xce000, &regs->TxBase);
  294. writel(0xce000, &regs->TxPrd);
  295. writel(0xce000, &regs->TxCon);
  296. writel(0, &regs->RxIndPro);
  297. writel(0, &regs->RxIndCon);
  298. writel(0, &regs->RxIndRef);
  299. writel(0, &regs->TxIndPro);
  300. writel(0, &regs->TxIndCon);
  301. writel(0, &regs->TxIndRef);
  302. writel(0xcc000, &regs->pad10[0]);
  303. writel(0, &regs->DrCmndPro);
  304. writel(0, &regs->DrCmndCon);
  305. writel(0, &regs->DwCmndPro);
  306. writel(0, &regs->DwCmndCon);
  307. writel(0, &regs->DwCmndRef);
  308. writel(0, &regs->DrDataPro);
  309. writel(0, &regs->DrDataCon);
  310. writel(0, &regs->DrDataRef);
  311. writel(0, &regs->DwDataPro);
  312. writel(0, &regs->DwDataCon);
  313. writel(0, &regs->DwDataRef);
  314. #endif
  315. writel(0xffffffff, &regs->MbEvent);
  316. writel(0, &regs->Event);
  317. writel(0, &regs->TxPi);
  318. writel(0, &regs->IpRxPi);
  319. writel(0, &regs->EvtCon);
  320. writel(0, &regs->EvtPrd);
  321. rrpriv->info->evt_ctrl.pi = 0;
  322. for (i = 0; i < CMD_RING_ENTRIES; i++)
  323. writel(0, &regs->CmdRing[i]);
  324. /*
  325. * Why 32 ? is this not cache line size dependent?
  326. */
  327. writel(RBURST_64|WBURST_64, &regs->PciState);
  328. wmb();
  329. start_pc = rr_read_eeprom_word(rrpriv, &hw->rncd_info.FwStart);
  330. #if (DEBUG > 1)
  331. printk("%s: Executing firmware at address 0x%06x\n",
  332. dev->name, start_pc);
  333. #endif
  334. writel(start_pc + 0x800, &regs->Pc);
  335. wmb();
  336. udelay(5);
  337. writel(start_pc, &regs->Pc);
  338. wmb();
  339. return 0;
  340. }
  341. /*
  342. * Read a string from the EEPROM.
  343. */
  344. static unsigned int rr_read_eeprom(struct rr_private *rrpriv,
  345. unsigned long offset,
  346. unsigned char *buf,
  347. unsigned long length)
  348. {
  349. struct rr_regs __iomem *regs = rrpriv->regs;
  350. u32 misc, io, host, i;
  351. io = readl(&regs->ExtIo);
  352. writel(0, &regs->ExtIo);
  353. misc = readl(&regs->LocalCtrl);
  354. writel(0, &regs->LocalCtrl);
  355. host = readl(&regs->HostCtrl);
  356. writel(host | HALT_NIC, &regs->HostCtrl);
  357. mb();
  358. for (i = 0; i < length; i++){
  359. writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
  360. mb();
  361. buf[i] = (readl(&regs->WinData) >> 24) & 0xff;
  362. mb();
  363. }
  364. writel(host, &regs->HostCtrl);
  365. writel(misc, &regs->LocalCtrl);
  366. writel(io, &regs->ExtIo);
  367. mb();
  368. return i;
  369. }
  370. /*
  371. * Shortcut to read one word (4 bytes) out of the EEPROM and convert
  372. * it to our CPU byte-order.
  373. */
  374. static u32 rr_read_eeprom_word(struct rr_private *rrpriv,
  375. void * offset)
  376. {
  377. u32 word;
  378. if ((rr_read_eeprom(rrpriv, (unsigned long)offset,
  379. (char *)&word, 4) == 4))
  380. return be32_to_cpu(word);
  381. return 0;
  382. }
  383. /*
  384. * Write a string to the EEPROM.
  385. *
  386. * This is only called when the firmware is not running.
  387. */
  388. static unsigned int write_eeprom(struct rr_private *rrpriv,
  389. unsigned long offset,
  390. unsigned char *buf,
  391. unsigned long length)
  392. {
  393. struct rr_regs __iomem *regs = rrpriv->regs;
  394. u32 misc, io, data, i, j, ready, error = 0;
  395. io = readl(&regs->ExtIo);
  396. writel(0, &regs->ExtIo);
  397. misc = readl(&regs->LocalCtrl);
  398. writel(ENABLE_EEPROM_WRITE, &regs->LocalCtrl);
  399. mb();
  400. for (i = 0; i < length; i++){
  401. writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
  402. mb();
  403. data = buf[i] << 24;
  404. /*
  405. * Only try to write the data if it is not the same
  406. * value already.
  407. */
  408. if ((readl(&regs->WinData) & 0xff000000) != data){
  409. writel(data, &regs->WinData);
  410. ready = 0;
  411. j = 0;
  412. mb();
  413. while(!ready){
  414. udelay(20);
  415. if ((readl(&regs->WinData) & 0xff000000) ==
  416. data)
  417. ready = 1;
  418. mb();
  419. if (j++ > 5000){
  420. printk("data mismatch: %08x, "
  421. "WinData %08x\n", data,
  422. readl(&regs->WinData));
  423. ready = 1;
  424. error = 1;
  425. }
  426. }
  427. }
  428. }
  429. writel(misc, &regs->LocalCtrl);
  430. writel(io, &regs->ExtIo);
  431. mb();
  432. return error;
  433. }
  434. static int __init rr_init(struct net_device *dev)
  435. {
  436. struct rr_private *rrpriv;
  437. struct rr_regs __iomem *regs;
  438. struct eeprom *hw = NULL;
  439. u32 sram_size, rev;
  440. int i;
  441. rrpriv = netdev_priv(dev);
  442. regs = rrpriv->regs;
  443. rev = readl(&regs->FwRev);
  444. rrpriv->fw_rev = rev;
  445. if (rev > 0x00020024)
  446. printk(" Firmware revision: %i.%i.%i\n", (rev >> 16),
  447. ((rev >> 8) & 0xff), (rev & 0xff));
  448. else if (rev >= 0x00020000) {
  449. printk(" Firmware revision: %i.%i.%i (2.0.37 or "
  450. "later is recommended)\n", (rev >> 16),
  451. ((rev >> 8) & 0xff), (rev & 0xff));
  452. }else{
  453. printk(" Firmware revision too old: %i.%i.%i, please "
  454. "upgrade to 2.0.37 or later.\n",
  455. (rev >> 16), ((rev >> 8) & 0xff), (rev & 0xff));
  456. }
  457. #if (DEBUG > 2)
  458. printk(" Maximum receive rings %i\n", readl(&regs->MaxRxRng));
  459. #endif
  460. /*
  461. * Read the hardware address from the eeprom. The HW address
  462. * is not really necessary for HIPPI but awfully convenient.
  463. * The pointer arithmetic to put it in dev_addr is ugly, but
  464. * Donald Becker does it this way for the GigE version of this
  465. * card and it's shorter and more portable than any
  466. * other method I've seen. -VAL
  467. */
  468. *(u16 *)(dev->dev_addr) =
  469. htons(rr_read_eeprom_word(rrpriv, &hw->manf.BoardULA));
  470. *(u32 *)(dev->dev_addr+2) =
  471. htonl(rr_read_eeprom_word(rrpriv, &hw->manf.BoardULA[4]));
  472. printk(" MAC: ");
  473. for (i = 0; i < 5; i++)
  474. printk("%2.2x:", dev->dev_addr[i]);
  475. printk("%2.2x\n", dev->dev_addr[i]);
  476. sram_size = rr_read_eeprom_word(rrpriv, (void *)8);
  477. printk(" SRAM size 0x%06x\n", sram_size);
  478. if (sysctl_rmem_max < 262144){
  479. printk(" Receive socket buffer limit too low (%i), "
  480. "setting to 262144\n", sysctl_rmem_max);
  481. sysctl_rmem_max = 262144;
  482. }
  483. if (sysctl_wmem_max < 262144){
  484. printk(" Transmit socket buffer limit too low (%i), "
  485. "setting to 262144\n", sysctl_wmem_max);
  486. sysctl_wmem_max = 262144;
  487. }
  488. return 0;
  489. }
  490. static int rr_init1(struct net_device *dev)
  491. {
  492. struct rr_private *rrpriv;
  493. struct rr_regs __iomem *regs;
  494. unsigned long myjif, flags;
  495. struct cmd cmd;
  496. u32 hostctrl;
  497. int ecode = 0;
  498. short i;
  499. rrpriv = netdev_priv(dev);
  500. regs = rrpriv->regs;
  501. spin_lock_irqsave(&rrpriv->lock, flags);
  502. hostctrl = readl(&regs->HostCtrl);
  503. writel(hostctrl | HALT_NIC | RR_CLEAR_INT, &regs->HostCtrl);
  504. wmb();
  505. if (hostctrl & PARITY_ERR){
  506. printk("%s: Parity error halting NIC - this is serious!\n",
  507. dev->name);
  508. spin_unlock_irqrestore(&rrpriv->lock, flags);
  509. ecode = -EFAULT;
  510. goto error;
  511. }
  512. set_rxaddr(regs, rrpriv->rx_ctrl_dma);
  513. set_infoaddr(regs, rrpriv->info_dma);
  514. rrpriv->info->evt_ctrl.entry_size = sizeof(struct event);
  515. rrpriv->info->evt_ctrl.entries = EVT_RING_ENTRIES;
  516. rrpriv->info->evt_ctrl.mode = 0;
  517. rrpriv->info->evt_ctrl.pi = 0;
  518. set_rraddr(&rrpriv->info->evt_ctrl.rngptr, rrpriv->evt_ring_dma);
  519. rrpriv->info->cmd_ctrl.entry_size = sizeof(struct cmd);
  520. rrpriv->info->cmd_ctrl.entries = CMD_RING_ENTRIES;
  521. rrpriv->info->cmd_ctrl.mode = 0;
  522. rrpriv->info->cmd_ctrl.pi = 15;
  523. for (i = 0; i < CMD_RING_ENTRIES; i++) {
  524. writel(0, &regs->CmdRing[i]);
  525. }
  526. for (i = 0; i < TX_RING_ENTRIES; i++) {
  527. rrpriv->tx_ring[i].size = 0;
  528. set_rraddr(&rrpriv->tx_ring[i].addr, 0);
  529. rrpriv->tx_skbuff[i] = NULL;
  530. }
  531. rrpriv->info->tx_ctrl.entry_size = sizeof(struct tx_desc);
  532. rrpriv->info->tx_ctrl.entries = TX_RING_ENTRIES;
  533. rrpriv->info->tx_ctrl.mode = 0;
  534. rrpriv->info->tx_ctrl.pi = 0;
  535. set_rraddr(&rrpriv->info->tx_ctrl.rngptr, rrpriv->tx_ring_dma);
  536. /*
  537. * Set dirty_tx before we start receiving interrupts, otherwise
  538. * the interrupt handler might think it is supposed to process
  539. * tx ints before we are up and running, which may cause a null
  540. * pointer access in the int handler.
  541. */
  542. rrpriv->tx_full = 0;
  543. rrpriv->cur_rx = 0;
  544. rrpriv->dirty_rx = rrpriv->dirty_tx = 0;
  545. rr_reset(dev);
  546. /* Tuning values */
  547. writel(0x5000, &regs->ConRetry);
  548. writel(0x100, &regs->ConRetryTmr);
  549. writel(0x500000, &regs->ConTmout);
  550. writel(0x60, &regs->IntrTmr);
  551. writel(0x500000, &regs->TxDataMvTimeout);
  552. writel(0x200000, &regs->RxDataMvTimeout);
  553. writel(0x80, &regs->WriteDmaThresh);
  554. writel(0x80, &regs->ReadDmaThresh);
  555. rrpriv->fw_running = 0;
  556. wmb();
  557. hostctrl &= ~(HALT_NIC | INVALID_INST_B | PARITY_ERR);
  558. writel(hostctrl, &regs->HostCtrl);
  559. wmb();
  560. spin_unlock_irqrestore(&rrpriv->lock, flags);
  561. for (i = 0; i < RX_RING_ENTRIES; i++) {
  562. struct sk_buff *skb;
  563. dma_addr_t addr;
  564. rrpriv->rx_ring[i].mode = 0;
  565. skb = alloc_skb(dev->mtu + HIPPI_HLEN, GFP_ATOMIC);
  566. if (!skb) {
  567. printk(KERN_WARNING "%s: Unable to allocate memory "
  568. "for receive ring - halting NIC\n", dev->name);
  569. ecode = -ENOMEM;
  570. goto error;
  571. }
  572. rrpriv->rx_skbuff[i] = skb;
  573. addr = pci_map_single(rrpriv->pci_dev, skb->data,
  574. dev->mtu + HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  575. /*
  576. * Sanity test to see if we conflict with the DMA
  577. * limitations of the Roadrunner.
  578. */
  579. if ((((unsigned long)skb->data) & 0xfff) > ~65320)
  580. printk("skb alloc error\n");
  581. set_rraddr(&rrpriv->rx_ring[i].addr, addr);
  582. rrpriv->rx_ring[i].size = dev->mtu + HIPPI_HLEN;
  583. }
  584. rrpriv->rx_ctrl[4].entry_size = sizeof(struct rx_desc);
  585. rrpriv->rx_ctrl[4].entries = RX_RING_ENTRIES;
  586. rrpriv->rx_ctrl[4].mode = 8;
  587. rrpriv->rx_ctrl[4].pi = 0;
  588. wmb();
  589. set_rraddr(&rrpriv->rx_ctrl[4].rngptr, rrpriv->rx_ring_dma);
  590. udelay(1000);
  591. /*
  592. * Now start the FirmWare.
  593. */
  594. cmd.code = C_START_FW;
  595. cmd.ring = 0;
  596. cmd.index = 0;
  597. rr_issue_cmd(rrpriv, &cmd);
  598. /*
  599. * Give the FirmWare time to chew on the `get running' command.
  600. */
  601. myjif = jiffies + 5 * HZ;
  602. while (time_before(jiffies, myjif) && !rrpriv->fw_running)
  603. cpu_relax();
  604. netif_start_queue(dev);
  605. return ecode;
  606. error:
  607. /*
  608. * We might have gotten here because we are out of memory,
  609. * make sure we release everything we allocated before failing
  610. */
  611. for (i = 0; i < RX_RING_ENTRIES; i++) {
  612. struct sk_buff *skb = rrpriv->rx_skbuff[i];
  613. if (skb) {
  614. pci_unmap_single(rrpriv->pci_dev,
  615. rrpriv->rx_ring[i].addr.addrlo,
  616. dev->mtu + HIPPI_HLEN,
  617. PCI_DMA_FROMDEVICE);
  618. rrpriv->rx_ring[i].size = 0;
  619. set_rraddr(&rrpriv->rx_ring[i].addr, 0);
  620. dev_kfree_skb(skb);
  621. rrpriv->rx_skbuff[i] = NULL;
  622. }
  623. }
  624. return ecode;
  625. }
  626. /*
  627. * All events are considered to be slow (RX/TX ints do not generate
  628. * events) and are handled here, outside the main interrupt handler,
  629. * to reduce the size of the handler.
  630. */
  631. static u32 rr_handle_event(struct net_device *dev, u32 prodidx, u32 eidx)
  632. {
  633. struct rr_private *rrpriv;
  634. struct rr_regs __iomem *regs;
  635. u32 tmp;
  636. rrpriv = netdev_priv(dev);
  637. regs = rrpriv->regs;
  638. while (prodidx != eidx){
  639. switch (rrpriv->evt_ring[eidx].code){
  640. case E_NIC_UP:
  641. tmp = readl(&regs->FwRev);
  642. printk(KERN_INFO "%s: Firmware revision %i.%i.%i "
  643. "up and running\n", dev->name,
  644. (tmp >> 16), ((tmp >> 8) & 0xff), (tmp & 0xff));
  645. rrpriv->fw_running = 1;
  646. writel(RX_RING_ENTRIES - 1, &regs->IpRxPi);
  647. wmb();
  648. break;
  649. case E_LINK_ON:
  650. printk(KERN_INFO "%s: Optical link ON\n", dev->name);
  651. break;
  652. case E_LINK_OFF:
  653. printk(KERN_INFO "%s: Optical link OFF\n", dev->name);
  654. break;
  655. case E_RX_IDLE:
  656. printk(KERN_WARNING "%s: RX data not moving\n",
  657. dev->name);
  658. goto drop;
  659. case E_WATCHDOG:
  660. printk(KERN_INFO "%s: The watchdog is here to see "
  661. "us\n", dev->name);
  662. break;
  663. case E_INTERN_ERR:
  664. printk(KERN_ERR "%s: HIPPI Internal NIC error\n",
  665. dev->name);
  666. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  667. &regs->HostCtrl);
  668. wmb();
  669. break;
  670. case E_HOST_ERR:
  671. printk(KERN_ERR "%s: Host software error\n",
  672. dev->name);
  673. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  674. &regs->HostCtrl);
  675. wmb();
  676. break;
  677. /*
  678. * TX events.
  679. */
  680. case E_CON_REJ:
  681. printk(KERN_WARNING "%s: Connection rejected\n",
  682. dev->name);
  683. rrpriv->stats.tx_aborted_errors++;
  684. break;
  685. case E_CON_TMOUT:
  686. printk(KERN_WARNING "%s: Connection timeout\n",
  687. dev->name);
  688. break;
  689. case E_DISC_ERR:
  690. printk(KERN_WARNING "%s: HIPPI disconnect error\n",
  691. dev->name);
  692. rrpriv->stats.tx_aborted_errors++;
  693. break;
  694. case E_INT_PRTY:
  695. printk(KERN_ERR "%s: HIPPI Internal Parity error\n",
  696. dev->name);
  697. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  698. &regs->HostCtrl);
  699. wmb();
  700. break;
  701. case E_TX_IDLE:
  702. printk(KERN_WARNING "%s: Transmitter idle\n",
  703. dev->name);
  704. break;
  705. case E_TX_LINK_DROP:
  706. printk(KERN_WARNING "%s: Link lost during transmit\n",
  707. dev->name);
  708. rrpriv->stats.tx_aborted_errors++;
  709. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  710. &regs->HostCtrl);
  711. wmb();
  712. break;
  713. case E_TX_INV_RNG:
  714. printk(KERN_ERR "%s: Invalid send ring block\n",
  715. dev->name);
  716. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  717. &regs->HostCtrl);
  718. wmb();
  719. break;
  720. case E_TX_INV_BUF:
  721. printk(KERN_ERR "%s: Invalid send buffer address\n",
  722. dev->name);
  723. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  724. &regs->HostCtrl);
  725. wmb();
  726. break;
  727. case E_TX_INV_DSC:
  728. printk(KERN_ERR "%s: Invalid descriptor address\n",
  729. dev->name);
  730. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  731. &regs->HostCtrl);
  732. wmb();
  733. break;
  734. /*
  735. * RX events.
  736. */
  737. case E_RX_RNG_OUT:
  738. printk(KERN_INFO "%s: Receive ring full\n", dev->name);
  739. break;
  740. case E_RX_PAR_ERR:
  741. printk(KERN_WARNING "%s: Receive parity error\n",
  742. dev->name);
  743. goto drop;
  744. case E_RX_LLRC_ERR:
  745. printk(KERN_WARNING "%s: Receive LLRC error\n",
  746. dev->name);
  747. goto drop;
  748. case E_PKT_LN_ERR:
  749. printk(KERN_WARNING "%s: Receive packet length "
  750. "error\n", dev->name);
  751. goto drop;
  752. case E_DTA_CKSM_ERR:
  753. printk(KERN_WARNING "%s: Data checksum error\n",
  754. dev->name);
  755. goto drop;
  756. case E_SHT_BST:
  757. printk(KERN_WARNING "%s: Unexpected short burst "
  758. "error\n", dev->name);
  759. goto drop;
  760. case E_STATE_ERR:
  761. printk(KERN_WARNING "%s: Recv. state transition"
  762. " error\n", dev->name);
  763. goto drop;
  764. case E_UNEXP_DATA:
  765. printk(KERN_WARNING "%s: Unexpected data error\n",
  766. dev->name);
  767. goto drop;
  768. case E_LST_LNK_ERR:
  769. printk(KERN_WARNING "%s: Link lost error\n",
  770. dev->name);
  771. goto drop;
  772. case E_FRM_ERR:
  773. printk(KERN_WARNING "%s: Framming Error\n",
  774. dev->name);
  775. goto drop;
  776. case E_FLG_SYN_ERR:
  777. printk(KERN_WARNING "%s: Flag sync. lost during"
  778. "packet\n", dev->name);
  779. goto drop;
  780. case E_RX_INV_BUF:
  781. printk(KERN_ERR "%s: Invalid receive buffer "
  782. "address\n", dev->name);
  783. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  784. &regs->HostCtrl);
  785. wmb();
  786. break;
  787. case E_RX_INV_DSC:
  788. printk(KERN_ERR "%s: Invalid receive descriptor "
  789. "address\n", dev->name);
  790. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  791. &regs->HostCtrl);
  792. wmb();
  793. break;
  794. case E_RNG_BLK:
  795. printk(KERN_ERR "%s: Invalid ring block\n",
  796. dev->name);
  797. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  798. &regs->HostCtrl);
  799. wmb();
  800. break;
  801. drop:
  802. /* Label packet to be dropped.
  803. * Actual dropping occurs in rx
  804. * handling.
  805. *
  806. * The index of packet we get to drop is
  807. * the index of the packet following
  808. * the bad packet. -kbf
  809. */
  810. {
  811. u16 index = rrpriv->evt_ring[eidx].index;
  812. index = (index + (RX_RING_ENTRIES - 1)) %
  813. RX_RING_ENTRIES;
  814. rrpriv->rx_ring[index].mode |=
  815. (PACKET_BAD | PACKET_END);
  816. }
  817. break;
  818. default:
  819. printk(KERN_WARNING "%s: Unhandled event 0x%02x\n",
  820. dev->name, rrpriv->evt_ring[eidx].code);
  821. }
  822. eidx = (eidx + 1) % EVT_RING_ENTRIES;
  823. }
  824. rrpriv->info->evt_ctrl.pi = eidx;
  825. wmb();
  826. return eidx;
  827. }
  828. static void rx_int(struct net_device *dev, u32 rxlimit, u32 index)
  829. {
  830. struct rr_private *rrpriv = netdev_priv(dev);
  831. struct rr_regs __iomem *regs = rrpriv->regs;
  832. do {
  833. struct rx_desc *desc;
  834. u32 pkt_len;
  835. desc = &(rrpriv->rx_ring[index]);
  836. pkt_len = desc->size;
  837. #if (DEBUG > 2)
  838. printk("index %i, rxlimit %i\n", index, rxlimit);
  839. printk("len %x, mode %x\n", pkt_len, desc->mode);
  840. #endif
  841. if ( (rrpriv->rx_ring[index].mode & PACKET_BAD) == PACKET_BAD){
  842. rrpriv->stats.rx_dropped++;
  843. goto defer;
  844. }
  845. if (pkt_len > 0){
  846. struct sk_buff *skb, *rx_skb;
  847. rx_skb = rrpriv->rx_skbuff[index];
  848. if (pkt_len < PKT_COPY_THRESHOLD) {
  849. skb = alloc_skb(pkt_len, GFP_ATOMIC);
  850. if (skb == NULL){
  851. printk(KERN_WARNING "%s: Unable to allocate skb (%i bytes), deferring packet\n", dev->name, pkt_len);
  852. rrpriv->stats.rx_dropped++;
  853. goto defer;
  854. } else {
  855. pci_dma_sync_single_for_cpu(rrpriv->pci_dev,
  856. desc->addr.addrlo,
  857. pkt_len,
  858. PCI_DMA_FROMDEVICE);
  859. memcpy(skb_put(skb, pkt_len),
  860. rx_skb->data, pkt_len);
  861. pci_dma_sync_single_for_device(rrpriv->pci_dev,
  862. desc->addr.addrlo,
  863. pkt_len,
  864. PCI_DMA_FROMDEVICE);
  865. }
  866. }else{
  867. struct sk_buff *newskb;
  868. newskb = alloc_skb(dev->mtu + HIPPI_HLEN,
  869. GFP_ATOMIC);
  870. if (newskb){
  871. dma_addr_t addr;
  872. pci_unmap_single(rrpriv->pci_dev,
  873. desc->addr.addrlo, dev->mtu +
  874. HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  875. skb = rx_skb;
  876. skb_put(skb, pkt_len);
  877. rrpriv->rx_skbuff[index] = newskb;
  878. addr = pci_map_single(rrpriv->pci_dev,
  879. newskb->data,
  880. dev->mtu + HIPPI_HLEN,
  881. PCI_DMA_FROMDEVICE);
  882. set_rraddr(&desc->addr, addr);
  883. } else {
  884. printk("%s: Out of memory, deferring "
  885. "packet\n", dev->name);
  886. rrpriv->stats.rx_dropped++;
  887. goto defer;
  888. }
  889. }
  890. skb->dev = dev;
  891. skb->protocol = hippi_type_trans(skb, dev);
  892. netif_rx(skb); /* send it up */
  893. dev->last_rx = jiffies;
  894. rrpriv->stats.rx_packets++;
  895. rrpriv->stats.rx_bytes += pkt_len;
  896. }
  897. defer:
  898. desc->mode = 0;
  899. desc->size = dev->mtu + HIPPI_HLEN;
  900. if ((index & 7) == 7)
  901. writel(index, &regs->IpRxPi);
  902. index = (index + 1) % RX_RING_ENTRIES;
  903. } while(index != rxlimit);
  904. rrpriv->cur_rx = index;
  905. wmb();
  906. }
  907. static irqreturn_t rr_interrupt(int irq, void *dev_id)
  908. {
  909. struct rr_private *rrpriv;
  910. struct rr_regs __iomem *regs;
  911. struct net_device *dev = (struct net_device *)dev_id;
  912. u32 prodidx, rxindex, eidx, txcsmr, rxlimit, txcon;
  913. rrpriv = netdev_priv(dev);
  914. regs = rrpriv->regs;
  915. if (!(readl(&regs->HostCtrl) & RR_INT))
  916. return IRQ_NONE;
  917. spin_lock(&rrpriv->lock);
  918. prodidx = readl(&regs->EvtPrd);
  919. txcsmr = (prodidx >> 8) & 0xff;
  920. rxlimit = (prodidx >> 16) & 0xff;
  921. prodidx &= 0xff;
  922. #if (DEBUG > 2)
  923. printk("%s: interrupt, prodidx = %i, eidx = %i\n", dev->name,
  924. prodidx, rrpriv->info->evt_ctrl.pi);
  925. #endif
  926. /*
  927. * Order here is important. We must handle events
  928. * before doing anything else in order to catch
  929. * such things as LLRC errors, etc -kbf
  930. */
  931. eidx = rrpriv->info->evt_ctrl.pi;
  932. if (prodidx != eidx)
  933. eidx = rr_handle_event(dev, prodidx, eidx);
  934. rxindex = rrpriv->cur_rx;
  935. if (rxindex != rxlimit)
  936. rx_int(dev, rxlimit, rxindex);
  937. txcon = rrpriv->dirty_tx;
  938. if (txcsmr != txcon) {
  939. do {
  940. /* Due to occational firmware TX producer/consumer out
  941. * of sync. error need to check entry in ring -kbf
  942. */
  943. if(rrpriv->tx_skbuff[txcon]){
  944. struct tx_desc *desc;
  945. struct sk_buff *skb;
  946. desc = &(rrpriv->tx_ring[txcon]);
  947. skb = rrpriv->tx_skbuff[txcon];
  948. rrpriv->stats.tx_packets++;
  949. rrpriv->stats.tx_bytes += skb->len;
  950. pci_unmap_single(rrpriv->pci_dev,
  951. desc->addr.addrlo, skb->len,
  952. PCI_DMA_TODEVICE);
  953. dev_kfree_skb_irq(skb);
  954. rrpriv->tx_skbuff[txcon] = NULL;
  955. desc->size = 0;
  956. set_rraddr(&rrpriv->tx_ring[txcon].addr, 0);
  957. desc->mode = 0;
  958. }
  959. txcon = (txcon + 1) % TX_RING_ENTRIES;
  960. } while (txcsmr != txcon);
  961. wmb();
  962. rrpriv->dirty_tx = txcon;
  963. if (rrpriv->tx_full && rr_if_busy(dev) &&
  964. (((rrpriv->info->tx_ctrl.pi + 1) % TX_RING_ENTRIES)
  965. != rrpriv->dirty_tx)){
  966. rrpriv->tx_full = 0;
  967. netif_wake_queue(dev);
  968. }
  969. }
  970. eidx |= ((txcsmr << 8) | (rxlimit << 16));
  971. writel(eidx, &regs->EvtCon);
  972. wmb();
  973. spin_unlock(&rrpriv->lock);
  974. return IRQ_HANDLED;
  975. }
  976. static inline void rr_raz_tx(struct rr_private *rrpriv,
  977. struct net_device *dev)
  978. {
  979. int i;
  980. for (i = 0; i < TX_RING_ENTRIES; i++) {
  981. struct sk_buff *skb = rrpriv->tx_skbuff[i];
  982. if (skb) {
  983. struct tx_desc *desc = &(rrpriv->tx_ring[i]);
  984. pci_unmap_single(rrpriv->pci_dev, desc->addr.addrlo,
  985. skb->len, PCI_DMA_TODEVICE);
  986. desc->size = 0;
  987. set_rraddr(&desc->addr, 0);
  988. dev_kfree_skb(skb);
  989. rrpriv->tx_skbuff[i] = NULL;
  990. }
  991. }
  992. }
  993. static inline void rr_raz_rx(struct rr_private *rrpriv,
  994. struct net_device *dev)
  995. {
  996. int i;
  997. for (i = 0; i < RX_RING_ENTRIES; i++) {
  998. struct sk_buff *skb = rrpriv->rx_skbuff[i];
  999. if (skb) {
  1000. struct rx_desc *desc = &(rrpriv->rx_ring[i]);
  1001. pci_unmap_single(rrpriv->pci_dev, desc->addr.addrlo,
  1002. dev->mtu + HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  1003. desc->size = 0;
  1004. set_rraddr(&desc->addr, 0);
  1005. dev_kfree_skb(skb);
  1006. rrpriv->rx_skbuff[i] = NULL;
  1007. }
  1008. }
  1009. }
  1010. static void rr_timer(unsigned long data)
  1011. {
  1012. struct net_device *dev = (struct net_device *)data;
  1013. struct rr_private *rrpriv = netdev_priv(dev);
  1014. struct rr_regs __iomem *regs = rrpriv->regs;
  1015. unsigned long flags;
  1016. if (readl(&regs->HostCtrl) & NIC_HALTED){
  1017. printk("%s: Restarting nic\n", dev->name);
  1018. memset(rrpriv->rx_ctrl, 0, 256 * sizeof(struct ring_ctrl));
  1019. memset(rrpriv->info, 0, sizeof(struct rr_info));
  1020. wmb();
  1021. rr_raz_tx(rrpriv, dev);
  1022. rr_raz_rx(rrpriv, dev);
  1023. if (rr_init1(dev)) {
  1024. spin_lock_irqsave(&rrpriv->lock, flags);
  1025. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  1026. &regs->HostCtrl);
  1027. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1028. }
  1029. }
  1030. rrpriv->timer.expires = RUN_AT(5*HZ);
  1031. add_timer(&rrpriv->timer);
  1032. }
  1033. static int rr_open(struct net_device *dev)
  1034. {
  1035. struct rr_private *rrpriv = netdev_priv(dev);
  1036. struct pci_dev *pdev = rrpriv->pci_dev;
  1037. struct rr_regs __iomem *regs;
  1038. int ecode = 0;
  1039. unsigned long flags;
  1040. dma_addr_t dma_addr;
  1041. regs = rrpriv->regs;
  1042. if (rrpriv->fw_rev < 0x00020000) {
  1043. printk(KERN_WARNING "%s: trying to configure device with "
  1044. "obsolete firmware\n", dev->name);
  1045. ecode = -EBUSY;
  1046. goto error;
  1047. }
  1048. rrpriv->rx_ctrl = pci_alloc_consistent(pdev,
  1049. 256 * sizeof(struct ring_ctrl),
  1050. &dma_addr);
  1051. if (!rrpriv->rx_ctrl) {
  1052. ecode = -ENOMEM;
  1053. goto error;
  1054. }
  1055. rrpriv->rx_ctrl_dma = dma_addr;
  1056. memset(rrpriv->rx_ctrl, 0, 256*sizeof(struct ring_ctrl));
  1057. rrpriv->info = pci_alloc_consistent(pdev, sizeof(struct rr_info),
  1058. &dma_addr);
  1059. if (!rrpriv->info) {
  1060. ecode = -ENOMEM;
  1061. goto error;
  1062. }
  1063. rrpriv->info_dma = dma_addr;
  1064. memset(rrpriv->info, 0, sizeof(struct rr_info));
  1065. wmb();
  1066. spin_lock_irqsave(&rrpriv->lock, flags);
  1067. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
  1068. readl(&regs->HostCtrl);
  1069. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1070. if (request_irq(dev->irq, rr_interrupt, IRQF_SHARED, dev->name, dev)) {
  1071. printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
  1072. dev->name, dev->irq);
  1073. ecode = -EAGAIN;
  1074. goto error;
  1075. }
  1076. if ((ecode = rr_init1(dev)))
  1077. goto error;
  1078. /* Set the timer to switch to check for link beat and perhaps switch
  1079. to an alternate media type. */
  1080. init_timer(&rrpriv->timer);
  1081. rrpriv->timer.expires = RUN_AT(5*HZ); /* 5 sec. watchdog */
  1082. rrpriv->timer.data = (unsigned long)dev;
  1083. rrpriv->timer.function = &rr_timer; /* timer handler */
  1084. add_timer(&rrpriv->timer);
  1085. netif_start_queue(dev);
  1086. return ecode;
  1087. error:
  1088. spin_lock_irqsave(&rrpriv->lock, flags);
  1089. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
  1090. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1091. if (rrpriv->info) {
  1092. pci_free_consistent(pdev, sizeof(struct rr_info), rrpriv->info,
  1093. rrpriv->info_dma);
  1094. rrpriv->info = NULL;
  1095. }
  1096. if (rrpriv->rx_ctrl) {
  1097. pci_free_consistent(pdev, sizeof(struct ring_ctrl),
  1098. rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
  1099. rrpriv->rx_ctrl = NULL;
  1100. }
  1101. netif_stop_queue(dev);
  1102. return ecode;
  1103. }
  1104. static void rr_dump(struct net_device *dev)
  1105. {
  1106. struct rr_private *rrpriv;
  1107. struct rr_regs __iomem *regs;
  1108. u32 index, cons;
  1109. short i;
  1110. int len;
  1111. rrpriv = netdev_priv(dev);
  1112. regs = rrpriv->regs;
  1113. printk("%s: dumping NIC TX rings\n", dev->name);
  1114. printk("RxPrd %08x, TxPrd %02x, EvtPrd %08x, TxPi %02x, TxCtrlPi %02x\n",
  1115. readl(&regs->RxPrd), readl(&regs->TxPrd),
  1116. readl(&regs->EvtPrd), readl(&regs->TxPi),
  1117. rrpriv->info->tx_ctrl.pi);
  1118. printk("Error code 0x%x\n", readl(&regs->Fail1));
  1119. index = (((readl(&regs->EvtPrd) >> 8) & 0xff ) - 1) % EVT_RING_ENTRIES;
  1120. cons = rrpriv->dirty_tx;
  1121. printk("TX ring index %i, TX consumer %i\n",
  1122. index, cons);
  1123. if (rrpriv->tx_skbuff[index]){
  1124. len = min_t(int, 0x80, rrpriv->tx_skbuff[index]->len);
  1125. printk("skbuff for index %i is valid - dumping data (0x%x bytes - DMA len 0x%x)\n", index, len, rrpriv->tx_ring[index].size);
  1126. for (i = 0; i < len; i++){
  1127. if (!(i & 7))
  1128. printk("\n");
  1129. printk("%02x ", (unsigned char) rrpriv->tx_skbuff[index]->data[i]);
  1130. }
  1131. printk("\n");
  1132. }
  1133. if (rrpriv->tx_skbuff[cons]){
  1134. len = min_t(int, 0x80, rrpriv->tx_skbuff[cons]->len);
  1135. printk("skbuff for cons %i is valid - dumping data (0x%x bytes - skbuff len 0x%x)\n", cons, len, rrpriv->tx_skbuff[cons]->len);
  1136. printk("mode 0x%x, size 0x%x,\n phys %08Lx, skbuff-addr %08lx, truesize 0x%x\n",
  1137. rrpriv->tx_ring[cons].mode,
  1138. rrpriv->tx_ring[cons].size,
  1139. (unsigned long long) rrpriv->tx_ring[cons].addr.addrlo,
  1140. (unsigned long)rrpriv->tx_skbuff[cons]->data,
  1141. (unsigned int)rrpriv->tx_skbuff[cons]->truesize);
  1142. for (i = 0; i < len; i++){
  1143. if (!(i & 7))
  1144. printk("\n");
  1145. printk("%02x ", (unsigned char)rrpriv->tx_ring[cons].size);
  1146. }
  1147. printk("\n");
  1148. }
  1149. printk("dumping TX ring info:\n");
  1150. for (i = 0; i < TX_RING_ENTRIES; i++)
  1151. printk("mode 0x%x, size 0x%x, phys-addr %08Lx\n",
  1152. rrpriv->tx_ring[i].mode,
  1153. rrpriv->tx_ring[i].size,
  1154. (unsigned long long) rrpriv->tx_ring[i].addr.addrlo);
  1155. }
  1156. static int rr_close(struct net_device *dev)
  1157. {
  1158. struct rr_private *rrpriv;
  1159. struct rr_regs __iomem *regs;
  1160. unsigned long flags;
  1161. u32 tmp;
  1162. short i;
  1163. netif_stop_queue(dev);
  1164. rrpriv = netdev_priv(dev);
  1165. regs = rrpriv->regs;
  1166. /*
  1167. * Lock to make sure we are not cleaning up while another CPU
  1168. * is handling interrupts.
  1169. */
  1170. spin_lock_irqsave(&rrpriv->lock, flags);
  1171. tmp = readl(&regs->HostCtrl);
  1172. if (tmp & NIC_HALTED){
  1173. printk("%s: NIC already halted\n", dev->name);
  1174. rr_dump(dev);
  1175. }else{
  1176. tmp |= HALT_NIC | RR_CLEAR_INT;
  1177. writel(tmp, &regs->HostCtrl);
  1178. readl(&regs->HostCtrl);
  1179. }
  1180. rrpriv->fw_running = 0;
  1181. del_timer_sync(&rrpriv->timer);
  1182. writel(0, &regs->TxPi);
  1183. writel(0, &regs->IpRxPi);
  1184. writel(0, &regs->EvtCon);
  1185. writel(0, &regs->EvtPrd);
  1186. for (i = 0; i < CMD_RING_ENTRIES; i++)
  1187. writel(0, &regs->CmdRing[i]);
  1188. rrpriv->info->tx_ctrl.entries = 0;
  1189. rrpriv->info->cmd_ctrl.pi = 0;
  1190. rrpriv->info->evt_ctrl.pi = 0;
  1191. rrpriv->rx_ctrl[4].entries = 0;
  1192. rr_raz_tx(rrpriv, dev);
  1193. rr_raz_rx(rrpriv, dev);
  1194. pci_free_consistent(rrpriv->pci_dev, 256 * sizeof(struct ring_ctrl),
  1195. rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
  1196. rrpriv->rx_ctrl = NULL;
  1197. pci_free_consistent(rrpriv->pci_dev, sizeof(struct rr_info),
  1198. rrpriv->info, rrpriv->info_dma);
  1199. rrpriv->info = NULL;
  1200. free_irq(dev->irq, dev);
  1201. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1202. return 0;
  1203. }
  1204. static int rr_start_xmit(struct sk_buff *skb, struct net_device *dev)
  1205. {
  1206. struct rr_private *rrpriv = netdev_priv(dev);
  1207. struct rr_regs __iomem *regs = rrpriv->regs;
  1208. struct hippi_cb *hcb = (struct hippi_cb *) skb->cb;
  1209. struct ring_ctrl *txctrl;
  1210. unsigned long flags;
  1211. u32 index, len = skb->len;
  1212. u32 *ifield;
  1213. struct sk_buff *new_skb;
  1214. if (readl(&regs->Mode) & FATAL_ERR)
  1215. printk("error codes Fail1 %02x, Fail2 %02x\n",
  1216. readl(&regs->Fail1), readl(&regs->Fail2));
  1217. /*
  1218. * We probably need to deal with tbusy here to prevent overruns.
  1219. */
  1220. if (skb_headroom(skb) < 8){
  1221. printk("incoming skb too small - reallocating\n");
  1222. if (!(new_skb = dev_alloc_skb(len + 8))) {
  1223. dev_kfree_skb(skb);
  1224. netif_wake_queue(dev);
  1225. return -EBUSY;
  1226. }
  1227. skb_reserve(new_skb, 8);
  1228. skb_put(new_skb, len);
  1229. memcpy(new_skb->data, skb->data, len);
  1230. dev_kfree_skb(skb);
  1231. skb = new_skb;
  1232. }
  1233. ifield = (u32 *)skb_push(skb, 8);
  1234. ifield[0] = 0;
  1235. ifield[1] = hcb->ifield;
  1236. /*
  1237. * We don't need the lock before we are actually going to start
  1238. * fiddling with the control blocks.
  1239. */
  1240. spin_lock_irqsave(&rrpriv->lock, flags);
  1241. txctrl = &rrpriv->info->tx_ctrl;
  1242. index = txctrl->pi;
  1243. rrpriv->tx_skbuff[index] = skb;
  1244. set_rraddr(&rrpriv->tx_ring[index].addr, pci_map_single(
  1245. rrpriv->pci_dev, skb->data, len + 8, PCI_DMA_TODEVICE));
  1246. rrpriv->tx_ring[index].size = len + 8; /* include IFIELD */
  1247. rrpriv->tx_ring[index].mode = PACKET_START | PACKET_END;
  1248. txctrl->pi = (index + 1) % TX_RING_ENTRIES;
  1249. wmb();
  1250. writel(txctrl->pi, &regs->TxPi);
  1251. if (txctrl->pi == rrpriv->dirty_tx){
  1252. rrpriv->tx_full = 1;
  1253. netif_stop_queue(dev);
  1254. }
  1255. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1256. dev->trans_start = jiffies;
  1257. return 0;
  1258. }
  1259. static struct net_device_stats *rr_get_stats(struct net_device *dev)
  1260. {
  1261. struct rr_private *rrpriv;
  1262. rrpriv = netdev_priv(dev);
  1263. return(&rrpriv->stats);
  1264. }
  1265. /*
  1266. * Read the firmware out of the EEPROM and put it into the SRAM
  1267. * (or from user space - later)
  1268. *
  1269. * This operation requires the NIC to be halted and is performed with
  1270. * interrupts disabled and with the spinlock hold.
  1271. */
  1272. static int rr_load_firmware(struct net_device *dev)
  1273. {
  1274. struct rr_private *rrpriv;
  1275. struct rr_regs __iomem *regs;
  1276. unsigned long eptr, segptr;
  1277. int i, j;
  1278. u32 localctrl, sptr, len, tmp;
  1279. u32 p2len, p2size, nr_seg, revision, io, sram_size;
  1280. struct eeprom *hw = NULL;
  1281. rrpriv = netdev_priv(dev);
  1282. regs = rrpriv->regs;
  1283. if (dev->flags & IFF_UP)
  1284. return -EBUSY;
  1285. if (!(readl(&regs->HostCtrl) & NIC_HALTED)){
  1286. printk("%s: Trying to load firmware to a running NIC.\n",
  1287. dev->name);
  1288. return -EBUSY;
  1289. }
  1290. localctrl = readl(&regs->LocalCtrl);
  1291. writel(0, &regs->LocalCtrl);
  1292. writel(0, &regs->EvtPrd);
  1293. writel(0, &regs->RxPrd);
  1294. writel(0, &regs->TxPrd);
  1295. /*
  1296. * First wipe the entire SRAM, otherwise we might run into all
  1297. * kinds of trouble ... sigh, this took almost all afternoon
  1298. * to track down ;-(
  1299. */
  1300. io = readl(&regs->ExtIo);
  1301. writel(0, &regs->ExtIo);
  1302. sram_size = rr_read_eeprom_word(rrpriv, (void *)8);
  1303. for (i = 200; i < sram_size / 4; i++){
  1304. writel(i * 4, &regs->WinBase);
  1305. mb();
  1306. writel(0, &regs->WinData);
  1307. mb();
  1308. }
  1309. writel(io, &regs->ExtIo);
  1310. mb();
  1311. eptr = (unsigned long)rr_read_eeprom_word(rrpriv,
  1312. &hw->rncd_info.AddrRunCodeSegs);
  1313. eptr = ((eptr & 0x1fffff) >> 3);
  1314. p2len = rr_read_eeprom_word(rrpriv, (void *)(0x83*4));
  1315. p2len = (p2len << 2);
  1316. p2size = rr_read_eeprom_word(rrpriv, (void *)(0x84*4));
  1317. p2size = ((p2size & 0x1fffff) >> 3);
  1318. if ((eptr < p2size) || (eptr > (p2size + p2len))){
  1319. printk("%s: eptr is invalid\n", dev->name);
  1320. goto out;
  1321. }
  1322. revision = rr_read_eeprom_word(rrpriv, &hw->manf.HeaderFmt);
  1323. if (revision != 1){
  1324. printk("%s: invalid firmware format (%i)\n",
  1325. dev->name, revision);
  1326. goto out;
  1327. }
  1328. nr_seg = rr_read_eeprom_word(rrpriv, (void *)eptr);
  1329. eptr +=4;
  1330. #if (DEBUG > 1)
  1331. printk("%s: nr_seg %i\n", dev->name, nr_seg);
  1332. #endif
  1333. for (i = 0; i < nr_seg; i++){
  1334. sptr = rr_read_eeprom_word(rrpriv, (void *)eptr);
  1335. eptr += 4;
  1336. len = rr_read_eeprom_word(rrpriv, (void *)eptr);
  1337. eptr += 4;
  1338. segptr = (unsigned long)rr_read_eeprom_word(rrpriv, (void *)eptr);
  1339. segptr = ((segptr & 0x1fffff) >> 3);
  1340. eptr += 4;
  1341. #if (DEBUG > 1)
  1342. printk("%s: segment %i, sram address %06x, length %04x, segptr %06x\n",
  1343. dev->name, i, sptr, len, segptr);
  1344. #endif
  1345. for (j = 0; j < len; j++){
  1346. tmp = rr_read_eeprom_word(rrpriv, (void *)segptr);
  1347. writel(sptr, &regs->WinBase);
  1348. mb();
  1349. writel(tmp, &regs->WinData);
  1350. mb();
  1351. segptr += 4;
  1352. sptr += 4;
  1353. }
  1354. }
  1355. out:
  1356. writel(localctrl, &regs->LocalCtrl);
  1357. mb();
  1358. return 0;
  1359. }
  1360. static int rr_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1361. {
  1362. struct rr_private *rrpriv;
  1363. unsigned char *image, *oldimage;
  1364. unsigned long flags;
  1365. unsigned int i;
  1366. int error = -EOPNOTSUPP;
  1367. rrpriv = netdev_priv(dev);
  1368. switch(cmd){
  1369. case SIOCRRGFW:
  1370. if (!capable(CAP_SYS_RAWIO)){
  1371. return -EPERM;
  1372. }
  1373. image = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1374. if (!image){
  1375. printk(KERN_ERR "%s: Unable to allocate memory "
  1376. "for EEPROM image\n", dev->name);
  1377. return -ENOMEM;
  1378. }
  1379. if (rrpriv->fw_running){
  1380. printk("%s: Firmware already running\n", dev->name);
  1381. error = -EPERM;
  1382. goto gf_out;
  1383. }
  1384. spin_lock_irqsave(&rrpriv->lock, flags);
  1385. i = rr_read_eeprom(rrpriv, 0, image, EEPROM_BYTES);
  1386. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1387. if (i != EEPROM_BYTES){
  1388. printk(KERN_ERR "%s: Error reading EEPROM\n",
  1389. dev->name);
  1390. error = -EFAULT;
  1391. goto gf_out;
  1392. }
  1393. error = copy_to_user(rq->ifr_data, image, EEPROM_BYTES);
  1394. if (error)
  1395. error = -EFAULT;
  1396. gf_out:
  1397. kfree(image);
  1398. return error;
  1399. case SIOCRRPFW:
  1400. if (!capable(CAP_SYS_RAWIO)){
  1401. return -EPERM;
  1402. }
  1403. image = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1404. oldimage = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1405. if (!image || !oldimage) {
  1406. printk(KERN_ERR "%s: Unable to allocate memory "
  1407. "for EEPROM image\n", dev->name);
  1408. error = -ENOMEM;
  1409. goto wf_out;
  1410. }
  1411. error = copy_from_user(image, rq->ifr_data, EEPROM_BYTES);
  1412. if (error) {
  1413. error = -EFAULT;
  1414. goto wf_out;
  1415. }
  1416. if (rrpriv->fw_running){
  1417. printk("%s: Firmware already running\n", dev->name);
  1418. error = -EPERM;
  1419. goto wf_out;
  1420. }
  1421. printk("%s: Updating EEPROM firmware\n", dev->name);
  1422. spin_lock_irqsave(&rrpriv->lock, flags);
  1423. error = write_eeprom(rrpriv, 0, image, EEPROM_BYTES);
  1424. if (error)
  1425. printk(KERN_ERR "%s: Error writing EEPROM\n",
  1426. dev->name);
  1427. i = rr_read_eeprom(rrpriv, 0, oldimage, EEPROM_BYTES);
  1428. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1429. if (i != EEPROM_BYTES)
  1430. printk(KERN_ERR "%s: Error reading back EEPROM "
  1431. "image\n", dev->name);
  1432. error = memcmp(image, oldimage, EEPROM_BYTES);
  1433. if (error){
  1434. printk(KERN_ERR "%s: Error verifying EEPROM image\n",
  1435. dev->name);
  1436. error = -EFAULT;
  1437. }
  1438. wf_out:
  1439. kfree(oldimage);
  1440. kfree(image);
  1441. return error;
  1442. case SIOCRRID:
  1443. return put_user(0x52523032, (int __user *)rq->ifr_data);
  1444. default:
  1445. return error;
  1446. }
  1447. }
  1448. static struct pci_device_id rr_pci_tbl[] = {
  1449. { PCI_VENDOR_ID_ESSENTIAL, PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER,
  1450. PCI_ANY_ID, PCI_ANY_ID, },
  1451. { 0,}
  1452. };
  1453. MODULE_DEVICE_TABLE(pci, rr_pci_tbl);
  1454. static struct pci_driver rr_driver = {
  1455. .name = "rrunner",
  1456. .id_table = rr_pci_tbl,
  1457. .probe = rr_init_one,
  1458. .remove = __devexit_p(rr_remove_one),
  1459. };
  1460. static int __init rr_init_module(void)
  1461. {
  1462. return pci_register_driver(&rr_driver);
  1463. }
  1464. static void __exit rr_cleanup_module(void)
  1465. {
  1466. pci_unregister_driver(&rr_driver);
  1467. }
  1468. module_init(rr_init_module);
  1469. module_exit(rr_cleanup_module);
  1470. /*
  1471. * Local variables:
  1472. * compile-command: "gcc -D__KERNEL__ -I../../include -Wall -Wstrict-prototypes -O2 -pipe -fomit-frame-pointer -fno-strength-reduce -m486 -malign-loops=2 -malign-jumps=2 -malign-functions=2 -DMODULE -DMODVERSIONS -include ../../include/linux/modversions.h -c rrunner.c"
  1473. * End:
  1474. */