eth16i.c 41 KB

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  1. /* eth16i.c An ICL EtherTeam 16i and 32 EISA ethernet driver for Linux
  2. Written 1994-1999 by Mika Kuoppala
  3. Copyright (C) 1994-1999 by Mika Kuoppala
  4. Based on skeleton.c and heavily on at1700.c by Donald Becker
  5. This software may be used and distributed according to the terms
  6. of the GNU General Public License, incorporated herein by reference.
  7. The author may be reached as miku@iki.fi
  8. This driver supports following cards :
  9. - ICL EtherTeam 16i
  10. - ICL EtherTeam 32 EISA
  11. (Uses true 32 bit transfers rather than 16i compability mode)
  12. Example Module usage:
  13. insmod eth16i.o io=0x2a0 mediatype=bnc
  14. mediatype can be one of the following: bnc,tp,dix,auto,eprom
  15. 'auto' will try to autoprobe mediatype.
  16. 'eprom' will use whatever type defined in eprom.
  17. I have benchmarked driver with PII/300Mhz as a ftp client
  18. and 486/33Mhz as a ftp server. Top speed was 1128.37 kilobytes/sec.
  19. Sources:
  20. - skeleton.c a sample network driver core for linux,
  21. written by Donald Becker <becker@scyld.com>
  22. - at1700.c a driver for Allied Telesis AT1700, written
  23. by Donald Becker.
  24. - e16iSRV.asm a Netware 3.X Server Driver for ICL EtherTeam16i
  25. written by Markku Viima
  26. - The Fujitsu MB86965 databook.
  27. Author thanks following persons due to their valueble assistance:
  28. Markku Viima (ICL)
  29. Ari Valve (ICL)
  30. Donald Becker
  31. Kurt Huwig <kurt@huwig.de>
  32. Revision history:
  33. Version Date Description
  34. 0.01 15.12-94 Initial version (card detection)
  35. 0.02 23.01-95 Interrupt is now hooked correctly
  36. 0.03 01.02-95 Rewrote initialization part
  37. 0.04 07.02-95 Base skeleton done...
  38. Made a few changes to signature checking
  39. to make it a bit reliable.
  40. - fixed bug in tx_buf mapping
  41. - fixed bug in initialization (DLC_EN
  42. wasn't enabled when initialization
  43. was done.)
  44. 0.05 08.02-95 If there were more than one packet to send,
  45. transmit was jammed due to invalid
  46. register write...now fixed
  47. 0.06 19.02-95 Rewrote interrupt handling
  48. 0.07 13.04-95 Wrote EEPROM read routines
  49. Card configuration now set according to
  50. data read from EEPROM
  51. 0.08 23.06-95 Wrote part that tries to probe used interface
  52. port if AUTO is selected
  53. 0.09 01.09-95 Added module support
  54. 0.10 04.09-95 Fixed receive packet allocation to work
  55. with kernels > 1.3.x
  56. 0.20 20.09-95 Added support for EtherTeam32 EISA
  57. 0.21 17.10-95 Removed the unnecessary extern
  58. init_etherdev() declaration. Some
  59. other cleanups.
  60. 0.22 22.02-96 Receive buffer was not flushed
  61. correctly when faulty packet was
  62. received. Now fixed.
  63. 0.23 26.02-96 Made resetting the adapter
  64. more reliable.
  65. 0.24 27.02-96 Rewrote faulty packet handling in eth16i_rx
  66. 0.25 22.05-96 kfree() was missing from cleanup_module.
  67. 0.26 11.06-96 Sometimes card was not found by
  68. check_signature(). Now made more reliable.
  69. 0.27 23.06-96 Oops. 16 consecutive collisions halted
  70. adapter. Now will try to retransmit
  71. MAX_COL_16 times before finally giving up.
  72. 0.28 28.10-97 Added dev_id parameter (NULL) for free_irq
  73. 0.29 29.10-97 Multiple card support for module users
  74. 0.30 30.10-97 Fixed irq allocation bug.
  75. (request_irq moved from probe to open)
  76. 0.30a 21.08-98 Card detection made more relaxed. Driver
  77. had problems with some TCP/IP-PROM boots
  78. to find the card. Suggested by
  79. Kurt Huwig <kurt@huwig.de>
  80. 0.31 28.08-98 Media interface port can now be selected
  81. with module parameters or kernel
  82. boot parameters.
  83. 0.32 31.08-98 IRQ was never freed if open/close
  84. pair wasn't called. Now fixed.
  85. 0.33 10.09-98 When eth16i_open() was called after
  86. eth16i_close() chip never recovered.
  87. Now more shallow reset is made on
  88. close.
  89. 0.34 29.06-99 Fixed one bad #ifdef.
  90. Changed ioaddr -> io for consistency
  91. 0.35 01.07-99 transmit,-receive bytes were never
  92. updated in stats.
  93. Bugs:
  94. In some cases the media interface autoprobing code doesn't find
  95. the correct interface type. In this case you can
  96. manually choose the interface type in DOS with E16IC.EXE which is
  97. configuration software for EtherTeam16i and EtherTeam32 cards.
  98. This is also true for IRQ setting. You cannot use module
  99. parameter to configure IRQ of the card (yet).
  100. To do:
  101. - Real multicast support
  102. - Rewrite the media interface autoprobing code. Its _horrible_ !
  103. - Possibly merge all the MB86965 specific code to external
  104. module for use by eth16.c and Donald's at1700.c
  105. - IRQ configuration with module parameter. I will do
  106. this when i will get enough info about setting
  107. irq without configuration utility.
  108. */
  109. static char *version =
  110. "eth16i.c: v0.35 01-Jul-1999 Mika Kuoppala (miku@iki.fi)\n";
  111. #include <linux/module.h>
  112. #include <linux/kernel.h>
  113. #include <linux/types.h>
  114. #include <linux/fcntl.h>
  115. #include <linux/interrupt.h>
  116. #include <linux/ioport.h>
  117. #include <linux/in.h>
  118. #include <linux/slab.h>
  119. #include <linux/string.h>
  120. #include <linux/errno.h>
  121. #include <linux/init.h>
  122. #include <linux/spinlock.h>
  123. #include <linux/netdevice.h>
  124. #include <linux/etherdevice.h>
  125. #include <linux/skbuff.h>
  126. #include <linux/bitops.h>
  127. #include <linux/jiffies.h>
  128. #include <linux/io.h>
  129. #include <asm/system.h>
  130. #include <asm/dma.h>
  131. /* Few macros */
  132. #define BIT(a) ( (1 << (a)) )
  133. #define BITSET(ioaddr, bnum) ((outb(((inb(ioaddr)) | (bnum)), ioaddr)))
  134. #define BITCLR(ioaddr, bnum) ((outb(((inb(ioaddr)) & (~(bnum))), ioaddr)))
  135. /* This is the I/O address space for Etherteam 16i adapter. */
  136. #define ETH16I_IO_EXTENT 32
  137. /* Ticks before deciding that transmit has timed out */
  138. #define TX_TIMEOUT (400*HZ/1000)
  139. /* Maximum loop count when receiving packets */
  140. #define MAX_RX_LOOP 20
  141. /* Some interrupt masks */
  142. #define ETH16I_INTR_ON 0xef8a /* Higher is receive mask */
  143. #define ETH16I_INTR_OFF 0x0000
  144. /* Buffers header status byte meanings */
  145. #define PKT_GOOD BIT(5)
  146. #define PKT_GOOD_RMT BIT(4)
  147. #define PKT_SHORT BIT(3)
  148. #define PKT_ALIGN_ERR BIT(2)
  149. #define PKT_CRC_ERR BIT(1)
  150. #define PKT_RX_BUF_OVERFLOW BIT(0)
  151. /* Transmit status register (DLCR0) */
  152. #define TX_STATUS_REG 0
  153. #define TX_DONE BIT(7)
  154. #define NET_BUSY BIT(6)
  155. #define TX_PKT_RCD BIT(5)
  156. #define CR_LOST BIT(4)
  157. #define TX_JABBER_ERR BIT(3)
  158. #define COLLISION BIT(2)
  159. #define COLLISIONS_16 BIT(1)
  160. /* Receive status register (DLCR1) */
  161. #define RX_STATUS_REG 1
  162. #define RX_PKT BIT(7) /* Packet received */
  163. #define BUS_RD_ERR BIT(6)
  164. #define SHORT_PKT_ERR BIT(3)
  165. #define ALIGN_ERR BIT(2)
  166. #define CRC_ERR BIT(1)
  167. #define RX_BUF_OVERFLOW BIT(0)
  168. /* Transmit Interrupt Enable Register (DLCR2) */
  169. #define TX_INTR_REG 2
  170. #define TX_INTR_DONE BIT(7)
  171. #define TX_INTR_COL BIT(2)
  172. #define TX_INTR_16_COL BIT(1)
  173. /* Receive Interrupt Enable Register (DLCR3) */
  174. #define RX_INTR_REG 3
  175. #define RX_INTR_RECEIVE BIT(7)
  176. #define RX_INTR_SHORT_PKT BIT(3)
  177. #define RX_INTR_CRC_ERR BIT(1)
  178. #define RX_INTR_BUF_OVERFLOW BIT(0)
  179. /* Transmit Mode Register (DLCR4) */
  180. #define TRANSMIT_MODE_REG 4
  181. #define LOOPBACK_CONTROL BIT(1)
  182. #define CONTROL_OUTPUT BIT(2)
  183. /* Receive Mode Register (DLCR5) */
  184. #define RECEIVE_MODE_REG 5
  185. #define RX_BUFFER_EMPTY BIT(6)
  186. #define ACCEPT_BAD_PACKETS BIT(5)
  187. #define RECEIVE_SHORT_ADDR BIT(4)
  188. #define ACCEPT_SHORT_PACKETS BIT(3)
  189. #define REMOTE_RESET BIT(2)
  190. #define ADDRESS_FILTER_MODE BIT(1) | BIT(0)
  191. #define REJECT_ALL 0
  192. #define ACCEPT_ALL 3
  193. #define MODE_1 1 /* NODE ID, BC, MC, 2-24th bit */
  194. #define MODE_2 2 /* NODE ID, BC, MC, Hash Table */
  195. /* Configuration Register 0 (DLCR6) */
  196. #define CONFIG_REG_0 6
  197. #define DLC_EN BIT(7)
  198. #define SRAM_CYCLE_TIME_100NS BIT(6)
  199. #define SYSTEM_BUS_WIDTH_8 BIT(5) /* 1 = 8bit, 0 = 16bit */
  200. #define BUFFER_WIDTH_8 BIT(4) /* 1 = 8bit, 0 = 16bit */
  201. #define TBS1 BIT(3)
  202. #define TBS0 BIT(2)
  203. #define SRAM_BS1 BIT(1) /* 00=8kb, 01=16kb */
  204. #define SRAM_BS0 BIT(0) /* 10=32kb, 11=64kb */
  205. #ifndef ETH16I_TX_BUF_SIZE /* 0 = 2kb, 1 = 4kb */
  206. #define ETH16I_TX_BUF_SIZE 3 /* 2 = 8kb, 3 = 16kb */
  207. #endif
  208. #define TX_BUF_1x2048 0
  209. #define TX_BUF_2x2048 1
  210. #define TX_BUF_2x4098 2
  211. #define TX_BUF_2x8192 3
  212. /* Configuration Register 1 (DLCR7) */
  213. #define CONFIG_REG_1 7
  214. #define POWERUP BIT(5)
  215. /* Transmit start register */
  216. #define TRANSMIT_START_REG 10
  217. #define TRANSMIT_START_RB 2
  218. #define TX_START BIT(7) /* Rest of register bit indicate*/
  219. /* number of packets in tx buffer*/
  220. /* Node ID registers (DLCR8-13) */
  221. #define NODE_ID_0 8
  222. #define NODE_ID_RB 0
  223. /* Hash Table registers (HT8-15) */
  224. #define HASH_TABLE_0 8
  225. #define HASH_TABLE_RB 1
  226. /* Buffer memory ports */
  227. #define BUFFER_MEM_PORT_LB 8
  228. #define DATAPORT BUFFER_MEM_PORT_LB
  229. #define BUFFER_MEM_PORT_HB 9
  230. /* 16 Collision control register (BMPR11) */
  231. #define COL_16_REG 11
  232. #define HALT_ON_16 0x00
  233. #define RETRANS_AND_HALT_ON_16 0x02
  234. /* Maximum number of attempts to send after 16 concecutive collisions */
  235. #define MAX_COL_16 10
  236. /* DMA Burst and Transceiver Mode Register (BMPR13) */
  237. #define TRANSCEIVER_MODE_REG 13
  238. #define TRANSCEIVER_MODE_RB 2
  239. #define IO_BASE_UNLOCK BIT(7)
  240. #define LOWER_SQUELCH_TRESH BIT(6)
  241. #define LINK_TEST_DISABLE BIT(5)
  242. #define AUI_SELECT BIT(4)
  243. #define DIS_AUTO_PORT_SEL BIT(3)
  244. /* Filter Self Receive Register (BMPR14) */
  245. #define FILTER_SELF_RX_REG 14
  246. #define SKIP_RX_PACKET BIT(2)
  247. #define FILTER_SELF_RECEIVE BIT(0)
  248. /* EEPROM Control Register (BMPR 16) */
  249. #define EEPROM_CTRL_REG 16
  250. /* EEPROM Data Register (BMPR 17) */
  251. #define EEPROM_DATA_REG 17
  252. /* NMC93CSx6 EEPROM Control Bits */
  253. #define CS_0 0x00
  254. #define CS_1 0x20
  255. #define SK_0 0x00
  256. #define SK_1 0x40
  257. #define DI_0 0x00
  258. #define DI_1 0x80
  259. /* NMC93CSx6 EEPROM Instructions */
  260. #define EEPROM_READ 0x80
  261. /* NMC93CSx6 EEPROM Addresses */
  262. #define E_NODEID_0 0x02
  263. #define E_NODEID_1 0x03
  264. #define E_NODEID_2 0x04
  265. #define E_PORT_SELECT 0x14
  266. #define E_PORT_BNC 0x00
  267. #define E_PORT_DIX 0x01
  268. #define E_PORT_TP 0x02
  269. #define E_PORT_AUTO 0x03
  270. #define E_PORT_FROM_EPROM 0x04
  271. #define E_PRODUCT_CFG 0x30
  272. /* Macro to slow down io between EEPROM clock transitions */
  273. #define eeprom_slow_io() do { int _i = 40; while(--_i > 0) { inb(0x80); }}while(0)
  274. /* Jumperless Configuration Register (BMPR19) */
  275. #define JUMPERLESS_CONFIG 19
  276. /* ID ROM registers, writing to them also resets some parts of chip */
  277. #define ID_ROM_0 24
  278. #define ID_ROM_7 31
  279. #define RESET ID_ROM_0
  280. /* This is the I/O address list to be probed when seeking the card */
  281. static unsigned int eth16i_portlist[] __initdata = {
  282. 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300, 0
  283. };
  284. static unsigned int eth32i_portlist[] __initdata = {
  285. 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000, 0x8000,
  286. 0x9000, 0xA000, 0xB000, 0xC000, 0xD000, 0xE000, 0xF000, 0
  287. };
  288. /* This is the Interrupt lookup table for Eth16i card */
  289. static unsigned int eth16i_irqmap[] __initdata = { 9, 10, 5, 15, 0 };
  290. #define NUM_OF_ISA_IRQS 4
  291. /* This is the Interrupt lookup table for Eth32i card */
  292. static unsigned int eth32i_irqmap[] __initdata = { 3, 5, 7, 9, 10, 11, 12, 15, 0 };
  293. #define EISA_IRQ_REG 0xc89
  294. #define NUM_OF_EISA_IRQS 8
  295. static unsigned int eth16i_tx_buf_map[] = { 2048, 2048, 4096, 8192 };
  296. /* Use 0 for production, 1 for verification, >2 for debug */
  297. #ifndef ETH16I_DEBUG
  298. #define ETH16I_DEBUG 0
  299. #endif
  300. static unsigned int eth16i_debug = ETH16I_DEBUG;
  301. /* Information for each board */
  302. struct eth16i_local {
  303. struct net_device_stats stats;
  304. unsigned char tx_started;
  305. unsigned char tx_buf_busy;
  306. unsigned short tx_queue; /* Number of packets in transmit buffer */
  307. unsigned short tx_queue_len;
  308. unsigned int tx_buf_size;
  309. unsigned long open_time;
  310. unsigned long tx_buffered_packets;
  311. unsigned long tx_buffered_bytes;
  312. unsigned long col_16;
  313. spinlock_t lock;
  314. };
  315. /* Function prototypes */
  316. static int eth16i_probe1(struct net_device *dev, int ioaddr);
  317. static int eth16i_check_signature(int ioaddr);
  318. static int eth16i_probe_port(int ioaddr);
  319. static void eth16i_set_port(int ioaddr, int porttype);
  320. static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l);
  321. static int eth16i_receive_probe_packet(int ioaddr);
  322. static int eth16i_get_irq(int ioaddr);
  323. static int eth16i_read_eeprom(int ioaddr, int offset);
  324. static int eth16i_read_eeprom_word(int ioaddr);
  325. static void eth16i_eeprom_cmd(int ioaddr, unsigned char command);
  326. static int eth16i_open(struct net_device *dev);
  327. static int eth16i_close(struct net_device *dev);
  328. static int eth16i_tx(struct sk_buff *skb, struct net_device *dev);
  329. static void eth16i_rx(struct net_device *dev);
  330. static void eth16i_timeout(struct net_device *dev);
  331. static irqreturn_t eth16i_interrupt(int irq, void *dev_id);
  332. static void eth16i_reset(struct net_device *dev);
  333. static void eth16i_timeout(struct net_device *dev);
  334. static void eth16i_skip_packet(struct net_device *dev);
  335. static void eth16i_multicast(struct net_device *dev);
  336. static void eth16i_select_regbank(unsigned char regbank, int ioaddr);
  337. static void eth16i_initialize(struct net_device *dev, int boot);
  338. #if 0
  339. static int eth16i_set_irq(struct net_device *dev);
  340. #endif
  341. #ifdef MODULE
  342. static ushort eth16i_parse_mediatype(const char* s);
  343. #endif
  344. static struct net_device_stats *eth16i_get_stats(struct net_device *dev);
  345. static char cardname[] __initdata = "ICL EtherTeam 16i/32";
  346. static int __init do_eth16i_probe(struct net_device *dev)
  347. {
  348. int i;
  349. int ioaddr;
  350. int base_addr = dev->base_addr;
  351. SET_MODULE_OWNER(dev);
  352. if(eth16i_debug > 4)
  353. printk(KERN_DEBUG "Probing started for %s\n", cardname);
  354. if(base_addr > 0x1ff) /* Check only single location */
  355. return eth16i_probe1(dev, base_addr);
  356. else if(base_addr != 0) /* Don't probe at all */
  357. return -ENXIO;
  358. /* Seek card from the ISA io address space */
  359. for(i = 0; (ioaddr = eth16i_portlist[i]) ; i++)
  360. if(eth16i_probe1(dev, ioaddr) == 0)
  361. return 0;
  362. /* Seek card from the EISA io address space */
  363. for(i = 0; (ioaddr = eth32i_portlist[i]) ; i++)
  364. if(eth16i_probe1(dev, ioaddr) == 0)
  365. return 0;
  366. return -ENODEV;
  367. }
  368. #ifndef MODULE
  369. struct net_device * __init eth16i_probe(int unit)
  370. {
  371. struct net_device *dev = alloc_etherdev(sizeof(struct eth16i_local));
  372. int err;
  373. if (!dev)
  374. return ERR_PTR(-ENOMEM);
  375. sprintf(dev->name, "eth%d", unit);
  376. netdev_boot_setup_check(dev);
  377. err = do_eth16i_probe(dev);
  378. if (err)
  379. goto out;
  380. return dev;
  381. out:
  382. free_netdev(dev);
  383. return ERR_PTR(err);
  384. }
  385. #endif
  386. static int __init eth16i_probe1(struct net_device *dev, int ioaddr)
  387. {
  388. struct eth16i_local *lp = netdev_priv(dev);
  389. static unsigned version_printed;
  390. int retval;
  391. /* Let's grab the region */
  392. if (!request_region(ioaddr, ETH16I_IO_EXTENT, cardname))
  393. return -EBUSY;
  394. /*
  395. The MB86985 chip has on register which holds information in which
  396. io address the chip lies. First read this register and compare
  397. it to our current io address and if match then this could
  398. be our chip.
  399. */
  400. if(ioaddr < 0x1000) {
  401. if(eth16i_portlist[(inb(ioaddr + JUMPERLESS_CONFIG) & 0x07)]
  402. != ioaddr) {
  403. retval = -ENODEV;
  404. goto out;
  405. }
  406. }
  407. /* Now we will go a bit deeper and try to find the chip's signature */
  408. if(eth16i_check_signature(ioaddr) != 0) {
  409. retval = -ENODEV;
  410. goto out;
  411. }
  412. /*
  413. Now it seems that we have found a ethernet chip in this particular
  414. ioaddr. The MB86985 chip has this feature, that when you read a
  415. certain register it will increase it's io base address to next
  416. configurable slot. Now when we have found the chip, first thing is
  417. to make sure that the chip's ioaddr will hold still here.
  418. */
  419. eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
  420. outb(0x00, ioaddr + TRANSCEIVER_MODE_REG);
  421. outb(0x00, ioaddr + RESET); /* Reset some parts of chip */
  422. BITSET(ioaddr + CONFIG_REG_0, BIT(7)); /* Disable the data link */
  423. if( (eth16i_debug & version_printed++) == 0)
  424. printk(KERN_INFO "%s", version);
  425. dev->base_addr = ioaddr;
  426. dev->irq = eth16i_get_irq(ioaddr);
  427. /* Try to obtain interrupt vector */
  428. if ((retval = request_irq(dev->irq, (void *)&eth16i_interrupt, 0, cardname, dev))) {
  429. printk(KERN_WARNING "%s at %#3x, but is unusable due to conflicting IRQ %d.\n",
  430. cardname, ioaddr, dev->irq);
  431. goto out;
  432. }
  433. printk(KERN_INFO "%s: %s at %#3x, IRQ %d, ",
  434. dev->name, cardname, ioaddr, dev->irq);
  435. /* Now we will have to lock the chip's io address */
  436. eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
  437. outb(0x38, ioaddr + TRANSCEIVER_MODE_REG);
  438. eth16i_initialize(dev, 1); /* Initialize rest of the chip's registers */
  439. /* Now let's same some energy by shutting down the chip ;) */
  440. BITCLR(ioaddr + CONFIG_REG_1, POWERUP);
  441. /* Initialize the device structure */
  442. memset(lp, 0, sizeof(struct eth16i_local));
  443. dev->open = eth16i_open;
  444. dev->stop = eth16i_close;
  445. dev->hard_start_xmit = eth16i_tx;
  446. dev->get_stats = eth16i_get_stats;
  447. dev->set_multicast_list = eth16i_multicast;
  448. dev->tx_timeout = eth16i_timeout;
  449. dev->watchdog_timeo = TX_TIMEOUT;
  450. spin_lock_init(&lp->lock);
  451. retval = register_netdev(dev);
  452. if (retval)
  453. goto out1;
  454. return 0;
  455. out1:
  456. free_irq(dev->irq, dev);
  457. out:
  458. release_region(ioaddr, ETH16I_IO_EXTENT);
  459. return retval;
  460. }
  461. static void eth16i_initialize(struct net_device *dev, int boot)
  462. {
  463. int ioaddr = dev->base_addr;
  464. int i, node_w = 0;
  465. unsigned char node_byte = 0;
  466. /* Setup station address */
  467. eth16i_select_regbank(NODE_ID_RB, ioaddr);
  468. for(i = 0 ; i < 3 ; i++) {
  469. unsigned short node_val = eth16i_read_eeprom(ioaddr, E_NODEID_0 + i);
  470. ((unsigned short *)dev->dev_addr)[i] = ntohs(node_val);
  471. }
  472. for(i = 0; i < 6; i++) {
  473. outb( ((unsigned char *)dev->dev_addr)[i], ioaddr + NODE_ID_0 + i);
  474. if(boot) {
  475. printk("%02x", inb(ioaddr + NODE_ID_0 + i));
  476. if(i != 5)
  477. printk(":");
  478. }
  479. }
  480. /* Now we will set multicast addresses to accept none */
  481. eth16i_select_regbank(HASH_TABLE_RB, ioaddr);
  482. for(i = 0; i < 8; i++)
  483. outb(0x00, ioaddr + HASH_TABLE_0 + i);
  484. /*
  485. Now let's disable the transmitter and receiver, set the buffer ram
  486. cycle time, bus width and buffer data path width. Also we shall
  487. set transmit buffer size and total buffer size.
  488. */
  489. eth16i_select_regbank(2, ioaddr);
  490. node_byte = 0;
  491. node_w = eth16i_read_eeprom(ioaddr, E_PRODUCT_CFG);
  492. if( (node_w & 0xFF00) == 0x0800)
  493. node_byte |= BUFFER_WIDTH_8;
  494. node_byte |= SRAM_BS1;
  495. if( (node_w & 0x00FF) == 64)
  496. node_byte |= SRAM_BS0;
  497. node_byte |= DLC_EN | SRAM_CYCLE_TIME_100NS | (ETH16I_TX_BUF_SIZE << 2);
  498. outb(node_byte, ioaddr + CONFIG_REG_0);
  499. /* We shall halt the transmitting, if 16 collisions are detected */
  500. outb(HALT_ON_16, ioaddr + COL_16_REG);
  501. #ifdef MODULE
  502. /* if_port already set by init_module() */
  503. #else
  504. dev->if_port = (dev->mem_start < E_PORT_FROM_EPROM) ?
  505. dev->mem_start : E_PORT_FROM_EPROM;
  506. #endif
  507. /* Set interface port type */
  508. if(boot) {
  509. char *porttype[] = {"BNC", "DIX", "TP", "AUTO", "FROM_EPROM" };
  510. switch(dev->if_port)
  511. {
  512. case E_PORT_FROM_EPROM:
  513. dev->if_port = eth16i_read_eeprom(ioaddr, E_PORT_SELECT);
  514. break;
  515. case E_PORT_AUTO:
  516. dev->if_port = eth16i_probe_port(ioaddr);
  517. break;
  518. case E_PORT_BNC:
  519. case E_PORT_TP:
  520. case E_PORT_DIX:
  521. break;
  522. }
  523. printk(" %s interface.\n", porttype[dev->if_port]);
  524. eth16i_set_port(ioaddr, dev->if_port);
  525. }
  526. /* Set Receive Mode to normal operation */
  527. outb(MODE_2, ioaddr + RECEIVE_MODE_REG);
  528. }
  529. static int eth16i_probe_port(int ioaddr)
  530. {
  531. int i;
  532. int retcode;
  533. unsigned char dummy_packet[64];
  534. /* Powerup the chip */
  535. outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
  536. BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
  537. eth16i_select_regbank(NODE_ID_RB, ioaddr);
  538. for(i = 0; i < 6; i++) {
  539. dummy_packet[i] = inb(ioaddr + NODE_ID_0 + i);
  540. dummy_packet[i+6] = inb(ioaddr + NODE_ID_0 + i);
  541. }
  542. dummy_packet[12] = 0x00;
  543. dummy_packet[13] = 0x04;
  544. memset(dummy_packet + 14, 0, sizeof(dummy_packet) - 14);
  545. eth16i_select_regbank(2, ioaddr);
  546. for(i = 0; i < 3; i++) {
  547. BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
  548. BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
  549. eth16i_set_port(ioaddr, i);
  550. if(eth16i_debug > 1)
  551. printk(KERN_DEBUG "Set port number %d\n", i);
  552. retcode = eth16i_send_probe_packet(ioaddr, dummy_packet, 64);
  553. if(retcode == 0) {
  554. retcode = eth16i_receive_probe_packet(ioaddr);
  555. if(retcode != -1) {
  556. if(eth16i_debug > 1)
  557. printk(KERN_DEBUG "Eth16i interface port found at %d\n", i);
  558. return i;
  559. }
  560. }
  561. else {
  562. if(eth16i_debug > 1)
  563. printk(KERN_DEBUG "TRANSMIT_DONE timeout when probing interface port\n");
  564. }
  565. }
  566. if( eth16i_debug > 1)
  567. printk(KERN_DEBUG "Using default port\n");
  568. return E_PORT_BNC;
  569. }
  570. static void eth16i_set_port(int ioaddr, int porttype)
  571. {
  572. unsigned short temp = 0;
  573. eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
  574. outb(LOOPBACK_CONTROL, ioaddr + TRANSMIT_MODE_REG);
  575. temp |= DIS_AUTO_PORT_SEL;
  576. switch(porttype) {
  577. case E_PORT_BNC :
  578. temp |= AUI_SELECT;
  579. break;
  580. case E_PORT_TP :
  581. break;
  582. case E_PORT_DIX :
  583. temp |= AUI_SELECT;
  584. BITSET(ioaddr + TRANSMIT_MODE_REG, CONTROL_OUTPUT);
  585. break;
  586. }
  587. outb(temp, ioaddr + TRANSCEIVER_MODE_REG);
  588. if(eth16i_debug > 1) {
  589. printk(KERN_DEBUG "TRANSMIT_MODE_REG = %x\n", inb(ioaddr + TRANSMIT_MODE_REG));
  590. printk(KERN_DEBUG "TRANSCEIVER_MODE_REG = %x\n",
  591. inb(ioaddr+TRANSCEIVER_MODE_REG));
  592. }
  593. }
  594. static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l)
  595. {
  596. unsigned long starttime;
  597. outb(0xff, ioaddr + TX_STATUS_REG);
  598. outw(l, ioaddr + DATAPORT);
  599. outsw(ioaddr + DATAPORT, (unsigned short *)b, (l + 1) >> 1);
  600. starttime = jiffies;
  601. outb(TX_START | 1, ioaddr + TRANSMIT_START_REG);
  602. while( (inb(ioaddr + TX_STATUS_REG) & 0x80) == 0) {
  603. if( time_after(jiffies, starttime + TX_TIMEOUT)) {
  604. return -1;
  605. }
  606. }
  607. return 0;
  608. }
  609. static int eth16i_receive_probe_packet(int ioaddr)
  610. {
  611. unsigned long starttime;
  612. starttime = jiffies;
  613. while((inb(ioaddr + TX_STATUS_REG) & 0x20) == 0) {
  614. if( time_after(jiffies, starttime + TX_TIMEOUT)) {
  615. if(eth16i_debug > 1)
  616. printk(KERN_DEBUG "Timeout occurred waiting transmit packet received\n");
  617. starttime = jiffies;
  618. while((inb(ioaddr + RX_STATUS_REG) & 0x80) == 0) {
  619. if( time_after(jiffies, starttime + TX_TIMEOUT)) {
  620. if(eth16i_debug > 1)
  621. printk(KERN_DEBUG "Timeout occurred waiting receive packet\n");
  622. return -1;
  623. }
  624. }
  625. if(eth16i_debug > 1)
  626. printk(KERN_DEBUG "RECEIVE_PACKET\n");
  627. return(0); /* Found receive packet */
  628. }
  629. }
  630. if(eth16i_debug > 1) {
  631. printk(KERN_DEBUG "TRANSMIT_PACKET_RECEIVED %x\n", inb(ioaddr + TX_STATUS_REG));
  632. printk(KERN_DEBUG "RX_STATUS_REG = %x\n", inb(ioaddr + RX_STATUS_REG));
  633. }
  634. return(0); /* Return success */
  635. }
  636. #if 0
  637. static int eth16i_set_irq(struct net_device* dev)
  638. {
  639. const int ioaddr = dev->base_addr;
  640. const int irq = dev->irq;
  641. int i = 0;
  642. if(ioaddr < 0x1000) {
  643. while(eth16i_irqmap[i] && eth16i_irqmap[i] != irq)
  644. i++;
  645. if(i < NUM_OF_ISA_IRQS) {
  646. u8 cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
  647. cbyte = (cbyte & 0x3F) | (i << 6);
  648. outb(cbyte, ioaddr + JUMPERLESS_CONFIG);
  649. return 0;
  650. }
  651. }
  652. else {
  653. printk(KERN_NOTICE "%s: EISA Interrupt cannot be set. Use EISA Configuration utility.\n", dev->name);
  654. }
  655. return -1;
  656. }
  657. #endif
  658. static int __init eth16i_get_irq(int ioaddr)
  659. {
  660. unsigned char cbyte;
  661. if( ioaddr < 0x1000) {
  662. cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
  663. return( eth16i_irqmap[ ((cbyte & 0xC0) >> 6) ] );
  664. } else { /* Oh..the card is EISA so method getting IRQ different */
  665. unsigned short index = 0;
  666. cbyte = inb(ioaddr + EISA_IRQ_REG);
  667. while( (cbyte & 0x01) == 0) {
  668. cbyte = cbyte >> 1;
  669. index++;
  670. }
  671. return( eth32i_irqmap[ index ] );
  672. }
  673. }
  674. static int __init eth16i_check_signature(int ioaddr)
  675. {
  676. int i;
  677. unsigned char creg[4] = { 0 };
  678. for(i = 0; i < 4 ; i++) {
  679. creg[i] = inb(ioaddr + TRANSMIT_MODE_REG + i);
  680. if(eth16i_debug > 1)
  681. printk("eth16i: read signature byte %x at %x\n",
  682. creg[i],
  683. ioaddr + TRANSMIT_MODE_REG + i);
  684. }
  685. creg[0] &= 0x0F; /* Mask collision cnr */
  686. creg[2] &= 0x7F; /* Mask DCLEN bit */
  687. #if 0
  688. /*
  689. This was removed because the card was sometimes left to state
  690. from which it couldn't be find anymore. If there is need
  691. to more strict check still this have to be fixed.
  692. */
  693. if( ! ((creg[0] == 0x06) && (creg[1] == 0x41)) ) {
  694. if(creg[1] != 0x42)
  695. return -1;
  696. }
  697. #endif
  698. if( !((creg[2] == 0x36) && (creg[3] == 0xE0)) ) {
  699. creg[2] &= 0x40;
  700. creg[3] &= 0x03;
  701. if( !((creg[2] == 0x40) && (creg[3] == 0x00)) )
  702. return -1;
  703. }
  704. if(eth16i_read_eeprom(ioaddr, E_NODEID_0) != 0)
  705. return -1;
  706. if((eth16i_read_eeprom(ioaddr, E_NODEID_1) & 0xFF00) != 0x4B00)
  707. return -1;
  708. return 0;
  709. }
  710. static int eth16i_read_eeprom(int ioaddr, int offset)
  711. {
  712. int data = 0;
  713. eth16i_eeprom_cmd(ioaddr, EEPROM_READ | offset);
  714. outb(CS_1, ioaddr + EEPROM_CTRL_REG);
  715. data = eth16i_read_eeprom_word(ioaddr);
  716. outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
  717. return(data);
  718. }
  719. static int eth16i_read_eeprom_word(int ioaddr)
  720. {
  721. int i;
  722. int data = 0;
  723. for(i = 16; i > 0; i--) {
  724. outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
  725. eeprom_slow_io();
  726. outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
  727. eeprom_slow_io();
  728. data = (data << 1) |
  729. ((inb(ioaddr + EEPROM_DATA_REG) & DI_1) ? 1 : 0);
  730. eeprom_slow_io();
  731. }
  732. return(data);
  733. }
  734. static void eth16i_eeprom_cmd(int ioaddr, unsigned char command)
  735. {
  736. int i;
  737. outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
  738. outb(DI_0, ioaddr + EEPROM_DATA_REG);
  739. outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
  740. outb(DI_1, ioaddr + EEPROM_DATA_REG);
  741. outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
  742. for(i = 7; i >= 0; i--) {
  743. short cmd = ( (command & (1 << i)) ? DI_1 : DI_0 );
  744. outb(cmd, ioaddr + EEPROM_DATA_REG);
  745. outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
  746. eeprom_slow_io();
  747. outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
  748. eeprom_slow_io();
  749. }
  750. }
  751. static int eth16i_open(struct net_device *dev)
  752. {
  753. struct eth16i_local *lp = netdev_priv(dev);
  754. int ioaddr = dev->base_addr;
  755. /* Powerup the chip */
  756. outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
  757. /* Initialize the chip */
  758. eth16i_initialize(dev, 0);
  759. /* Set the transmit buffer size */
  760. lp->tx_buf_size = eth16i_tx_buf_map[ETH16I_TX_BUF_SIZE & 0x03];
  761. if(eth16i_debug > 0)
  762. printk(KERN_DEBUG "%s: transmit buffer size %d\n",
  763. dev->name, lp->tx_buf_size);
  764. /* Now enable Transmitter and Receiver sections */
  765. BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
  766. /* Now switch to register bank 2, for run time operation */
  767. eth16i_select_regbank(2, ioaddr);
  768. lp->open_time = jiffies;
  769. lp->tx_started = 0;
  770. lp->tx_queue = 0;
  771. lp->tx_queue_len = 0;
  772. /* Turn on interrupts*/
  773. outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
  774. netif_start_queue(dev);
  775. return 0;
  776. }
  777. static int eth16i_close(struct net_device *dev)
  778. {
  779. struct eth16i_local *lp = netdev_priv(dev);
  780. int ioaddr = dev->base_addr;
  781. eth16i_reset(dev);
  782. /* Turn off interrupts*/
  783. outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
  784. netif_stop_queue(dev);
  785. lp->open_time = 0;
  786. /* Disable transmit and receive */
  787. BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
  788. /* Reset the chip */
  789. /* outb(0xff, ioaddr + RESET); */
  790. /* outw(0xffff, ioaddr + TX_STATUS_REG); */
  791. outb(0x00, ioaddr + CONFIG_REG_1);
  792. return 0;
  793. }
  794. static void eth16i_timeout(struct net_device *dev)
  795. {
  796. struct eth16i_local *lp = netdev_priv(dev);
  797. int ioaddr = dev->base_addr;
  798. /*
  799. If we get here, some higher level has decided that
  800. we are broken. There should really be a "kick me"
  801. function call instead.
  802. */
  803. outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
  804. printk(KERN_WARNING "%s: transmit timed out with status %04x, %s ?\n",
  805. dev->name,
  806. inw(ioaddr + TX_STATUS_REG), (inb(ioaddr + TX_STATUS_REG) & TX_DONE) ?
  807. "IRQ conflict" : "network cable problem");
  808. dev->trans_start = jiffies;
  809. /* Let's dump all registers */
  810. if(eth16i_debug > 0) {
  811. printk(KERN_DEBUG "%s: timeout: %02x %02x %02x %02x %02x %02x %02x %02x.\n",
  812. dev->name, inb(ioaddr + 0),
  813. inb(ioaddr + 1), inb(ioaddr + 2),
  814. inb(ioaddr + 3), inb(ioaddr + 4),
  815. inb(ioaddr + 5),
  816. inb(ioaddr + 6), inb(ioaddr + 7));
  817. printk(KERN_DEBUG "%s: transmit start reg: %02x. collision reg %02x\n",
  818. dev->name, inb(ioaddr + TRANSMIT_START_REG),
  819. inb(ioaddr + COL_16_REG));
  820. printk(KERN_DEBUG "lp->tx_queue = %d\n", lp->tx_queue);
  821. printk(KERN_DEBUG "lp->tx_queue_len = %d\n", lp->tx_queue_len);
  822. printk(KERN_DEBUG "lp->tx_started = %d\n", lp->tx_started);
  823. }
  824. lp->stats.tx_errors++;
  825. eth16i_reset(dev);
  826. dev->trans_start = jiffies;
  827. outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
  828. netif_wake_queue(dev);
  829. }
  830. static int eth16i_tx(struct sk_buff *skb, struct net_device *dev)
  831. {
  832. struct eth16i_local *lp = netdev_priv(dev);
  833. int ioaddr = dev->base_addr;
  834. int status = 0;
  835. ushort length = skb->len;
  836. unsigned char *buf;
  837. unsigned long flags;
  838. if (length < ETH_ZLEN) {
  839. if (skb_padto(skb, ETH_ZLEN))
  840. return 0;
  841. length = ETH_ZLEN;
  842. }
  843. buf = skb->data;
  844. netif_stop_queue(dev);
  845. /* Turn off TX interrupts */
  846. outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
  847. /* We would be better doing the disable_irq tricks the 3c509 does,
  848. that would make this suck a lot less */
  849. spin_lock_irqsave(&lp->lock, flags);
  850. if( (length + 2) > (lp->tx_buf_size - lp->tx_queue_len)) {
  851. if(eth16i_debug > 0)
  852. printk(KERN_WARNING "%s: Transmit buffer full.\n", dev->name);
  853. }
  854. else {
  855. outw(length, ioaddr + DATAPORT);
  856. if( ioaddr < 0x1000 )
  857. outsw(ioaddr + DATAPORT, buf, (length + 1) >> 1);
  858. else {
  859. unsigned char frag = length % 4;
  860. outsl(ioaddr + DATAPORT, buf, length >> 2);
  861. if( frag != 0 ) {
  862. outsw(ioaddr + DATAPORT, (buf + (length & 0xFFFC)), 1);
  863. if( frag == 3 )
  864. outsw(ioaddr + DATAPORT,
  865. (buf + (length & 0xFFFC) + 2), 1);
  866. }
  867. }
  868. lp->tx_buffered_packets++;
  869. lp->tx_buffered_bytes = length;
  870. lp->tx_queue++;
  871. lp->tx_queue_len += length + 2;
  872. }
  873. lp->tx_buf_busy = 0;
  874. if(lp->tx_started == 0) {
  875. /* If the transmitter is idle..always trigger a transmit */
  876. outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
  877. lp->tx_queue = 0;
  878. lp->tx_queue_len = 0;
  879. dev->trans_start = jiffies;
  880. lp->tx_started = 1;
  881. netif_wake_queue(dev);
  882. }
  883. else if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
  884. /* There is still more room for one more packet in tx buffer */
  885. netif_wake_queue(dev);
  886. }
  887. spin_unlock_irqrestore(&lp->lock, flags);
  888. outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
  889. /* Turn TX interrupts back on */
  890. /* outb(TX_INTR_DONE | TX_INTR_16_COL, ioaddr + TX_INTR_REG); */
  891. status = 0;
  892. dev_kfree_skb(skb);
  893. return 0;
  894. }
  895. static void eth16i_rx(struct net_device *dev)
  896. {
  897. struct eth16i_local *lp = netdev_priv(dev);
  898. int ioaddr = dev->base_addr;
  899. int boguscount = MAX_RX_LOOP;
  900. /* Loop until all packets have been read */
  901. while( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) {
  902. /* Read status byte from receive buffer */
  903. ushort status = inw(ioaddr + DATAPORT);
  904. /* Get the size of the packet from receive buffer */
  905. ushort pkt_len = inw(ioaddr + DATAPORT);
  906. if(eth16i_debug > 4)
  907. printk(KERN_DEBUG "%s: Receiving packet mode %02x status %04x.\n",
  908. dev->name,
  909. inb(ioaddr + RECEIVE_MODE_REG), status);
  910. if( !(status & PKT_GOOD) ) {
  911. lp->stats.rx_errors++;
  912. if( (pkt_len < ETH_ZLEN) || (pkt_len > ETH_FRAME_LEN) ) {
  913. lp->stats.rx_length_errors++;
  914. eth16i_reset(dev);
  915. return;
  916. }
  917. else {
  918. eth16i_skip_packet(dev);
  919. lp->stats.rx_dropped++;
  920. }
  921. }
  922. else { /* Ok so now we should have a good packet */
  923. struct sk_buff *skb;
  924. skb = dev_alloc_skb(pkt_len + 3);
  925. if( skb == NULL ) {
  926. printk(KERN_WARNING "%s: Could'n allocate memory for packet (len %d)\n",
  927. dev->name, pkt_len);
  928. eth16i_skip_packet(dev);
  929. lp->stats.rx_dropped++;
  930. break;
  931. }
  932. skb->dev = dev;
  933. skb_reserve(skb,2);
  934. /*
  935. Now let's get the packet out of buffer.
  936. size is (pkt_len + 1) >> 1, cause we are now reading words
  937. and it have to be even aligned.
  938. */
  939. if(ioaddr < 0x1000)
  940. insw(ioaddr + DATAPORT, skb_put(skb, pkt_len),
  941. (pkt_len + 1) >> 1);
  942. else {
  943. unsigned char *buf = skb_put(skb, pkt_len);
  944. unsigned char frag = pkt_len % 4;
  945. insl(ioaddr + DATAPORT, buf, pkt_len >> 2);
  946. if(frag != 0) {
  947. unsigned short rest[2];
  948. rest[0] = inw( ioaddr + DATAPORT );
  949. if(frag == 3)
  950. rest[1] = inw( ioaddr + DATAPORT );
  951. memcpy(buf + (pkt_len & 0xfffc), (char *)rest, frag);
  952. }
  953. }
  954. skb->protocol=eth_type_trans(skb, dev);
  955. if( eth16i_debug > 5 ) {
  956. int i;
  957. printk(KERN_DEBUG "%s: Received packet of length %d.\n",
  958. dev->name, pkt_len);
  959. for(i = 0; i < 14; i++)
  960. printk(KERN_DEBUG " %02x", skb->data[i]);
  961. printk(KERN_DEBUG ".\n");
  962. }
  963. netif_rx(skb);
  964. dev->last_rx = jiffies;
  965. lp->stats.rx_packets++;
  966. lp->stats.rx_bytes += pkt_len;
  967. } /* else */
  968. if(--boguscount <= 0)
  969. break;
  970. } /* while */
  971. }
  972. static irqreturn_t eth16i_interrupt(int irq, void *dev_id)
  973. {
  974. struct net_device *dev = dev_id;
  975. struct eth16i_local *lp;
  976. int ioaddr = 0, status;
  977. int handled = 0;
  978. ioaddr = dev->base_addr;
  979. lp = netdev_priv(dev);
  980. /* Turn off all interrupts from adapter */
  981. outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
  982. /* eth16i_tx won't be called */
  983. spin_lock(&lp->lock);
  984. status = inw(ioaddr + TX_STATUS_REG); /* Get the status */
  985. outw(status, ioaddr + TX_STATUS_REG); /* Clear status bits */
  986. if (status)
  987. handled = 1;
  988. if(eth16i_debug > 3)
  989. printk(KERN_DEBUG "%s: Interrupt with status %04x.\n", dev->name, status);
  990. if( status & 0x7f00 ) {
  991. lp->stats.rx_errors++;
  992. if(status & (BUS_RD_ERR << 8) )
  993. printk(KERN_WARNING "%s: Bus read error.\n",dev->name);
  994. if(status & (SHORT_PKT_ERR << 8) ) lp->stats.rx_length_errors++;
  995. if(status & (ALIGN_ERR << 8) ) lp->stats.rx_frame_errors++;
  996. if(status & (CRC_ERR << 8) ) lp->stats.rx_crc_errors++;
  997. if(status & (RX_BUF_OVERFLOW << 8) ) lp->stats.rx_over_errors++;
  998. }
  999. if( status & 0x001a) {
  1000. lp->stats.tx_errors++;
  1001. if(status & CR_LOST) lp->stats.tx_carrier_errors++;
  1002. if(status & TX_JABBER_ERR) lp->stats.tx_window_errors++;
  1003. #if 0
  1004. if(status & COLLISION) {
  1005. lp->stats.collisions +=
  1006. ((inb(ioaddr+TRANSMIT_MODE_REG) & 0xF0) >> 4);
  1007. }
  1008. #endif
  1009. if(status & COLLISIONS_16) {
  1010. if(lp->col_16 < MAX_COL_16) {
  1011. lp->col_16++;
  1012. lp->stats.collisions++;
  1013. /* Resume transmitting, skip failed packet */
  1014. outb(0x02, ioaddr + COL_16_REG);
  1015. }
  1016. else {
  1017. printk(KERN_WARNING "%s: bailing out due to many consecutive 16-in-a-row collisions. Network cable problem?\n", dev->name);
  1018. }
  1019. }
  1020. }
  1021. if( status & 0x00ff ) { /* Let's check the transmit status reg */
  1022. if(status & TX_DONE) { /* The transmit has been done */
  1023. lp->stats.tx_packets = lp->tx_buffered_packets;
  1024. lp->stats.tx_bytes += lp->tx_buffered_bytes;
  1025. lp->col_16 = 0;
  1026. if(lp->tx_queue) { /* Is there still packets ? */
  1027. /* There was packet(s) so start transmitting and write also
  1028. how many packets there is to be sended */
  1029. outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
  1030. lp->tx_queue = 0;
  1031. lp->tx_queue_len = 0;
  1032. lp->tx_started = 1;
  1033. }
  1034. else {
  1035. lp->tx_started = 0;
  1036. }
  1037. netif_wake_queue(dev);
  1038. }
  1039. }
  1040. if( ( status & 0x8000 ) ||
  1041. ( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) ) {
  1042. eth16i_rx(dev); /* We have packet in receive buffer */
  1043. }
  1044. /* Turn interrupts back on */
  1045. outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
  1046. if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
  1047. /* There is still more room for one more packet in tx buffer */
  1048. netif_wake_queue(dev);
  1049. }
  1050. spin_unlock(&lp->lock);
  1051. return IRQ_RETVAL(handled);
  1052. }
  1053. static void eth16i_skip_packet(struct net_device *dev)
  1054. {
  1055. int ioaddr = dev->base_addr;
  1056. inw(ioaddr + DATAPORT);
  1057. inw(ioaddr + DATAPORT);
  1058. inw(ioaddr + DATAPORT);
  1059. outb(SKIP_RX_PACKET, ioaddr + FILTER_SELF_RX_REG);
  1060. while( inb( ioaddr + FILTER_SELF_RX_REG ) != 0);
  1061. }
  1062. static void eth16i_reset(struct net_device *dev)
  1063. {
  1064. struct eth16i_local *lp = netdev_priv(dev);
  1065. int ioaddr = dev->base_addr;
  1066. if(eth16i_debug > 1)
  1067. printk(KERN_DEBUG "%s: Resetting device.\n", dev->name);
  1068. BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
  1069. outw(0xffff, ioaddr + TX_STATUS_REG);
  1070. eth16i_select_regbank(2, ioaddr);
  1071. lp->tx_started = 0;
  1072. lp->tx_buf_busy = 0;
  1073. lp->tx_queue = 0;
  1074. lp->tx_queue_len = 0;
  1075. BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
  1076. }
  1077. static void eth16i_multicast(struct net_device *dev)
  1078. {
  1079. int ioaddr = dev->base_addr;
  1080. if(dev->mc_count || dev->flags&(IFF_ALLMULTI|IFF_PROMISC))
  1081. {
  1082. dev->flags|=IFF_PROMISC; /* Must do this */
  1083. outb(3, ioaddr + RECEIVE_MODE_REG);
  1084. } else {
  1085. outb(2, ioaddr + RECEIVE_MODE_REG);
  1086. }
  1087. }
  1088. static struct net_device_stats *eth16i_get_stats(struct net_device *dev)
  1089. {
  1090. struct eth16i_local *lp = netdev_priv(dev);
  1091. return &lp->stats;
  1092. }
  1093. static void eth16i_select_regbank(unsigned char banknbr, int ioaddr)
  1094. {
  1095. unsigned char data;
  1096. data = inb(ioaddr + CONFIG_REG_1);
  1097. outb( ((data & 0xF3) | ( (banknbr & 0x03) << 2)), ioaddr + CONFIG_REG_1);
  1098. }
  1099. #ifdef MODULE
  1100. static ushort eth16i_parse_mediatype(const char* s)
  1101. {
  1102. if(!s)
  1103. return E_PORT_FROM_EPROM;
  1104. if (!strncmp(s, "bnc", 3))
  1105. return E_PORT_BNC;
  1106. else if (!strncmp(s, "tp", 2))
  1107. return E_PORT_TP;
  1108. else if (!strncmp(s, "dix", 3))
  1109. return E_PORT_DIX;
  1110. else if (!strncmp(s, "auto", 4))
  1111. return E_PORT_AUTO;
  1112. else
  1113. return E_PORT_FROM_EPROM;
  1114. }
  1115. #define MAX_ETH16I_CARDS 4 /* Max number of Eth16i cards per module */
  1116. static struct net_device *dev_eth16i[MAX_ETH16I_CARDS];
  1117. static int io[MAX_ETH16I_CARDS];
  1118. #if 0
  1119. static int irq[MAX_ETH16I_CARDS];
  1120. #endif
  1121. static char* mediatype[MAX_ETH16I_CARDS];
  1122. static int debug = -1;
  1123. MODULE_AUTHOR("Mika Kuoppala <miku@iki.fi>");
  1124. MODULE_DESCRIPTION("ICL EtherTeam 16i/32 driver");
  1125. MODULE_LICENSE("GPL");
  1126. module_param_array(io, int, NULL, 0);
  1127. MODULE_PARM_DESC(io, "eth16i I/O base address(es)");
  1128. #if 0
  1129. module_param_array(irq, int, NULL, 0);
  1130. MODULE_PARM_DESC(irq, "eth16i interrupt request number");
  1131. #endif
  1132. module_param_array(mediatype, charp, NULL, 0);
  1133. MODULE_PARM_DESC(mediatype, "eth16i media type of interface(s) (bnc,tp,dix,auto,eprom)");
  1134. module_param(debug, int, 0);
  1135. MODULE_PARM_DESC(debug, "eth16i debug level (0-6)");
  1136. int __init init_module(void)
  1137. {
  1138. int this_dev, found = 0;
  1139. struct net_device *dev;
  1140. for (this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
  1141. dev = alloc_etherdev(sizeof(struct eth16i_local));
  1142. if (!dev)
  1143. break;
  1144. dev->base_addr = io[this_dev];
  1145. if(debug != -1)
  1146. eth16i_debug = debug;
  1147. if(eth16i_debug > 1)
  1148. printk(KERN_NOTICE "eth16i(%d): interface type %s\n", this_dev, mediatype[this_dev] ? mediatype[this_dev] : "none" );
  1149. dev->if_port = eth16i_parse_mediatype(mediatype[this_dev]);
  1150. if(io[this_dev] == 0) {
  1151. if(this_dev != 0) /* Only autoprobe 1st one */
  1152. break;
  1153. printk(KERN_NOTICE "eth16i.c: Presently autoprobing (not recommended) for a single card.\n");
  1154. }
  1155. if (do_eth16i_probe(dev) == 0) {
  1156. dev_eth16i[found++] = dev;
  1157. continue;
  1158. }
  1159. printk(KERN_WARNING "eth16i.c No Eth16i card found (i/o = 0x%x).\n",
  1160. io[this_dev]);
  1161. free_netdev(dev);
  1162. break;
  1163. }
  1164. if (found)
  1165. return 0;
  1166. return -ENXIO;
  1167. }
  1168. void __exit cleanup_module(void)
  1169. {
  1170. int this_dev;
  1171. for(this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
  1172. struct net_device *dev = dev_eth16i[this_dev];
  1173. if(dev->priv) {
  1174. unregister_netdev(dev);
  1175. free_irq(dev->irq, dev);
  1176. release_region(dev->base_addr, ETH16I_IO_EXTENT);
  1177. free_netdev(dev);
  1178. }
  1179. }
  1180. }
  1181. #endif /* MODULE */
  1182. /*
  1183. * Local variables:
  1184. * compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -c eth16i.c"
  1185. * alt-compile-command: "gcc -DMODVERSIONS -DMODULE -D__KERNEL__ -Wall -Wstrict -prototypes -O6 -c eth16i.c"
  1186. * tab-width: 8
  1187. * c-basic-offset: 8
  1188. * c-indent-level: 8
  1189. * End:
  1190. */
  1191. /* End of file eth16i.c */