dm9000.c 28 KB

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  1. /*
  2. * dm9000.c: Version 1.2 03/18/2003
  3. *
  4. * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
  5. * Copyright (C) 1997 Sten Wang
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version 2
  10. * of the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
  18. *
  19. * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
  20. * 06/22/2001 Support DM9801 progrmming
  21. * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
  22. * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
  23. * R17 = (R17 & 0xfff0) | NF + 3
  24. * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
  25. * R17 = (R17 & 0xfff0) | NF
  26. *
  27. * v1.00 modify by simon 2001.9.5
  28. * change for kernel 2.4.x
  29. *
  30. * v1.1 11/09/2001 fix force mode bug
  31. *
  32. * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
  33. * Fixed phy reset.
  34. * Added tx/rx 32 bit mode.
  35. * Cleaned up for kernel merge.
  36. *
  37. * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
  38. * Port to 2.6 kernel
  39. *
  40. * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
  41. * Cleanup of code to remove ifdefs
  42. * Allowed platform device data to influence access width
  43. * Reformatting areas of code
  44. *
  45. * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
  46. * * removed 2.4 style module parameters
  47. * * removed removed unused stat counter and fixed
  48. * net_device_stats
  49. * * introduced tx_timeout function
  50. * * reworked locking
  51. *
  52. * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk>
  53. * * fixed spinlock call without pointer
  54. * * ensure spinlock is initialised
  55. */
  56. #include <linux/module.h>
  57. #include <linux/ioport.h>
  58. #include <linux/netdevice.h>
  59. #include <linux/etherdevice.h>
  60. #include <linux/init.h>
  61. #include <linux/skbuff.h>
  62. #include <linux/spinlock.h>
  63. #include <linux/crc32.h>
  64. #include <linux/mii.h>
  65. #include <linux/dm9000.h>
  66. #include <linux/delay.h>
  67. #include <linux/platform_device.h>
  68. #include <asm/delay.h>
  69. #include <asm/irq.h>
  70. #include <asm/io.h>
  71. #include "dm9000.h"
  72. /* Board/System/Debug information/definition ---------------- */
  73. #define DM9000_PHY 0x40 /* PHY address 0x01 */
  74. #define TRUE 1
  75. #define FALSE 0
  76. #define CARDNAME "dm9000"
  77. #define PFX CARDNAME ": "
  78. #define DM9000_TIMER_WUT jiffies+(HZ*2) /* timer wakeup time : 2 second */
  79. #define DM9000_DEBUG 0
  80. #if DM9000_DEBUG > 2
  81. #define PRINTK3(args...) printk(CARDNAME ": " args)
  82. #else
  83. #define PRINTK3(args...) do { } while(0)
  84. #endif
  85. #if DM9000_DEBUG > 1
  86. #define PRINTK2(args...) printk(CARDNAME ": " args)
  87. #else
  88. #define PRINTK2(args...) do { } while(0)
  89. #endif
  90. #if DM9000_DEBUG > 0
  91. #define PRINTK1(args...) printk(CARDNAME ": " args)
  92. #define PRINTK(args...) printk(CARDNAME ": " args)
  93. #else
  94. #define PRINTK1(args...) do { } while(0)
  95. #define PRINTK(args...) printk(KERN_DEBUG args)
  96. #endif
  97. /*
  98. * Transmit timeout, default 5 seconds.
  99. */
  100. static int watchdog = 5000;
  101. module_param(watchdog, int, 0400);
  102. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  103. /* Structure/enum declaration ------------------------------- */
  104. typedef struct board_info {
  105. void __iomem *io_addr; /* Register I/O base address */
  106. void __iomem *io_data; /* Data I/O address */
  107. u16 irq; /* IRQ */
  108. u16 tx_pkt_cnt;
  109. u16 queue_pkt_len;
  110. u16 queue_start_addr;
  111. u16 dbug_cnt;
  112. u8 io_mode; /* 0:word, 2:byte */
  113. u8 phy_addr;
  114. void (*inblk)(void __iomem *port, void *data, int length);
  115. void (*outblk)(void __iomem *port, void *data, int length);
  116. void (*dumpblk)(void __iomem *port, int length);
  117. struct resource *addr_res; /* resources found */
  118. struct resource *data_res;
  119. struct resource *addr_req; /* resources requested */
  120. struct resource *data_req;
  121. struct resource *irq_res;
  122. struct timer_list timer;
  123. struct net_device_stats stats;
  124. unsigned char srom[128];
  125. spinlock_t lock;
  126. struct mii_if_info mii;
  127. u32 msg_enable;
  128. } board_info_t;
  129. /* function declaration ------------------------------------- */
  130. static int dm9000_probe(struct platform_device *);
  131. static int dm9000_open(struct net_device *);
  132. static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
  133. static int dm9000_stop(struct net_device *);
  134. static void dm9000_timer(unsigned long);
  135. static void dm9000_init_dm9000(struct net_device *);
  136. static struct net_device_stats *dm9000_get_stats(struct net_device *);
  137. static irqreturn_t dm9000_interrupt(int, void *);
  138. static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
  139. static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
  140. int value);
  141. static u16 read_srom_word(board_info_t *, int);
  142. static void dm9000_rx(struct net_device *);
  143. static void dm9000_hash_table(struct net_device *);
  144. //#define DM9000_PROGRAM_EEPROM
  145. #ifdef DM9000_PROGRAM_EEPROM
  146. static void program_eeprom(board_info_t * db);
  147. #endif
  148. /* DM9000 network board routine ---------------------------- */
  149. static void
  150. dm9000_reset(board_info_t * db)
  151. {
  152. PRINTK1("dm9000x: resetting\n");
  153. /* RESET device */
  154. writeb(DM9000_NCR, db->io_addr);
  155. udelay(200);
  156. writeb(NCR_RST, db->io_data);
  157. udelay(200);
  158. }
  159. /*
  160. * Read a byte from I/O port
  161. */
  162. static u8
  163. ior(board_info_t * db, int reg)
  164. {
  165. writeb(reg, db->io_addr);
  166. return readb(db->io_data);
  167. }
  168. /*
  169. * Write a byte to I/O port
  170. */
  171. static void
  172. iow(board_info_t * db, int reg, int value)
  173. {
  174. writeb(reg, db->io_addr);
  175. writeb(value, db->io_data);
  176. }
  177. /* routines for sending block to chip */
  178. static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
  179. {
  180. writesb(reg, data, count);
  181. }
  182. static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
  183. {
  184. writesw(reg, data, (count+1) >> 1);
  185. }
  186. static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
  187. {
  188. writesl(reg, data, (count+3) >> 2);
  189. }
  190. /* input block from chip to memory */
  191. static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
  192. {
  193. readsb(reg, data, count);
  194. }
  195. static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
  196. {
  197. readsw(reg, data, (count+1) >> 1);
  198. }
  199. static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
  200. {
  201. readsl(reg, data, (count+3) >> 2);
  202. }
  203. /* dump block from chip to null */
  204. static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
  205. {
  206. int i;
  207. int tmp;
  208. for (i = 0; i < count; i++)
  209. tmp = readb(reg);
  210. }
  211. static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
  212. {
  213. int i;
  214. int tmp;
  215. count = (count + 1) >> 1;
  216. for (i = 0; i < count; i++)
  217. tmp = readw(reg);
  218. }
  219. static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
  220. {
  221. int i;
  222. int tmp;
  223. count = (count + 3) >> 2;
  224. for (i = 0; i < count; i++)
  225. tmp = readl(reg);
  226. }
  227. /* dm9000_set_io
  228. *
  229. * select the specified set of io routines to use with the
  230. * device
  231. */
  232. static void dm9000_set_io(struct board_info *db, int byte_width)
  233. {
  234. /* use the size of the data resource to work out what IO
  235. * routines we want to use
  236. */
  237. switch (byte_width) {
  238. case 1:
  239. db->dumpblk = dm9000_dumpblk_8bit;
  240. db->outblk = dm9000_outblk_8bit;
  241. db->inblk = dm9000_inblk_8bit;
  242. break;
  243. case 2:
  244. db->dumpblk = dm9000_dumpblk_16bit;
  245. db->outblk = dm9000_outblk_16bit;
  246. db->inblk = dm9000_inblk_16bit;
  247. break;
  248. case 3:
  249. printk(KERN_ERR PFX ": 3 byte IO, falling back to 16bit\n");
  250. db->dumpblk = dm9000_dumpblk_16bit;
  251. db->outblk = dm9000_outblk_16bit;
  252. db->inblk = dm9000_inblk_16bit;
  253. break;
  254. case 4:
  255. default:
  256. db->dumpblk = dm9000_dumpblk_32bit;
  257. db->outblk = dm9000_outblk_32bit;
  258. db->inblk = dm9000_inblk_32bit;
  259. break;
  260. }
  261. }
  262. /* Our watchdog timed out. Called by the networking layer */
  263. static void dm9000_timeout(struct net_device *dev)
  264. {
  265. board_info_t *db = (board_info_t *) dev->priv;
  266. u8 reg_save;
  267. unsigned long flags;
  268. /* Save previous register address */
  269. reg_save = readb(db->io_addr);
  270. spin_lock_irqsave(&db->lock,flags);
  271. netif_stop_queue(dev);
  272. dm9000_reset(db);
  273. dm9000_init_dm9000(dev);
  274. /* We can accept TX packets again */
  275. dev->trans_start = jiffies;
  276. netif_wake_queue(dev);
  277. /* Restore previous register address */
  278. writeb(reg_save, db->io_addr);
  279. spin_unlock_irqrestore(&db->lock,flags);
  280. }
  281. #ifdef CONFIG_NET_POLL_CONTROLLER
  282. /*
  283. *Used by netconsole
  284. */
  285. static void dm9000_poll_controller(struct net_device *dev)
  286. {
  287. disable_irq(dev->irq);
  288. dm9000_interrupt(dev->irq,dev);
  289. enable_irq(dev->irq);
  290. }
  291. #endif
  292. /* dm9000_release_board
  293. *
  294. * release a board, and any mapped resources
  295. */
  296. static void
  297. dm9000_release_board(struct platform_device *pdev, struct board_info *db)
  298. {
  299. if (db->data_res == NULL) {
  300. if (db->addr_res != NULL)
  301. release_mem_region((unsigned long)db->io_addr, 4);
  302. return;
  303. }
  304. /* unmap our resources */
  305. iounmap(db->io_addr);
  306. iounmap(db->io_data);
  307. /* release the resources */
  308. if (db->data_req != NULL) {
  309. release_resource(db->data_req);
  310. kfree(db->data_req);
  311. }
  312. if (db->addr_req != NULL) {
  313. release_resource(db->addr_req);
  314. kfree(db->addr_req);
  315. }
  316. }
  317. #define res_size(_r) (((_r)->end - (_r)->start) + 1)
  318. /*
  319. * Search DM9000 board, allocate space and register it
  320. */
  321. static int
  322. dm9000_probe(struct platform_device *pdev)
  323. {
  324. struct dm9000_plat_data *pdata = pdev->dev.platform_data;
  325. struct board_info *db; /* Point a board information structure */
  326. struct net_device *ndev;
  327. unsigned long base;
  328. int ret = 0;
  329. int iosize;
  330. int i;
  331. u32 id_val;
  332. /* Init network device */
  333. ndev = alloc_etherdev(sizeof (struct board_info));
  334. if (!ndev) {
  335. printk("%s: could not allocate device.\n", CARDNAME);
  336. return -ENOMEM;
  337. }
  338. SET_MODULE_OWNER(ndev);
  339. SET_NETDEV_DEV(ndev, &pdev->dev);
  340. PRINTK2("dm9000_probe()");
  341. /* setup board info structure */
  342. db = (struct board_info *) ndev->priv;
  343. memset(db, 0, sizeof (*db));
  344. spin_lock_init(&db->lock);
  345. if (pdev->num_resources < 2) {
  346. ret = -ENODEV;
  347. goto out;
  348. } else if (pdev->num_resources == 2) {
  349. base = pdev->resource[0].start;
  350. if (!request_mem_region(base, 4, ndev->name)) {
  351. ret = -EBUSY;
  352. goto out;
  353. }
  354. ndev->base_addr = base;
  355. ndev->irq = pdev->resource[1].start;
  356. db->io_addr = (void __iomem *)base;
  357. db->io_data = (void __iomem *)(base + 4);
  358. } else {
  359. db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  360. db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  361. db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  362. if (db->addr_res == NULL || db->data_res == NULL ||
  363. db->irq_res == NULL) {
  364. printk(KERN_ERR PFX "insufficient resources\n");
  365. ret = -ENOENT;
  366. goto out;
  367. }
  368. i = res_size(db->addr_res);
  369. db->addr_req = request_mem_region(db->addr_res->start, i,
  370. pdev->name);
  371. if (db->addr_req == NULL) {
  372. printk(KERN_ERR PFX "cannot claim address reg area\n");
  373. ret = -EIO;
  374. goto out;
  375. }
  376. db->io_addr = ioremap(db->addr_res->start, i);
  377. if (db->io_addr == NULL) {
  378. printk(KERN_ERR "failed to ioremap address reg\n");
  379. ret = -EINVAL;
  380. goto out;
  381. }
  382. iosize = res_size(db->data_res);
  383. db->data_req = request_mem_region(db->data_res->start, iosize,
  384. pdev->name);
  385. if (db->data_req == NULL) {
  386. printk(KERN_ERR PFX "cannot claim data reg area\n");
  387. ret = -EIO;
  388. goto out;
  389. }
  390. db->io_data = ioremap(db->data_res->start, iosize);
  391. if (db->io_data == NULL) {
  392. printk(KERN_ERR "failed to ioremap data reg\n");
  393. ret = -EINVAL;
  394. goto out;
  395. }
  396. /* fill in parameters for net-dev structure */
  397. ndev->base_addr = (unsigned long)db->io_addr;
  398. ndev->irq = db->irq_res->start;
  399. /* ensure at least we have a default set of IO routines */
  400. dm9000_set_io(db, iosize);
  401. }
  402. /* check to see if anything is being over-ridden */
  403. if (pdata != NULL) {
  404. /* check to see if the driver wants to over-ride the
  405. * default IO width */
  406. if (pdata->flags & DM9000_PLATF_8BITONLY)
  407. dm9000_set_io(db, 1);
  408. if (pdata->flags & DM9000_PLATF_16BITONLY)
  409. dm9000_set_io(db, 2);
  410. if (pdata->flags & DM9000_PLATF_32BITONLY)
  411. dm9000_set_io(db, 4);
  412. /* check to see if there are any IO routine
  413. * over-rides */
  414. if (pdata->inblk != NULL)
  415. db->inblk = pdata->inblk;
  416. if (pdata->outblk != NULL)
  417. db->outblk = pdata->outblk;
  418. if (pdata->dumpblk != NULL)
  419. db->dumpblk = pdata->dumpblk;
  420. }
  421. dm9000_reset(db);
  422. /* try two times, DM9000 sometimes gets the first read wrong */
  423. for (i = 0; i < 2; i++) {
  424. id_val = ior(db, DM9000_VIDL);
  425. id_val |= (u32)ior(db, DM9000_VIDH) << 8;
  426. id_val |= (u32)ior(db, DM9000_PIDL) << 16;
  427. id_val |= (u32)ior(db, DM9000_PIDH) << 24;
  428. if (id_val == DM9000_ID)
  429. break;
  430. printk("%s: read wrong id 0x%08x\n", CARDNAME, id_val);
  431. }
  432. if (id_val != DM9000_ID) {
  433. printk("%s: wrong id: 0x%08x\n", CARDNAME, id_val);
  434. goto release;
  435. }
  436. /* from this point we assume that we have found a DM9000 */
  437. /* driver system function */
  438. ether_setup(ndev);
  439. ndev->open = &dm9000_open;
  440. ndev->hard_start_xmit = &dm9000_start_xmit;
  441. ndev->tx_timeout = &dm9000_timeout;
  442. ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
  443. ndev->stop = &dm9000_stop;
  444. ndev->get_stats = &dm9000_get_stats;
  445. ndev->set_multicast_list = &dm9000_hash_table;
  446. #ifdef CONFIG_NET_POLL_CONTROLLER
  447. ndev->poll_controller = &dm9000_poll_controller;
  448. #endif
  449. #ifdef DM9000_PROGRAM_EEPROM
  450. program_eeprom(db);
  451. #endif
  452. db->msg_enable = NETIF_MSG_LINK;
  453. db->mii.phy_id_mask = 0x1f;
  454. db->mii.reg_num_mask = 0x1f;
  455. db->mii.force_media = 0;
  456. db->mii.full_duplex = 0;
  457. db->mii.dev = ndev;
  458. db->mii.mdio_read = dm9000_phy_read;
  459. db->mii.mdio_write = dm9000_phy_write;
  460. /* Read SROM content */
  461. for (i = 0; i < 64; i++)
  462. ((u16 *) db->srom)[i] = read_srom_word(db, i);
  463. /* Set Node Address */
  464. for (i = 0; i < 6; i++)
  465. ndev->dev_addr[i] = db->srom[i];
  466. if (!is_valid_ether_addr(ndev->dev_addr)) {
  467. /* try reading from mac */
  468. for (i = 0; i < 6; i++)
  469. ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
  470. }
  471. if (!is_valid_ether_addr(ndev->dev_addr))
  472. printk("%s: Invalid ethernet MAC address. Please "
  473. "set using ifconfig\n", ndev->name);
  474. platform_set_drvdata(pdev, ndev);
  475. ret = register_netdev(ndev);
  476. if (ret == 0) {
  477. printk("%s: dm9000 at %p,%p IRQ %d MAC: ",
  478. ndev->name, db->io_addr, db->io_data, ndev->irq);
  479. for (i = 0; i < 5; i++)
  480. printk("%02x:", ndev->dev_addr[i]);
  481. printk("%02x\n", ndev->dev_addr[5]);
  482. }
  483. return 0;
  484. release:
  485. out:
  486. printk("%s: not found (%d).\n", CARDNAME, ret);
  487. dm9000_release_board(pdev, db);
  488. kfree(ndev);
  489. return ret;
  490. }
  491. /*
  492. * Open the interface.
  493. * The interface is opened whenever "ifconfig" actives it.
  494. */
  495. static int
  496. dm9000_open(struct net_device *dev)
  497. {
  498. board_info_t *db = (board_info_t *) dev->priv;
  499. PRINTK2("entering dm9000_open\n");
  500. if (request_irq(dev->irq, &dm9000_interrupt, IRQF_SHARED, dev->name, dev))
  501. return -EAGAIN;
  502. /* Initialize DM9000 board */
  503. dm9000_reset(db);
  504. dm9000_init_dm9000(dev);
  505. /* Init driver variable */
  506. db->dbug_cnt = 0;
  507. /* set and active a timer process */
  508. init_timer(&db->timer);
  509. db->timer.expires = DM9000_TIMER_WUT;
  510. db->timer.data = (unsigned long) dev;
  511. db->timer.function = &dm9000_timer;
  512. add_timer(&db->timer);
  513. mii_check_media(&db->mii, netif_msg_link(db), 1);
  514. netif_start_queue(dev);
  515. return 0;
  516. }
  517. /*
  518. * Initilize dm9000 board
  519. */
  520. static void
  521. dm9000_init_dm9000(struct net_device *dev)
  522. {
  523. board_info_t *db = (board_info_t *) dev->priv;
  524. PRINTK1("entering %s\n",__FUNCTION__);
  525. /* I/O mode */
  526. db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
  527. /* GPIO0 on pre-activate PHY */
  528. iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
  529. iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
  530. iow(db, DM9000_GPR, 0); /* Enable PHY */
  531. /* Program operating register */
  532. iow(db, DM9000_TCR, 0); /* TX Polling clear */
  533. iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
  534. iow(db, DM9000_FCR, 0xff); /* Flow Control */
  535. iow(db, DM9000_SMCR, 0); /* Special Mode */
  536. /* clear TX status */
  537. iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
  538. iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
  539. /* Set address filter table */
  540. dm9000_hash_table(dev);
  541. /* Activate DM9000 */
  542. iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
  543. /* Enable TX/RX interrupt mask */
  544. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  545. /* Init Driver variable */
  546. db->tx_pkt_cnt = 0;
  547. db->queue_pkt_len = 0;
  548. dev->trans_start = 0;
  549. }
  550. /*
  551. * Hardware start transmission.
  552. * Send a packet to media from the upper layer.
  553. */
  554. static int
  555. dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
  556. {
  557. board_info_t *db = (board_info_t *) dev->priv;
  558. PRINTK3("dm9000_start_xmit\n");
  559. if (db->tx_pkt_cnt > 1)
  560. return 1;
  561. netif_stop_queue(dev);
  562. /* Disable all interrupts */
  563. iow(db, DM9000_IMR, IMR_PAR);
  564. /* Move data to DM9000 TX RAM */
  565. writeb(DM9000_MWCMD, db->io_addr);
  566. (db->outblk)(db->io_data, skb->data, skb->len);
  567. db->stats.tx_bytes += skb->len;
  568. /* TX control: First packet immediately send, second packet queue */
  569. if (db->tx_pkt_cnt == 0) {
  570. /* First Packet */
  571. db->tx_pkt_cnt++;
  572. /* Set TX length to DM9000 */
  573. iow(db, DM9000_TXPLL, skb->len & 0xff);
  574. iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
  575. /* Issue TX polling command */
  576. iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
  577. dev->trans_start = jiffies; /* save the time stamp */
  578. } else {
  579. /* Second packet */
  580. db->tx_pkt_cnt++;
  581. db->queue_pkt_len = skb->len;
  582. }
  583. /* free this SKB */
  584. dev_kfree_skb(skb);
  585. /* Re-enable resource check */
  586. if (db->tx_pkt_cnt == 1)
  587. netif_wake_queue(dev);
  588. /* Re-enable interrupt */
  589. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  590. return 0;
  591. }
  592. static void
  593. dm9000_shutdown(struct net_device *dev)
  594. {
  595. board_info_t *db = (board_info_t *) dev->priv;
  596. /* RESET device */
  597. dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
  598. iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
  599. iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
  600. iow(db, DM9000_RCR, 0x00); /* Disable RX */
  601. }
  602. /*
  603. * Stop the interface.
  604. * The interface is stopped when it is brought.
  605. */
  606. static int
  607. dm9000_stop(struct net_device *ndev)
  608. {
  609. board_info_t *db = (board_info_t *) ndev->priv;
  610. PRINTK1("entering %s\n",__FUNCTION__);
  611. /* deleted timer */
  612. del_timer(&db->timer);
  613. netif_stop_queue(ndev);
  614. netif_carrier_off(ndev);
  615. /* free interrupt */
  616. free_irq(ndev->irq, ndev);
  617. dm9000_shutdown(ndev);
  618. return 0;
  619. }
  620. /*
  621. * DM9000 interrupt handler
  622. * receive the packet to upper layer, free the transmitted packet
  623. */
  624. static void
  625. dm9000_tx_done(struct net_device *dev, board_info_t * db)
  626. {
  627. int tx_status = ior(db, DM9000_NSR); /* Got TX status */
  628. if (tx_status & (NSR_TX2END | NSR_TX1END)) {
  629. /* One packet sent complete */
  630. db->tx_pkt_cnt--;
  631. db->stats.tx_packets++;
  632. /* Queue packet check & send */
  633. if (db->tx_pkt_cnt > 0) {
  634. iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
  635. iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
  636. iow(db, DM9000_TCR, TCR_TXREQ);
  637. dev->trans_start = jiffies;
  638. }
  639. netif_wake_queue(dev);
  640. }
  641. }
  642. static irqreturn_t
  643. dm9000_interrupt(int irq, void *dev_id)
  644. {
  645. struct net_device *dev = dev_id;
  646. board_info_t *db;
  647. int int_status;
  648. u8 reg_save;
  649. PRINTK3("entering %s\n",__FUNCTION__);
  650. if (!dev) {
  651. PRINTK1("dm9000_interrupt() without DEVICE arg\n");
  652. return IRQ_HANDLED;
  653. }
  654. /* A real interrupt coming */
  655. db = (board_info_t *) dev->priv;
  656. spin_lock(&db->lock);
  657. /* Save previous register address */
  658. reg_save = readb(db->io_addr);
  659. /* Disable all interrupts */
  660. iow(db, DM9000_IMR, IMR_PAR);
  661. /* Got DM9000 interrupt status */
  662. int_status = ior(db, DM9000_ISR); /* Got ISR */
  663. iow(db, DM9000_ISR, int_status); /* Clear ISR status */
  664. /* Received the coming packet */
  665. if (int_status & ISR_PRS)
  666. dm9000_rx(dev);
  667. /* Trnasmit Interrupt check */
  668. if (int_status & ISR_PTS)
  669. dm9000_tx_done(dev, db);
  670. /* Re-enable interrupt mask */
  671. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  672. /* Restore previous register address */
  673. writeb(reg_save, db->io_addr);
  674. spin_unlock(&db->lock);
  675. return IRQ_HANDLED;
  676. }
  677. /*
  678. * Get statistics from driver.
  679. */
  680. static struct net_device_stats *
  681. dm9000_get_stats(struct net_device *dev)
  682. {
  683. board_info_t *db = (board_info_t *) dev->priv;
  684. return &db->stats;
  685. }
  686. /*
  687. * A periodic timer routine
  688. * Dynamic media sense, allocated Rx buffer...
  689. */
  690. static void
  691. dm9000_timer(unsigned long data)
  692. {
  693. struct net_device *dev = (struct net_device *) data;
  694. board_info_t *db = (board_info_t *) dev->priv;
  695. PRINTK3("dm9000_timer()\n");
  696. mii_check_media(&db->mii, netif_msg_link(db), 0);
  697. /* Set timer again */
  698. db->timer.expires = DM9000_TIMER_WUT;
  699. add_timer(&db->timer);
  700. }
  701. struct dm9000_rxhdr {
  702. u16 RxStatus;
  703. u16 RxLen;
  704. } __attribute__((__packed__));
  705. /*
  706. * Received a packet and pass to upper layer
  707. */
  708. static void
  709. dm9000_rx(struct net_device *dev)
  710. {
  711. board_info_t *db = (board_info_t *) dev->priv;
  712. struct dm9000_rxhdr rxhdr;
  713. struct sk_buff *skb;
  714. u8 rxbyte, *rdptr;
  715. int GoodPacket;
  716. int RxLen;
  717. /* Check packet ready or not */
  718. do {
  719. ior(db, DM9000_MRCMDX); /* Dummy read */
  720. /* Get most updated data */
  721. rxbyte = readb(db->io_data);
  722. /* Status check: this byte must be 0 or 1 */
  723. if (rxbyte > DM9000_PKT_RDY) {
  724. printk("status check failed: %d\n", rxbyte);
  725. iow(db, DM9000_RCR, 0x00); /* Stop Device */
  726. iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
  727. return;
  728. }
  729. if (rxbyte != DM9000_PKT_RDY)
  730. return;
  731. /* A packet ready now & Get status/length */
  732. GoodPacket = TRUE;
  733. writeb(DM9000_MRCMD, db->io_addr);
  734. (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
  735. RxLen = rxhdr.RxLen;
  736. /* Packet Status check */
  737. if (RxLen < 0x40) {
  738. GoodPacket = FALSE;
  739. PRINTK1("Bad Packet received (runt)\n");
  740. }
  741. if (RxLen > DM9000_PKT_MAX) {
  742. PRINTK1("RST: RX Len:%x\n", RxLen);
  743. }
  744. if (rxhdr.RxStatus & 0xbf00) {
  745. GoodPacket = FALSE;
  746. if (rxhdr.RxStatus & 0x100) {
  747. PRINTK1("fifo error\n");
  748. db->stats.rx_fifo_errors++;
  749. }
  750. if (rxhdr.RxStatus & 0x200) {
  751. PRINTK1("crc error\n");
  752. db->stats.rx_crc_errors++;
  753. }
  754. if (rxhdr.RxStatus & 0x8000) {
  755. PRINTK1("length error\n");
  756. db->stats.rx_length_errors++;
  757. }
  758. }
  759. /* Move data from DM9000 */
  760. if (GoodPacket
  761. && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
  762. skb->dev = dev;
  763. skb_reserve(skb, 2);
  764. rdptr = (u8 *) skb_put(skb, RxLen - 4);
  765. /* Read received packet from RX SRAM */
  766. (db->inblk)(db->io_data, rdptr, RxLen);
  767. db->stats.rx_bytes += RxLen;
  768. /* Pass to upper layer */
  769. skb->protocol = eth_type_trans(skb, dev);
  770. netif_rx(skb);
  771. db->stats.rx_packets++;
  772. } else {
  773. /* need to dump the packet's data */
  774. (db->dumpblk)(db->io_data, RxLen);
  775. }
  776. } while (rxbyte == DM9000_PKT_RDY);
  777. }
  778. /*
  779. * Read a word data from SROM
  780. */
  781. static u16
  782. read_srom_word(board_info_t * db, int offset)
  783. {
  784. iow(db, DM9000_EPAR, offset);
  785. iow(db, DM9000_EPCR, EPCR_ERPRR);
  786. mdelay(8); /* according to the datasheet 200us should be enough,
  787. but it doesn't work */
  788. iow(db, DM9000_EPCR, 0x0);
  789. return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8));
  790. }
  791. #ifdef DM9000_PROGRAM_EEPROM
  792. /*
  793. * Write a word data to SROM
  794. */
  795. static void
  796. write_srom_word(board_info_t * db, int offset, u16 val)
  797. {
  798. iow(db, DM9000_EPAR, offset);
  799. iow(db, DM9000_EPDRH, ((val >> 8) & 0xff));
  800. iow(db, DM9000_EPDRL, (val & 0xff));
  801. iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
  802. mdelay(8); /* same shit */
  803. iow(db, DM9000_EPCR, 0);
  804. }
  805. /*
  806. * Only for development:
  807. * Here we write static data to the eeprom in case
  808. * we don't have valid content on a new board
  809. */
  810. static void
  811. program_eeprom(board_info_t * db)
  812. {
  813. u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */
  814. 0x0000, /* Autoload: accept nothing */
  815. 0x0a46, 0x9000, /* Vendor / Product ID */
  816. 0x0000, /* pin control */
  817. 0x0000,
  818. }; /* Wake-up mode control */
  819. int i;
  820. for (i = 0; i < 8; i++)
  821. write_srom_word(db, i, eeprom[i]);
  822. }
  823. #endif
  824. /*
  825. * Calculate the CRC valude of the Rx packet
  826. * flag = 1 : return the reverse CRC (for the received packet CRC)
  827. * 0 : return the normal CRC (for Hash Table index)
  828. */
  829. static unsigned long
  830. cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
  831. {
  832. u32 crc = ether_crc_le(Len, Data);
  833. if (flag)
  834. return ~crc;
  835. return crc;
  836. }
  837. /*
  838. * Set DM9000 multicast address
  839. */
  840. static void
  841. dm9000_hash_table(struct net_device *dev)
  842. {
  843. board_info_t *db = (board_info_t *) dev->priv;
  844. struct dev_mc_list *mcptr = dev->mc_list;
  845. int mc_cnt = dev->mc_count;
  846. u32 hash_val;
  847. u16 i, oft, hash_table[4];
  848. unsigned long flags;
  849. PRINTK2("dm9000_hash_table()\n");
  850. spin_lock_irqsave(&db->lock,flags);
  851. for (i = 0, oft = 0x10; i < 6; i++, oft++)
  852. iow(db, oft, dev->dev_addr[i]);
  853. /* Clear Hash Table */
  854. for (i = 0; i < 4; i++)
  855. hash_table[i] = 0x0;
  856. /* broadcast address */
  857. hash_table[3] = 0x8000;
  858. /* the multicast address in Hash Table : 64 bits */
  859. for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
  860. hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
  861. hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
  862. }
  863. /* Write the hash table to MAC MD table */
  864. for (i = 0, oft = 0x16; i < 4; i++) {
  865. iow(db, oft++, hash_table[i] & 0xff);
  866. iow(db, oft++, (hash_table[i] >> 8) & 0xff);
  867. }
  868. spin_unlock_irqrestore(&db->lock,flags);
  869. }
  870. /*
  871. * Read a word from phyxcer
  872. */
  873. static int
  874. dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
  875. {
  876. board_info_t *db = (board_info_t *) dev->priv;
  877. unsigned long flags;
  878. unsigned int reg_save;
  879. int ret;
  880. spin_lock_irqsave(&db->lock,flags);
  881. /* Save previous register address */
  882. reg_save = readb(db->io_addr);
  883. /* Fill the phyxcer register into REG_0C */
  884. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  885. iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
  886. udelay(100); /* Wait read complete */
  887. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
  888. /* The read data keeps on REG_0D & REG_0E */
  889. ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
  890. /* restore the previous address */
  891. writeb(reg_save, db->io_addr);
  892. spin_unlock_irqrestore(&db->lock,flags);
  893. return ret;
  894. }
  895. /*
  896. * Write a word to phyxcer
  897. */
  898. static void
  899. dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
  900. {
  901. board_info_t *db = (board_info_t *) dev->priv;
  902. unsigned long flags;
  903. unsigned long reg_save;
  904. spin_lock_irqsave(&db->lock,flags);
  905. /* Save previous register address */
  906. reg_save = readb(db->io_addr);
  907. /* Fill the phyxcer register into REG_0C */
  908. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  909. /* Fill the written data into REG_0D & REG_0E */
  910. iow(db, DM9000_EPDRL, (value & 0xff));
  911. iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
  912. iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
  913. udelay(500); /* Wait write complete */
  914. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
  915. /* restore the previous address */
  916. writeb(reg_save, db->io_addr);
  917. spin_unlock_irqrestore(&db->lock,flags);
  918. }
  919. static int
  920. dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
  921. {
  922. struct net_device *ndev = platform_get_drvdata(dev);
  923. if (ndev) {
  924. if (netif_running(ndev)) {
  925. netif_device_detach(ndev);
  926. dm9000_shutdown(ndev);
  927. }
  928. }
  929. return 0;
  930. }
  931. static int
  932. dm9000_drv_resume(struct platform_device *dev)
  933. {
  934. struct net_device *ndev = platform_get_drvdata(dev);
  935. board_info_t *db = (board_info_t *) ndev->priv;
  936. if (ndev) {
  937. if (netif_running(ndev)) {
  938. dm9000_reset(db);
  939. dm9000_init_dm9000(ndev);
  940. netif_device_attach(ndev);
  941. }
  942. }
  943. return 0;
  944. }
  945. static int
  946. dm9000_drv_remove(struct platform_device *pdev)
  947. {
  948. struct net_device *ndev = platform_get_drvdata(pdev);
  949. platform_set_drvdata(pdev, NULL);
  950. unregister_netdev(ndev);
  951. dm9000_release_board(pdev, (board_info_t *) ndev->priv);
  952. kfree(ndev); /* free device structure */
  953. PRINTK1("clean_module() exit\n");
  954. return 0;
  955. }
  956. static struct platform_driver dm9000_driver = {
  957. .driver = {
  958. .name = "dm9000",
  959. .owner = THIS_MODULE,
  960. },
  961. .probe = dm9000_probe,
  962. .remove = dm9000_drv_remove,
  963. .suspend = dm9000_drv_suspend,
  964. .resume = dm9000_drv_resume,
  965. };
  966. static int __init
  967. dm9000_init(void)
  968. {
  969. printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME);
  970. return platform_driver_register(&dm9000_driver); /* search board and register */
  971. }
  972. static void __exit
  973. dm9000_cleanup(void)
  974. {
  975. platform_driver_unregister(&dm9000_driver);
  976. }
  977. module_init(dm9000_init);
  978. module_exit(dm9000_cleanup);
  979. MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
  980. MODULE_DESCRIPTION("Davicom DM9000 network driver");
  981. MODULE_LICENSE("GPL");