dgrs_i82596.h 15 KB

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  1. /*
  2. * i82596 ethernet controller bits and structures (little endian)
  3. *
  4. * $Id: dgrs_i82596.h,v 1.1.1.1 2007/06/12 07:27:10 eyryu Exp $
  5. */
  6. /************************************************************************/
  7. /* */
  8. /* PORT commands (p. 4-20). The least significant nibble is one */
  9. /* of these commands, the rest of the command is a memory address */
  10. /* aligned on a 16 byte boundary. Note that port commands must */
  11. /* be written to the PORT address and the PORT address+2 with two */
  12. /* halfword writes. Write the LSH first to PORT, then the MSH to */
  13. /* PORT+2. Blame Intel. */
  14. /* */
  15. /************************************************************************/
  16. #define I596_PORT_RESET 0x0 /* Reset. Wait 5 SysClks & 10 TxClks */
  17. #define I596_PORT_SELFTEST 0x1 /* Do a selftest */
  18. #define I596_PORT_SCP_ADDR 0x2 /* Set new SCP address */
  19. #define I596_PORT_DUMP 0x3 /* Dump internal data structures */
  20. /*
  21. * I596_ST: Selftest results (p. 4-21)
  22. */
  23. typedef volatile struct
  24. {
  25. ulong signature; /* ROM checksum */
  26. ulong result; /* Selftest results: non-zero is a failure */
  27. } I596_ST;
  28. #define I596_ST_SELFTEST_FAIL 0x1000 /* Selftest Failed */
  29. #define I596_ST_DIAGNOSE_FAIL 0x0020 /* Diagnose Failed */
  30. #define I596_ST_BUSTIMER_FAIL 0x0010 /* Bus Timer Failed */
  31. #define I596_ST_REGISTER_FAIL 0x0008 /* Register Failed */
  32. #define I596_ST_ROM_FAIL 0x0004 /* ROM Failed */
  33. /*
  34. * I596_DUMP: Dump results
  35. */
  36. typedef volatile struct
  37. {
  38. ulong dump[77];
  39. } I596_DUMP;
  40. /************************************************************************/
  41. /* */
  42. /* I596_TBD: Transmit Buffer Descriptor (p. 4-59) */
  43. /* */
  44. /************************************************************************/
  45. typedef volatile struct _I596_TBD
  46. {
  47. ulong count;
  48. vol struct _I596_TBD *next;
  49. uchar *buf;
  50. ushort unused1;
  51. ushort unused2;
  52. } I596_TBD;
  53. #define I596_TBD_NOLINK ((I596_TBD *) 0xffffffff)
  54. #define I596_TBD_EOF 0x8000
  55. #define I596_TBD_COUNT_MASK 0x3fff
  56. /************************************************************************/
  57. /* */
  58. /* I596_TFD: Transmit Frame Descriptor (p. 4-56) */
  59. /* a.k.a. I596_CB_XMIT */
  60. /* */
  61. /************************************************************************/
  62. typedef volatile struct
  63. {
  64. ushort status;
  65. ushort cmd;
  66. union _I596_CB *next;
  67. I596_TBD *tbdp;
  68. ulong count; /* for speed */
  69. /* Application defined data follows structure... */
  70. #if 0 /* We don't use these intel defined ones */
  71. uchar addr[6];
  72. ushort len;
  73. uchar data[1];
  74. #else
  75. ulong dstchan;/* Used by multi-NIC mode */
  76. #endif
  77. } I596_TFD;
  78. #define I596_TFD_NOCRC 0x0010 /* cmd: No CRC insertion */
  79. #define I596_TFD_FLEX 0x0008 /* cmd: Flexible mode */
  80. /************************************************************************/
  81. /* */
  82. /* I596_RBD: Receive Buffer Descriptor (p. 4-84) */
  83. /* */
  84. /************************************************************************/
  85. typedef volatile struct _I596_RBD
  86. {
  87. #ifdef INTEL_RETENTIVE
  88. ushort count; /* Length of data in buf */
  89. ushort offset;
  90. #else
  91. ulong count; /* Length of data in buf */
  92. #endif
  93. vol struct _I596_RBD *next; /* Next buffer descriptor in list */
  94. uchar *buf; /* Data buffer */
  95. #ifdef INTEL_RETENTIVE
  96. ushort size; /* Size of buf (constant) */
  97. ushort zero;
  98. #else
  99. ulong size; /* Size of buf (constant) */
  100. #endif
  101. /* Application defined data follows structure... */
  102. uchar chan;
  103. uchar refcnt;
  104. ushort len;
  105. } I596_RBD;
  106. #define I596_RBD_NOLINK ((I596_RBD *) 0xffffffff)
  107. #define I596_RBD_EOF 0x8000 /* This is last buffer in a frame */
  108. #define I596_RBD_F 0x4000 /* The actual count is valid */
  109. #define I596_RBD_EL 0x8000 /* Last buffer in list */
  110. /************************************************************************/
  111. /* */
  112. /* I596_RFD: Receive Frame Descriptor (p. 4-79) */
  113. /* */
  114. /************************************************************************/
  115. typedef volatile struct _I596_RFD
  116. {
  117. ushort status;
  118. ushort cmd;
  119. vol struct _I596_RFD *next;
  120. vol struct _I596_RBD *rbdp;
  121. ushort count; /* Len of data in RFD: always 0 */
  122. ushort size; /* Size of RFD buffer: always 0 */
  123. /* Application defined data follows structure... */
  124. # if 0 /* We don't use these intel defined ones */
  125. uchar addr[6];
  126. ushort len;
  127. uchar data[1];
  128. # else
  129. ulong dstchan;/* Used by multi-nic mode */
  130. # endif
  131. } I596_RFD;
  132. #define I596_RFD_C 0x8000 /* status: frame complete */
  133. #define I596_RFD_B 0x4000 /* status: frame busy or waiting */
  134. #define I596_RFD_OK 0x2000 /* status: frame OK */
  135. #define I596_RFD_ERR_LENGTH 0x1000 /* status: length error */
  136. #define I596_RFD_ERR_CRC 0x0800 /* status: CRC error */
  137. #define I596_RFD_ERR_ALIGN 0x0400 /* status: alignment error */
  138. #define I596_RFD_ERR_NOBUFS 0x0200 /* status: resource error */
  139. #define I596_RFD_ERR_DMA 0x0100 /* status: DMA error */
  140. #define I596_RFD_ERR_SHORT 0x0080 /* status: too short error */
  141. #define I596_RFD_NOMATCH 0x0002 /* status: IA was not matched */
  142. #define I596_RFD_COLLISION 0x0001 /* status: collision during receive */
  143. #define I596_RFD_EL 0x8000 /* cmd: end of RFD list */
  144. #define I596_RFD_FLEX 0x0008 /* cmd: Flexible mode */
  145. #define I596_RFD_EOF 0x8000 /* count: last buffer in the frame */
  146. #define I596_RFD_F 0x4000 /* count: The actual count is valid */
  147. /************************************************************************/
  148. /* */
  149. /* Commands */
  150. /* */
  151. /************************************************************************/
  152. /* values for cmd halfword in all the structs below */
  153. #define I596_CB_CMD 0x07 /* CB COMMANDS */
  154. #define I596_CB_CMD_NOP 0
  155. #define I596_CB_CMD_IA 1
  156. #define I596_CB_CMD_CONF 2
  157. #define I596_CB_CMD_MCAST 3
  158. #define I596_CB_CMD_XMIT 4
  159. #define I596_CB_CMD_TDR 5
  160. #define I596_CB_CMD_DUMP 6
  161. #define I596_CB_CMD_DIAG 7
  162. #define I596_CB_CMD_EL 0x8000 /* CB is last in linked list */
  163. #define I596_CB_CMD_S 0x4000 /* Suspend after execution */
  164. #define I596_CB_CMD_I 0x2000 /* cause interrupt */
  165. /* values for the status halfword in all the struct below */
  166. #define I596_CB_STATUS 0xF000 /* All four status bits */
  167. #define I596_CB_STATUS_C 0x8000 /* Command complete */
  168. #define I596_CB_STATUS_B 0x4000 /* Command busy executing */
  169. #define I596_CB_STATUS_C_OR_B 0xC000 /* Command complete or busy */
  170. #define I596_CB_STATUS_OK 0x2000 /* Command complete, no errors */
  171. #define I596_CB_STATUS_A 0x1000 /* Command busy executing */
  172. #define I596_CB_NOLINK ((I596_CB *) 0xffffffff)
  173. /*
  174. * I596_CB_NOP: NOP Command (p. 4-34)
  175. */
  176. typedef volatile struct
  177. {
  178. ushort status;
  179. ushort cmd;
  180. union _I596_CB *next;
  181. } I596_CB_NOP;
  182. /*
  183. * Same as above, but command and status in one ulong for speed
  184. */
  185. typedef volatile struct
  186. {
  187. ulong csr;
  188. union _I596_CB *next;
  189. } I596_CB_FAST;
  190. #define FASTs(X) (X)
  191. #define FASTc(X) ((X)<<16)
  192. /*
  193. * I596_CB_IA: Individual (MAC) Address Command (p. 4-35)
  194. */
  195. typedef volatile struct
  196. {
  197. ushort status;
  198. ushort cmd;
  199. union _I596_CB *next;
  200. uchar addr[6];
  201. } I596_CB_IA;
  202. /*
  203. * I596_CB_CONF: Configure Command (p. 4-37)
  204. */
  205. typedef volatile struct
  206. {
  207. ushort status;
  208. ushort cmd;
  209. union _I596_CB *next;
  210. uchar conf[14];
  211. } I596_CB_CONF;
  212. #define I596_CONF0_P 0x80 /* Enable RBD Prefetch Bit */
  213. #define I596_CONF0_COUNT 14 /* Count of configuration bytes */
  214. #define I596_CONF1_MON_OFF 0xC0 /* Monitor mode: Monitor off */
  215. #define I596_CONF1_MON_ON 0x80 /* Monitor mode: Monitor on */
  216. #define I596_CONF1_TxFIFO(W) (W) /* TxFIFO trigger, in words */
  217. #define I596_CONF2_SAVEBF 0x80 /* Save bad frames */
  218. #define I596_CONF3_ADDRLEN(B) (B) /* Address length */
  219. #define I596_CONF3_NOSRCINSERT 0x08 /* Do not insert source address */
  220. #define I596_CONF3_PREAMBLE8 0x20 /* 8 byte preamble */
  221. #define I596_CONF3_LOOPOFF 0x00 /* Loopback: Off */
  222. #define I596_CONF3_LOOPINT 0x40 /* Loopback: internal */
  223. #define I596_CONF3_LOOPEXT 0xC0 /* Loopback: external */
  224. #define I596_CONF4_LINPRI(ST) (ST) /* Linear priority: slot times */
  225. #define I596_CONF4_EXPPRI(ST) (ST) /* Exponential priority: slot times */
  226. #define I596_CONF4_IEEE_BOM 0 /* IEEE 802.3 backoff method */
  227. #define I596_CONF5_IFS(X) (X) /* Interframe spacing in clocks */
  228. #define I596_CONF6_ST_LOW(X) (X&255) /* Slot time, low byte */
  229. #define I596_CONF7_ST_HI(X) (X>>8) /* Slot time, high bits */
  230. #define I596_CONF7_RETRY(X) (X<<4) /* Max retry number */
  231. #define I596_CONF8_PROMISC 0x01 /* Rcv all frames */
  232. #define I596_CONF8_NOBROAD 0x02
  233. #define I596_CONF8_MANCHESTER 0x04
  234. #define I596_CONF8_TxNOCRS 0x08
  235. #define I596_CONF8_NOCRC 0x10
  236. #define I596_CONF8_CRC_CCITT 0x20
  237. #define I596_CONF8_BITSTUFFING 0x40
  238. #define I596_CONF8_PADDING 0x80
  239. #define I596_CONF9_CSFILTER(X) (X)
  240. #define I596_CONF9_CSINT(X) 0x08
  241. #define I596_CONF9_CDFILTER(X) (X<<4)
  242. #define I596_CONF9_CDINT(X) 0x80
  243. #define I596_CONF10_MINLEN(X) (X) /* Minimum frame length */
  244. #define I596_CONF11_PRECRS_ 0x01 /* Preamble before carrier sense */
  245. #define I596_CONF11_LNGFLD_ 0x02 /* Padding in End of Carrier */
  246. #define I596_CONF11_CRCINM_ 0x04 /* CRC in memory */
  247. #define I596_CONF11_AUTOTX 0x08 /* Auto retransmit */
  248. #define I596_CONF11_CSBSAC_ 0x10 /* Collision detect by src addr cmp. */
  249. #define I596_CONF11_MCALL_ 0x20 /* Multicast all */
  250. #define I596_CONF13_RESERVED 0x3f /* Reserved: must be ones */
  251. #define I596_CONF13_MULTIA 0x40 /* Enable multiple addr. reception */
  252. #define I596_CONF13_DISBOF 0x80 /* Disable backoff algorithm */
  253. /*
  254. * I596_CB_MCAST: Multicast-Setup Command (p. 4-54)
  255. */
  256. typedef volatile struct
  257. {
  258. ushort status;
  259. ushort cmd;
  260. union _I596_CB *next;
  261. ushort count; /* Number of 6-byte addrs that follow */
  262. uchar addr[6][1];
  263. } I596_CB_MCAST;
  264. /*
  265. * I596_CB_XMIT: Transmit Command (p. 4-56)
  266. */
  267. typedef I596_TFD I596_CB_XMIT;
  268. #define I596_CB_XMIT_NOCRC 0x0010 /* cmd: No CRC insertion */
  269. #define I596_CB_XMIT_FLEX 0x0008 /* cmd: Flexible memory mode */
  270. #define I596_CB_XMIT_ERR_LATE 0x0800 /* status: error: late collision */
  271. #define I596_CB_XMIT_ERR_NOCRS 0x0400 /* status: error: no carriers sense */
  272. #define I596_CB_XMIT_ERR_NOCTS 0x0200 /* status: error: loss of CTS */
  273. #define I596_CB_XMIT_ERR_UNDER 0x0100 /* status: error: DMA underrun */
  274. #define I596_CB_XMIT_ERR_MAXCOL 0x0020 /* status: error: maximum collisions */
  275. #define I596_CB_XMIT_COLLISIONS 0x000f /* status: number of collisions */
  276. /*
  277. * I596_CB_TDR: Time Domain Reflectometry Command (p. 4-63)
  278. */
  279. typedef volatile struct
  280. {
  281. ushort status;
  282. ushort cmd;
  283. union _I596_CB *next;
  284. ushort time;
  285. } I596_CB_TDR;
  286. /*
  287. * I596_CB_DUMP: Dump Command (p. 4-65)
  288. */
  289. typedef volatile struct
  290. {
  291. ushort status;
  292. ushort cmd;
  293. union _I596_CB *next;
  294. uchar *buf;
  295. } I596_CB_DUMP;
  296. /*
  297. * I596_CB_DIAG: Diagnose Command (p. 4-77)
  298. */
  299. typedef volatile struct
  300. {
  301. ushort status;
  302. ushort cmd;
  303. union _I596_CB *next;
  304. } I596_CB_DIAG;
  305. /*
  306. * I596_CB: Command Block
  307. */
  308. typedef union _I596_CB
  309. {
  310. I596_CB_NOP nop;
  311. I596_CB_IA ia;
  312. I596_CB_CONF conf;
  313. I596_CB_MCAST mcast;
  314. I596_CB_XMIT xmit;
  315. I596_CB_TDR tdr;
  316. I596_CB_DUMP dump;
  317. I596_CB_DIAG diag;
  318. /* command and status in one ulong for speed... */
  319. I596_CB_FAST fast;
  320. } I596_CB;
  321. /************************************************************************/
  322. /* */
  323. /* I596_SCB: System Configuration Block (p. 4-26) */
  324. /* */
  325. /************************************************************************/
  326. typedef volatile struct
  327. {
  328. volatile ushort status; /* Status word */
  329. volatile ushort cmd; /* Command word */
  330. I596_CB *cbp;
  331. I596_RFD *rfdp;
  332. ulong crc_errs;
  333. ulong align_errs;
  334. ulong resource_errs;
  335. ulong overrun_errs;
  336. ulong rcvcdt_errs;
  337. ulong short_errs;
  338. ushort toff;
  339. ushort ton;
  340. } I596_SCB;
  341. /* cmd halfword values */
  342. #define I596_SCB_ACK 0xF000 /* ACKNOWLEDGMENTS */
  343. #define I596_SCB_ACK_CX 0x8000 /* Ack command completion */
  344. #define I596_SCB_ACK_FR 0x4000 /* Ack received frame */
  345. #define I596_SCB_ACK_CNA 0x2000 /* Ack command unit not active */
  346. #define I596_SCB_ACK_RNR 0x1000 /* Ack rcv unit not ready */
  347. #define I596_SCB_ACK_ALL 0xF000 /* Ack everything */
  348. #define I596_SCB_CUC 0x0700 /* COMMAND UNIT COMMANDS */
  349. #define I596_SCB_CUC_NOP 0x0000 /* No operation */
  350. #define I596_SCB_CUC_START 0x0100 /* Start execution of first CB */
  351. #define I596_SCB_CUC_RESUME 0x0200 /* Resume execution */
  352. #define I596_SCB_CUC_SUSPEND 0x0300 /* Suspend after current CB */
  353. #define I596_SCB_CUC_ABORT 0x0400 /* Abort current CB immediately */
  354. #define I596_SCB_CUC_LOAD 0x0500 /* Load Bus throttle timers */
  355. #define I596_SCB_CUC_LOADIMM 0x0600 /* Load Bus throttle timers, now */
  356. #define I596_SCB_RUC 0x0070 /* RECEIVE UNIT COMMANDS */
  357. #define I596_SCB_RUC_NOP 0x0000 /* No operation */
  358. #define I596_SCB_RUC_START 0x0010 /* Start reception */
  359. #define I596_SCB_RUC_RESUME 0x0020 /* Resume reception */
  360. #define I596_SCB_RUC_SUSPEND 0x0030 /* Suspend reception */
  361. #define I596_SCB_RUC_ABORT 0x0040 /* Abort reception */
  362. #define I596_SCB_RESET 0x0080 /* Hard reset chip */
  363. /* status halfword values */
  364. #define I596_SCB_STAT 0xF000 /* STATUS */
  365. #define I596_SCB_CX 0x8000 /* command completion */
  366. #define I596_SCB_FR 0x4000 /* received frame */
  367. #define I596_SCB_CNA 0x2000 /* command unit not active */
  368. #define I596_SCB_RNR 0x1000 /* rcv unit not ready */
  369. #define I596_SCB_CUS 0x0700 /* COMMAND UNIT STATUS */
  370. #define I596_SCB_CUS_IDLE 0x0000 /* Idle */
  371. #define I596_SCB_CUS_SUSPENDED 0x0100 /* Suspended */
  372. #define I596_SCB_CUS_ACTIVE 0x0200 /* Active */
  373. #define I596_SCB_RUS 0x00F0 /* RECEIVE UNIT STATUS */
  374. #define I596_SCB_RUS_IDLE 0x0000 /* Idle */
  375. #define I596_SCB_RUS_SUSPENDED 0x0010 /* Suspended */
  376. #define I596_SCB_RUS_NORES 0x0020 /* No Resources */
  377. #define I596_SCB_RUS_READY 0x0040 /* Ready */
  378. #define I596_SCB_RUS_NORBDS 0x0080 /* No more RBDs modifier */
  379. #define I596_SCB_LOADED 0x0008 /* Bus timers loaded */
  380. /************************************************************************/
  381. /* */
  382. /* I596_ISCP: Intermediate System Configuration Ptr (p 4-26) */
  383. /* */
  384. /************************************************************************/
  385. typedef volatile struct
  386. {
  387. ulong busy; /* Set to 1; I596 clears it when scbp is read */
  388. I596_SCB *scbp;
  389. } I596_ISCP;
  390. /************************************************************************/
  391. /* */
  392. /* I596_SCP: System Configuration Pointer (p. 4-23) */
  393. /* */
  394. /************************************************************************/
  395. typedef volatile struct
  396. {
  397. ulong sysbus;
  398. ulong dummy;
  399. I596_ISCP *iscpp;
  400. } I596_SCP;
  401. /* .sysbus values */
  402. #define I596_SCP_RESERVED 0x400000 /* Reserved bits must be set */
  403. #define I596_SCP_INTLOW 0x200000 /* Intr. Polarity active low */
  404. #define I596_SCP_INTHIGH 0 /* Intr. Polarity active high */
  405. #define I596_SCP_LOCKDIS 0x100000 /* Lock Function disabled */
  406. #define I596_SCP_LOCKEN 0 /* Lock Function enabled */
  407. #define I596_SCP_ETHROTTLE 0x080000 /* External Bus Throttle */
  408. #define I596_SCP_ITHROTTLE 0 /* Internal Bus Throttle */
  409. #define I596_SCP_LINEAR 0x040000 /* Linear Mode */
  410. #define I596_SCP_SEGMENTED 0x020000 /* Segmented Mode */
  411. #define I596_SCP_82586 0x000000 /* 82586 Mode */