au1000_eth.c 35 KB

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  1. /*
  2. *
  3. * Alchemy Au1x00 ethernet driver
  4. *
  5. * Copyright 2001-2003, 2006 MontaVista Software Inc.
  6. * Copyright 2002 TimeSys Corp.
  7. * Added ethtool/mii-tool support,
  8. * Copyright 2004 Matt Porter <mporter@kernel.crashing.org>
  9. * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de
  10. * or riemer@riemer-nt.de: fixed the link beat detection with
  11. * ioctls (SIOCGMIIPHY)
  12. * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
  13. * converted to use linux-2.6.x's PHY framework
  14. *
  15. * Author: MontaVista Software, Inc.
  16. * ppopov@mvista.com or source@mvista.com
  17. *
  18. * ########################################################################
  19. *
  20. * This program is free software; you can distribute it and/or modify it
  21. * under the terms of the GNU General Public License (Version 2) as
  22. * published by the Free Software Foundation.
  23. *
  24. * This program is distributed in the hope it will be useful, but WITHOUT
  25. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  26. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  27. * for more details.
  28. *
  29. * You should have received a copy of the GNU General Public License along
  30. * with this program; if not, write to the Free Software Foundation, Inc.,
  31. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  32. *
  33. * ########################################################################
  34. *
  35. *
  36. */
  37. #include <linux/module.h>
  38. #include <linux/kernel.h>
  39. #include <linux/string.h>
  40. #include <linux/timer.h>
  41. #include <linux/errno.h>
  42. #include <linux/in.h>
  43. #include <linux/ioport.h>
  44. #include <linux/bitops.h>
  45. #include <linux/slab.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/pci.h>
  48. #include <linux/init.h>
  49. #include <linux/netdevice.h>
  50. #include <linux/etherdevice.h>
  51. #include <linux/ethtool.h>
  52. #include <linux/mii.h>
  53. #include <linux/skbuff.h>
  54. #include <linux/delay.h>
  55. #include <linux/crc32.h>
  56. #include <linux/phy.h>
  57. #include <asm/mipsregs.h>
  58. #include <asm/irq.h>
  59. #include <asm/io.h>
  60. #include <asm/processor.h>
  61. #include <asm/mach-au1x00/au1000.h>
  62. #include <asm/cpu.h>
  63. #include "au1000_eth.h"
  64. #ifdef AU1000_ETH_DEBUG
  65. static int au1000_debug = 5;
  66. #else
  67. static int au1000_debug = 3;
  68. #endif
  69. #define DRV_NAME "au1000_eth"
  70. #define DRV_VERSION "1.6"
  71. #define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>"
  72. #define DRV_DESC "Au1xxx on-chip Ethernet driver"
  73. MODULE_AUTHOR(DRV_AUTHOR);
  74. MODULE_DESCRIPTION(DRV_DESC);
  75. MODULE_LICENSE("GPL");
  76. // prototypes
  77. static void hard_stop(struct net_device *);
  78. static void enable_rx_tx(struct net_device *dev);
  79. static struct net_device * au1000_probe(int port_num);
  80. static int au1000_init(struct net_device *);
  81. static int au1000_open(struct net_device *);
  82. static int au1000_close(struct net_device *);
  83. static int au1000_tx(struct sk_buff *, struct net_device *);
  84. static int au1000_rx(struct net_device *);
  85. static irqreturn_t au1000_interrupt(int, void *);
  86. static void au1000_tx_timeout(struct net_device *);
  87. static void set_rx_mode(struct net_device *);
  88. static struct net_device_stats *au1000_get_stats(struct net_device *);
  89. static int au1000_ioctl(struct net_device *, struct ifreq *, int);
  90. static int mdio_read(struct net_device *, int, int);
  91. static void mdio_write(struct net_device *, int, int, u16);
  92. static void au1000_adjust_link(struct net_device *);
  93. static void enable_mac(struct net_device *, int);
  94. // externs
  95. extern int get_ethernet_addr(char *ethernet_addr);
  96. extern void str2eaddr(unsigned char *ea, unsigned char *str);
  97. extern char * prom_getcmdline(void);
  98. /*
  99. * Theory of operation
  100. *
  101. * The Au1000 MACs use a simple rx and tx descriptor ring scheme.
  102. * There are four receive and four transmit descriptors. These
  103. * descriptors are not in memory; rather, they are just a set of
  104. * hardware registers.
  105. *
  106. * Since the Au1000 has a coherent data cache, the receive and
  107. * transmit buffers are allocated from the KSEG0 segment. The
  108. * hardware registers, however, are still mapped at KSEG1 to
  109. * make sure there's no out-of-order writes, and that all writes
  110. * complete immediately.
  111. */
  112. /* These addresses are only used if yamon doesn't tell us what
  113. * the mac address is, and the mac address is not passed on the
  114. * command line.
  115. */
  116. static unsigned char au1000_mac_addr[6] __devinitdata = {
  117. 0x00, 0x50, 0xc2, 0x0c, 0x30, 0x00
  118. };
  119. struct au1000_private *au_macs[NUM_ETH_INTERFACES];
  120. /*
  121. * board-specific configurations
  122. *
  123. * PHY detection algorithm
  124. *
  125. * If AU1XXX_PHY_STATIC_CONFIG is undefined, the PHY setup is
  126. * autodetected:
  127. *
  128. * mii_probe() first searches the current MAC's MII bus for a PHY,
  129. * selecting the first (or last, if AU1XXX_PHY_SEARCH_HIGHEST_ADDR is
  130. * defined) PHY address not already claimed by another netdev.
  131. *
  132. * If nothing was found that way when searching for the 2nd ethernet
  133. * controller's PHY and AU1XXX_PHY1_SEARCH_ON_MAC0 is defined, then
  134. * the first MII bus is searched as well for an unclaimed PHY; this is
  135. * needed in case of a dual-PHY accessible only through the MAC0's MII
  136. * bus.
  137. *
  138. * Finally, if no PHY is found, then the corresponding ethernet
  139. * controller is not registered to the network subsystem.
  140. */
  141. /* autodetection defaults */
  142. #undef AU1XXX_PHY_SEARCH_HIGHEST_ADDR
  143. #define AU1XXX_PHY1_SEARCH_ON_MAC0
  144. /* static PHY setup
  145. *
  146. * most boards PHY setup should be detectable properly with the
  147. * autodetection algorithm in mii_probe(), but in some cases (e.g. if
  148. * you have a switch attached, or want to use the PHY's interrupt
  149. * notification capabilities) you can provide a static PHY
  150. * configuration here
  151. *
  152. * IRQs may only be set, if a PHY address was configured
  153. * If a PHY address is given, also a bus id is required to be set
  154. *
  155. * ps: make sure the used irqs are configured properly in the board
  156. * specific irq-map
  157. */
  158. #if defined(CONFIG_MIPS_BOSPORUS)
  159. /*
  160. * Micrel/Kendin 5 port switch attached to MAC0,
  161. * MAC0 is associated with PHY address 5 (== WAN port)
  162. * MAC1 is not associated with any PHY, since it's connected directly
  163. * to the switch.
  164. * no interrupts are used
  165. */
  166. # define AU1XXX_PHY_STATIC_CONFIG
  167. # define AU1XXX_PHY0_ADDR 5
  168. # define AU1XXX_PHY0_BUSID 0
  169. # undef AU1XXX_PHY0_IRQ
  170. # undef AU1XXX_PHY1_ADDR
  171. # undef AU1XXX_PHY1_BUSID
  172. # undef AU1XXX_PHY1_IRQ
  173. #endif
  174. #if defined(AU1XXX_PHY0_BUSID) && (AU1XXX_PHY0_BUSID > 0)
  175. # error MAC0-associated PHY attached 2nd MACs MII bus not supported yet
  176. #endif
  177. /*
  178. * MII operations
  179. */
  180. static int mdio_read(struct net_device *dev, int phy_addr, int reg)
  181. {
  182. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  183. volatile u32 *const mii_control_reg = &aup->mac->mii_control;
  184. volatile u32 *const mii_data_reg = &aup->mac->mii_data;
  185. u32 timedout = 20;
  186. u32 mii_control;
  187. while (*mii_control_reg & MAC_MII_BUSY) {
  188. mdelay(1);
  189. if (--timedout == 0) {
  190. printk(KERN_ERR "%s: read_MII busy timeout!!\n",
  191. dev->name);
  192. return -1;
  193. }
  194. }
  195. mii_control = MAC_SET_MII_SELECT_REG(reg) |
  196. MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ;
  197. *mii_control_reg = mii_control;
  198. timedout = 20;
  199. while (*mii_control_reg & MAC_MII_BUSY) {
  200. mdelay(1);
  201. if (--timedout == 0) {
  202. printk(KERN_ERR "%s: mdio_read busy timeout!!\n",
  203. dev->name);
  204. return -1;
  205. }
  206. }
  207. return (int)*mii_data_reg;
  208. }
  209. static void mdio_write(struct net_device *dev, int phy_addr, int reg, u16 value)
  210. {
  211. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  212. volatile u32 *const mii_control_reg = &aup->mac->mii_control;
  213. volatile u32 *const mii_data_reg = &aup->mac->mii_data;
  214. u32 timedout = 20;
  215. u32 mii_control;
  216. while (*mii_control_reg & MAC_MII_BUSY) {
  217. mdelay(1);
  218. if (--timedout == 0) {
  219. printk(KERN_ERR "%s: mdio_write busy timeout!!\n",
  220. dev->name);
  221. return;
  222. }
  223. }
  224. mii_control = MAC_SET_MII_SELECT_REG(reg) |
  225. MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE;
  226. *mii_data_reg = value;
  227. *mii_control_reg = mii_control;
  228. }
  229. static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
  230. {
  231. /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
  232. * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus) */
  233. struct net_device *const dev = bus->priv;
  234. enable_mac(dev, 0); /* make sure the MAC associated with this
  235. * mii_bus is enabled */
  236. return mdio_read(dev, phy_addr, regnum);
  237. }
  238. static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
  239. u16 value)
  240. {
  241. struct net_device *const dev = bus->priv;
  242. enable_mac(dev, 0); /* make sure the MAC associated with this
  243. * mii_bus is enabled */
  244. mdio_write(dev, phy_addr, regnum, value);
  245. return 0;
  246. }
  247. static int mdiobus_reset(struct mii_bus *bus)
  248. {
  249. struct net_device *const dev = bus->priv;
  250. enable_mac(dev, 0); /* make sure the MAC associated with this
  251. * mii_bus is enabled */
  252. return 0;
  253. }
  254. static int mii_probe (struct net_device *dev)
  255. {
  256. struct au1000_private *const aup = (struct au1000_private *) dev->priv;
  257. struct phy_device *phydev = NULL;
  258. #if defined(AU1XXX_PHY_STATIC_CONFIG)
  259. BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
  260. if(aup->mac_id == 0) { /* get PHY0 */
  261. # if defined(AU1XXX_PHY0_ADDR)
  262. phydev = au_macs[AU1XXX_PHY0_BUSID]->mii_bus.phy_map[AU1XXX_PHY0_ADDR];
  263. # else
  264. printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
  265. dev->name);
  266. return 0;
  267. # endif /* defined(AU1XXX_PHY0_ADDR) */
  268. } else if (aup->mac_id == 1) { /* get PHY1 */
  269. # if defined(AU1XXX_PHY1_ADDR)
  270. phydev = au_macs[AU1XXX_PHY1_BUSID]->mii_bus.phy_map[AU1XXX_PHY1_ADDR];
  271. # else
  272. printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
  273. dev->name);
  274. return 0;
  275. # endif /* defined(AU1XXX_PHY1_ADDR) */
  276. }
  277. #else /* defined(AU1XXX_PHY_STATIC_CONFIG) */
  278. int phy_addr;
  279. /* find the first (lowest address) PHY on the current MAC's MII bus */
  280. for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
  281. if (aup->mii_bus.phy_map[phy_addr]) {
  282. phydev = aup->mii_bus.phy_map[phy_addr];
  283. # if !defined(AU1XXX_PHY_SEARCH_HIGHEST_ADDR)
  284. break; /* break out with first one found */
  285. # endif
  286. }
  287. # if defined(AU1XXX_PHY1_SEARCH_ON_MAC0)
  288. /* try harder to find a PHY */
  289. if (!phydev && (aup->mac_id == 1)) {
  290. /* no PHY found, maybe we have a dual PHY? */
  291. printk (KERN_INFO DRV_NAME ": no PHY found on MAC1, "
  292. "let's see if it's attached to MAC0...\n");
  293. BUG_ON(!au_macs[0]);
  294. /* find the first (lowest address) non-attached PHY on
  295. * the MAC0 MII bus */
  296. for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
  297. struct phy_device *const tmp_phydev =
  298. au_macs[0]->mii_bus.phy_map[phy_addr];
  299. if (!tmp_phydev)
  300. continue; /* no PHY here... */
  301. if (tmp_phydev->attached_dev)
  302. continue; /* already claimed by MAC0 */
  303. phydev = tmp_phydev;
  304. break; /* found it */
  305. }
  306. }
  307. # endif /* defined(AU1XXX_PHY1_SEARCH_OTHER_BUS) */
  308. #endif /* defined(AU1XXX_PHY_STATIC_CONFIG) */
  309. if (!phydev) {
  310. printk (KERN_ERR DRV_NAME ":%s: no PHY found\n", dev->name);
  311. return -1;
  312. }
  313. /* now we are supposed to have a proper phydev, to attach to... */
  314. BUG_ON(!phydev);
  315. BUG_ON(phydev->attached_dev);
  316. phydev = phy_connect(dev, phydev->dev.bus_id, &au1000_adjust_link, 0,
  317. PHY_INTERFACE_MODE_MII);
  318. if (IS_ERR(phydev)) {
  319. printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
  320. return PTR_ERR(phydev);
  321. }
  322. /* mask with MAC supported features */
  323. phydev->supported &= (SUPPORTED_10baseT_Half
  324. | SUPPORTED_10baseT_Full
  325. | SUPPORTED_100baseT_Half
  326. | SUPPORTED_100baseT_Full
  327. | SUPPORTED_Autoneg
  328. /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
  329. | SUPPORTED_MII
  330. | SUPPORTED_TP);
  331. phydev->advertising = phydev->supported;
  332. aup->old_link = 0;
  333. aup->old_speed = 0;
  334. aup->old_duplex = -1;
  335. aup->phy_dev = phydev;
  336. printk(KERN_INFO "%s: attached PHY driver [%s] "
  337. "(mii_bus:phy_addr=%s, irq=%d)\n",
  338. dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
  339. return 0;
  340. }
  341. /*
  342. * Buffer allocation/deallocation routines. The buffer descriptor returned
  343. * has the virtual and dma address of a buffer suitable for
  344. * both, receive and transmit operations.
  345. */
  346. static db_dest_t *GetFreeDB(struct au1000_private *aup)
  347. {
  348. db_dest_t *pDB;
  349. pDB = aup->pDBfree;
  350. if (pDB) {
  351. aup->pDBfree = pDB->pnext;
  352. }
  353. return pDB;
  354. }
  355. void ReleaseDB(struct au1000_private *aup, db_dest_t *pDB)
  356. {
  357. db_dest_t *pDBfree = aup->pDBfree;
  358. if (pDBfree)
  359. pDBfree->pnext = pDB;
  360. aup->pDBfree = pDB;
  361. }
  362. static void enable_rx_tx(struct net_device *dev)
  363. {
  364. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  365. if (au1000_debug > 4)
  366. printk(KERN_INFO "%s: enable_rx_tx\n", dev->name);
  367. aup->mac->control |= (MAC_RX_ENABLE | MAC_TX_ENABLE);
  368. au_sync_delay(10);
  369. }
  370. static void hard_stop(struct net_device *dev)
  371. {
  372. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  373. if (au1000_debug > 4)
  374. printk(KERN_INFO "%s: hard stop\n", dev->name);
  375. aup->mac->control &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE);
  376. au_sync_delay(10);
  377. }
  378. static void enable_mac(struct net_device *dev, int force_reset)
  379. {
  380. unsigned long flags;
  381. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  382. spin_lock_irqsave(&aup->lock, flags);
  383. if(force_reset || (!aup->mac_enabled)) {
  384. *aup->enable = MAC_EN_CLOCK_ENABLE;
  385. au_sync_delay(2);
  386. *aup->enable = (MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
  387. | MAC_EN_CLOCK_ENABLE);
  388. au_sync_delay(2);
  389. aup->mac_enabled = 1;
  390. }
  391. spin_unlock_irqrestore(&aup->lock, flags);
  392. }
  393. static void reset_mac_unlocked(struct net_device *dev)
  394. {
  395. struct au1000_private *const aup = (struct au1000_private *) dev->priv;
  396. int i;
  397. hard_stop(dev);
  398. *aup->enable = MAC_EN_CLOCK_ENABLE;
  399. au_sync_delay(2);
  400. *aup->enable = 0;
  401. au_sync_delay(2);
  402. aup->tx_full = 0;
  403. for (i = 0; i < NUM_RX_DMA; i++) {
  404. /* reset control bits */
  405. aup->rx_dma_ring[i]->buff_stat &= ~0xf;
  406. }
  407. for (i = 0; i < NUM_TX_DMA; i++) {
  408. /* reset control bits */
  409. aup->tx_dma_ring[i]->buff_stat &= ~0xf;
  410. }
  411. aup->mac_enabled = 0;
  412. }
  413. static void reset_mac(struct net_device *dev)
  414. {
  415. struct au1000_private *const aup = (struct au1000_private *) dev->priv;
  416. unsigned long flags;
  417. if (au1000_debug > 4)
  418. printk(KERN_INFO "%s: reset mac, aup %x\n",
  419. dev->name, (unsigned)aup);
  420. spin_lock_irqsave(&aup->lock, flags);
  421. reset_mac_unlocked (dev);
  422. spin_unlock_irqrestore(&aup->lock, flags);
  423. }
  424. /*
  425. * Setup the receive and transmit "rings". These pointers are the addresses
  426. * of the rx and tx MAC DMA registers so they are fixed by the hardware --
  427. * these are not descriptors sitting in memory.
  428. */
  429. static void
  430. setup_hw_rings(struct au1000_private *aup, u32 rx_base, u32 tx_base)
  431. {
  432. int i;
  433. for (i = 0; i < NUM_RX_DMA; i++) {
  434. aup->rx_dma_ring[i] =
  435. (volatile rx_dma_t *) (rx_base + sizeof(rx_dma_t)*i);
  436. }
  437. for (i = 0; i < NUM_TX_DMA; i++) {
  438. aup->tx_dma_ring[i] =
  439. (volatile tx_dma_t *) (tx_base + sizeof(tx_dma_t)*i);
  440. }
  441. }
  442. static struct {
  443. u32 base_addr;
  444. u32 macen_addr;
  445. int irq;
  446. struct net_device *dev;
  447. } iflist[2] = {
  448. #ifdef CONFIG_SOC_AU1000
  449. {AU1000_ETH0_BASE, AU1000_MAC0_ENABLE, AU1000_MAC0_DMA_INT},
  450. {AU1000_ETH1_BASE, AU1000_MAC1_ENABLE, AU1000_MAC1_DMA_INT}
  451. #endif
  452. #ifdef CONFIG_SOC_AU1100
  453. {AU1100_ETH0_BASE, AU1100_MAC0_ENABLE, AU1100_MAC0_DMA_INT}
  454. #endif
  455. #ifdef CONFIG_SOC_AU1500
  456. {AU1500_ETH0_BASE, AU1500_MAC0_ENABLE, AU1500_MAC0_DMA_INT},
  457. {AU1500_ETH1_BASE, AU1500_MAC1_ENABLE, AU1500_MAC1_DMA_INT}
  458. #endif
  459. #ifdef CONFIG_SOC_AU1550
  460. {AU1550_ETH0_BASE, AU1550_MAC0_ENABLE, AU1550_MAC0_DMA_INT},
  461. {AU1550_ETH1_BASE, AU1550_MAC1_ENABLE, AU1550_MAC1_DMA_INT}
  462. #endif
  463. };
  464. static int num_ifs;
  465. /*
  466. * Setup the base address and interupt of the Au1xxx ethernet macs
  467. * based on cpu type and whether the interface is enabled in sys_pinfunc
  468. * register. The last interface is enabled if SYS_PF_NI2 (bit 4) is 0.
  469. */
  470. static int __init au1000_init_module(void)
  471. {
  472. int ni = (int)((au_readl(SYS_PINFUNC) & (u32)(SYS_PF_NI2)) >> 4);
  473. struct net_device *dev;
  474. int i, found_one = 0;
  475. num_ifs = NUM_ETH_INTERFACES - ni;
  476. for(i = 0; i < num_ifs; i++) {
  477. dev = au1000_probe(i);
  478. iflist[i].dev = dev;
  479. if (dev)
  480. found_one++;
  481. }
  482. if (!found_one)
  483. return -ENODEV;
  484. return 0;
  485. }
  486. /*
  487. * ethtool operations
  488. */
  489. static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  490. {
  491. struct au1000_private *aup = (struct au1000_private *)dev->priv;
  492. if (aup->phy_dev)
  493. return phy_ethtool_gset(aup->phy_dev, cmd);
  494. return -EINVAL;
  495. }
  496. static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  497. {
  498. struct au1000_private *aup = (struct au1000_private *)dev->priv;
  499. if (!capable(CAP_NET_ADMIN))
  500. return -EPERM;
  501. if (aup->phy_dev)
  502. return phy_ethtool_sset(aup->phy_dev, cmd);
  503. return -EINVAL;
  504. }
  505. static void
  506. au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  507. {
  508. struct au1000_private *aup = (struct au1000_private *)dev->priv;
  509. strcpy(info->driver, DRV_NAME);
  510. strcpy(info->version, DRV_VERSION);
  511. info->fw_version[0] = '\0';
  512. sprintf(info->bus_info, "%s %d", DRV_NAME, aup->mac_id);
  513. info->regdump_len = 0;
  514. }
  515. static const struct ethtool_ops au1000_ethtool_ops = {
  516. .get_settings = au1000_get_settings,
  517. .set_settings = au1000_set_settings,
  518. .get_drvinfo = au1000_get_drvinfo,
  519. .get_link = ethtool_op_get_link,
  520. };
  521. static struct net_device * au1000_probe(int port_num)
  522. {
  523. static unsigned version_printed = 0;
  524. struct au1000_private *aup = NULL;
  525. struct net_device *dev = NULL;
  526. db_dest_t *pDB, *pDBfree;
  527. char *pmac, *argptr;
  528. char ethaddr[6];
  529. int irq, i, err;
  530. u32 base, macen;
  531. if (port_num >= NUM_ETH_INTERFACES)
  532. return NULL;
  533. base = CPHYSADDR(iflist[port_num].base_addr );
  534. macen = CPHYSADDR(iflist[port_num].macen_addr);
  535. irq = iflist[port_num].irq;
  536. if (!request_mem_region( base, MAC_IOSIZE, "Au1x00 ENET") ||
  537. !request_mem_region(macen, 4, "Au1x00 ENET"))
  538. return NULL;
  539. if (version_printed++ == 0)
  540. printk("%s version %s %s\n", DRV_NAME, DRV_VERSION, DRV_AUTHOR);
  541. dev = alloc_etherdev(sizeof(struct au1000_private));
  542. if (!dev) {
  543. printk(KERN_ERR "%s: alloc_etherdev failed\n", DRV_NAME);
  544. return NULL;
  545. }
  546. if ((err = register_netdev(dev)) != 0) {
  547. printk(KERN_ERR "%s: Cannot register net device, error %d\n",
  548. DRV_NAME, err);
  549. free_netdev(dev);
  550. return NULL;
  551. }
  552. printk("%s: Au1xx0 Ethernet found at 0x%x, irq %d\n",
  553. dev->name, base, irq);
  554. aup = dev->priv;
  555. /* Allocate the data buffers */
  556. /* Snooping works fine with eth on all au1xxx */
  557. aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
  558. (NUM_TX_BUFFS + NUM_RX_BUFFS),
  559. &aup->dma_addr, 0);
  560. if (!aup->vaddr) {
  561. free_netdev(dev);
  562. release_mem_region( base, MAC_IOSIZE);
  563. release_mem_region(macen, 4);
  564. return NULL;
  565. }
  566. /* aup->mac is the base address of the MAC's registers */
  567. aup->mac = (volatile mac_reg_t *)iflist[port_num].base_addr;
  568. /* Setup some variables for quick register address access */
  569. aup->enable = (volatile u32 *)iflist[port_num].macen_addr;
  570. aup->mac_id = port_num;
  571. au_macs[port_num] = aup;
  572. if (port_num == 0) {
  573. /* Check the environment variables first */
  574. if (get_ethernet_addr(ethaddr) == 0)
  575. memcpy(au1000_mac_addr, ethaddr, sizeof(au1000_mac_addr));
  576. else {
  577. /* Check command line */
  578. argptr = prom_getcmdline();
  579. if ((pmac = strstr(argptr, "ethaddr=")) == NULL)
  580. printk(KERN_INFO "%s: No MAC address found\n",
  581. dev->name);
  582. /* Use the hard coded MAC addresses */
  583. else {
  584. str2eaddr(ethaddr, pmac + strlen("ethaddr="));
  585. memcpy(au1000_mac_addr, ethaddr,
  586. sizeof(au1000_mac_addr));
  587. }
  588. }
  589. setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
  590. } else if (port_num == 1)
  591. setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
  592. /*
  593. * Assign to the Ethernet ports two consecutive MAC addresses
  594. * to match those that are printed on their stickers
  595. */
  596. memcpy(dev->dev_addr, au1000_mac_addr, sizeof(au1000_mac_addr));
  597. dev->dev_addr[5] += port_num;
  598. *aup->enable = 0;
  599. aup->mac_enabled = 0;
  600. aup->mii_bus.priv = dev;
  601. aup->mii_bus.read = mdiobus_read;
  602. aup->mii_bus.write = mdiobus_write;
  603. aup->mii_bus.reset = mdiobus_reset;
  604. aup->mii_bus.name = "au1000_eth_mii";
  605. aup->mii_bus.id = aup->mac_id;
  606. aup->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
  607. for(i = 0; i < PHY_MAX_ADDR; ++i)
  608. aup->mii_bus.irq[i] = PHY_POLL;
  609. /* if known, set corresponding PHY IRQs */
  610. #if defined(AU1XXX_PHY_STATIC_CONFIG)
  611. # if defined(AU1XXX_PHY0_IRQ)
  612. if (AU1XXX_PHY0_BUSID == aup->mii_bus.id)
  613. aup->mii_bus.irq[AU1XXX_PHY0_ADDR] = AU1XXX_PHY0_IRQ;
  614. # endif
  615. # if defined(AU1XXX_PHY1_IRQ)
  616. if (AU1XXX_PHY1_BUSID == aup->mii_bus.id)
  617. aup->mii_bus.irq[AU1XXX_PHY1_ADDR] = AU1XXX_PHY1_IRQ;
  618. # endif
  619. #endif
  620. mdiobus_register(&aup->mii_bus);
  621. if (mii_probe(dev) != 0) {
  622. goto err_out;
  623. }
  624. pDBfree = NULL;
  625. /* setup the data buffer descriptors and attach a buffer to each one */
  626. pDB = aup->db;
  627. for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
  628. pDB->pnext = pDBfree;
  629. pDBfree = pDB;
  630. pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
  631. pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
  632. pDB++;
  633. }
  634. aup->pDBfree = pDBfree;
  635. for (i = 0; i < NUM_RX_DMA; i++) {
  636. pDB = GetFreeDB(aup);
  637. if (!pDB) {
  638. goto err_out;
  639. }
  640. aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
  641. aup->rx_db_inuse[i] = pDB;
  642. }
  643. for (i = 0; i < NUM_TX_DMA; i++) {
  644. pDB = GetFreeDB(aup);
  645. if (!pDB) {
  646. goto err_out;
  647. }
  648. aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
  649. aup->tx_dma_ring[i]->len = 0;
  650. aup->tx_db_inuse[i] = pDB;
  651. }
  652. spin_lock_init(&aup->lock);
  653. dev->base_addr = base;
  654. dev->irq = irq;
  655. dev->open = au1000_open;
  656. dev->hard_start_xmit = au1000_tx;
  657. dev->stop = au1000_close;
  658. dev->get_stats = au1000_get_stats;
  659. dev->set_multicast_list = &set_rx_mode;
  660. dev->do_ioctl = &au1000_ioctl;
  661. SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
  662. dev->tx_timeout = au1000_tx_timeout;
  663. dev->watchdog_timeo = ETH_TX_TIMEOUT;
  664. /*
  665. * The boot code uses the ethernet controller, so reset it to start
  666. * fresh. au1000_init() expects that the device is in reset state.
  667. */
  668. reset_mac(dev);
  669. return dev;
  670. err_out:
  671. /* here we should have a valid dev plus aup-> register addresses
  672. * so we can reset the mac properly.*/
  673. reset_mac(dev);
  674. for (i = 0; i < NUM_RX_DMA; i++) {
  675. if (aup->rx_db_inuse[i])
  676. ReleaseDB(aup, aup->rx_db_inuse[i]);
  677. }
  678. for (i = 0; i < NUM_TX_DMA; i++) {
  679. if (aup->tx_db_inuse[i])
  680. ReleaseDB(aup, aup->tx_db_inuse[i]);
  681. }
  682. dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),
  683. (void *)aup->vaddr, aup->dma_addr);
  684. unregister_netdev(dev);
  685. free_netdev(dev);
  686. release_mem_region( base, MAC_IOSIZE);
  687. release_mem_region(macen, 4);
  688. return NULL;
  689. }
  690. /*
  691. * Initialize the interface.
  692. *
  693. * When the device powers up, the clocks are disabled and the
  694. * mac is in reset state. When the interface is closed, we
  695. * do the same -- reset the device and disable the clocks to
  696. * conserve power. Thus, whenever au1000_init() is called,
  697. * the device should already be in reset state.
  698. */
  699. static int au1000_init(struct net_device *dev)
  700. {
  701. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  702. u32 flags;
  703. int i;
  704. u32 control;
  705. if (au1000_debug > 4)
  706. printk("%s: au1000_init\n", dev->name);
  707. /* bring the device out of reset */
  708. enable_mac(dev, 1);
  709. spin_lock_irqsave(&aup->lock, flags);
  710. aup->mac->control = 0;
  711. aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
  712. aup->tx_tail = aup->tx_head;
  713. aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2;
  714. aup->mac->mac_addr_high = dev->dev_addr[5]<<8 | dev->dev_addr[4];
  715. aup->mac->mac_addr_low = dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
  716. dev->dev_addr[1]<<8 | dev->dev_addr[0];
  717. for (i = 0; i < NUM_RX_DMA; i++) {
  718. aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE;
  719. }
  720. au_sync();
  721. control = MAC_RX_ENABLE | MAC_TX_ENABLE;
  722. #ifndef CONFIG_CPU_LITTLE_ENDIAN
  723. control |= MAC_BIG_ENDIAN;
  724. #endif
  725. if (aup->phy_dev) {
  726. if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
  727. control |= MAC_FULL_DUPLEX;
  728. else
  729. control |= MAC_DISABLE_RX_OWN;
  730. } else { /* PHY-less op, assume full-duplex */
  731. control |= MAC_FULL_DUPLEX;
  732. }
  733. aup->mac->control = control;
  734. aup->mac->vlan1_tag = 0x8100; /* activate vlan support */
  735. au_sync();
  736. spin_unlock_irqrestore(&aup->lock, flags);
  737. return 0;
  738. }
  739. static void
  740. au1000_adjust_link(struct net_device *dev)
  741. {
  742. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  743. struct phy_device *phydev = aup->phy_dev;
  744. unsigned long flags;
  745. int status_change = 0;
  746. BUG_ON(!aup->phy_dev);
  747. spin_lock_irqsave(&aup->lock, flags);
  748. if (phydev->link && (aup->old_speed != phydev->speed)) {
  749. // speed changed
  750. switch(phydev->speed) {
  751. case SPEED_10:
  752. case SPEED_100:
  753. break;
  754. default:
  755. printk(KERN_WARNING
  756. "%s: Speed (%d) is not 10/100 ???\n",
  757. dev->name, phydev->speed);
  758. break;
  759. }
  760. aup->old_speed = phydev->speed;
  761. status_change = 1;
  762. }
  763. if (phydev->link && (aup->old_duplex != phydev->duplex)) {
  764. // duplex mode changed
  765. /* switching duplex mode requires to disable rx and tx! */
  766. hard_stop(dev);
  767. if (DUPLEX_FULL == phydev->duplex)
  768. aup->mac->control = ((aup->mac->control
  769. | MAC_FULL_DUPLEX)
  770. & ~MAC_DISABLE_RX_OWN);
  771. else
  772. aup->mac->control = ((aup->mac->control
  773. & ~MAC_FULL_DUPLEX)
  774. | MAC_DISABLE_RX_OWN);
  775. au_sync_delay(1);
  776. enable_rx_tx(dev);
  777. aup->old_duplex = phydev->duplex;
  778. status_change = 1;
  779. }
  780. if(phydev->link != aup->old_link) {
  781. // link state changed
  782. if (phydev->link) // link went up
  783. netif_schedule(dev);
  784. else { // link went down
  785. aup->old_speed = 0;
  786. aup->old_duplex = -1;
  787. }
  788. aup->old_link = phydev->link;
  789. status_change = 1;
  790. }
  791. spin_unlock_irqrestore(&aup->lock, flags);
  792. if (status_change) {
  793. if (phydev->link)
  794. printk(KERN_INFO "%s: link up (%d/%s)\n",
  795. dev->name, phydev->speed,
  796. DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
  797. else
  798. printk(KERN_INFO "%s: link down\n", dev->name);
  799. }
  800. }
  801. static int au1000_open(struct net_device *dev)
  802. {
  803. int retval;
  804. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  805. if (au1000_debug > 4)
  806. printk("%s: open: dev=%p\n", dev->name, dev);
  807. if ((retval = request_irq(dev->irq, &au1000_interrupt, 0,
  808. dev->name, dev))) {
  809. printk(KERN_ERR "%s: unable to get IRQ %d\n",
  810. dev->name, dev->irq);
  811. return retval;
  812. }
  813. if ((retval = au1000_init(dev))) {
  814. printk(KERN_ERR "%s: error in au1000_init\n", dev->name);
  815. free_irq(dev->irq, dev);
  816. return retval;
  817. }
  818. if (aup->phy_dev) {
  819. /* cause the PHY state machine to schedule a link state check */
  820. aup->phy_dev->state = PHY_CHANGELINK;
  821. phy_start(aup->phy_dev);
  822. }
  823. netif_start_queue(dev);
  824. if (au1000_debug > 4)
  825. printk("%s: open: Initialization done.\n", dev->name);
  826. return 0;
  827. }
  828. static int au1000_close(struct net_device *dev)
  829. {
  830. unsigned long flags;
  831. struct au1000_private *const aup = (struct au1000_private *) dev->priv;
  832. if (au1000_debug > 4)
  833. printk("%s: close: dev=%p\n", dev->name, dev);
  834. if (aup->phy_dev)
  835. phy_stop(aup->phy_dev);
  836. spin_lock_irqsave(&aup->lock, flags);
  837. reset_mac_unlocked (dev);
  838. /* stop the device */
  839. netif_stop_queue(dev);
  840. /* disable the interrupt */
  841. free_irq(dev->irq, dev);
  842. spin_unlock_irqrestore(&aup->lock, flags);
  843. return 0;
  844. }
  845. static void __exit au1000_cleanup_module(void)
  846. {
  847. int i, j;
  848. struct net_device *dev;
  849. struct au1000_private *aup;
  850. for (i = 0; i < num_ifs; i++) {
  851. dev = iflist[i].dev;
  852. if (dev) {
  853. aup = (struct au1000_private *) dev->priv;
  854. unregister_netdev(dev);
  855. for (j = 0; j < NUM_RX_DMA; j++)
  856. if (aup->rx_db_inuse[j])
  857. ReleaseDB(aup, aup->rx_db_inuse[j]);
  858. for (j = 0; j < NUM_TX_DMA; j++)
  859. if (aup->tx_db_inuse[j])
  860. ReleaseDB(aup, aup->tx_db_inuse[j]);
  861. dma_free_noncoherent(NULL, MAX_BUF_SIZE *
  862. (NUM_TX_BUFFS + NUM_RX_BUFFS),
  863. (void *)aup->vaddr, aup->dma_addr);
  864. release_mem_region(dev->base_addr, MAC_IOSIZE);
  865. release_mem_region(CPHYSADDR(iflist[i].macen_addr), 4);
  866. free_netdev(dev);
  867. }
  868. }
  869. }
  870. static void update_tx_stats(struct net_device *dev, u32 status)
  871. {
  872. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  873. struct net_device_stats *ps = &aup->stats;
  874. if (status & TX_FRAME_ABORTED) {
  875. if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
  876. if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) {
  877. /* any other tx errors are only valid
  878. * in half duplex mode */
  879. ps->tx_errors++;
  880. ps->tx_aborted_errors++;
  881. }
  882. }
  883. else {
  884. ps->tx_errors++;
  885. ps->tx_aborted_errors++;
  886. if (status & (TX_NO_CARRIER | TX_LOSS_CARRIER))
  887. ps->tx_carrier_errors++;
  888. }
  889. }
  890. }
  891. /*
  892. * Called from the interrupt service routine to acknowledge
  893. * the TX DONE bits. This is a must if the irq is setup as
  894. * edge triggered.
  895. */
  896. static void au1000_tx_ack(struct net_device *dev)
  897. {
  898. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  899. volatile tx_dma_t *ptxd;
  900. ptxd = aup->tx_dma_ring[aup->tx_tail];
  901. while (ptxd->buff_stat & TX_T_DONE) {
  902. update_tx_stats(dev, ptxd->status);
  903. ptxd->buff_stat &= ~TX_T_DONE;
  904. ptxd->len = 0;
  905. au_sync();
  906. aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1);
  907. ptxd = aup->tx_dma_ring[aup->tx_tail];
  908. if (aup->tx_full) {
  909. aup->tx_full = 0;
  910. netif_wake_queue(dev);
  911. }
  912. }
  913. }
  914. /*
  915. * Au1000 transmit routine.
  916. */
  917. static int au1000_tx(struct sk_buff *skb, struct net_device *dev)
  918. {
  919. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  920. struct net_device_stats *ps = &aup->stats;
  921. volatile tx_dma_t *ptxd;
  922. u32 buff_stat;
  923. db_dest_t *pDB;
  924. int i;
  925. if (au1000_debug > 5)
  926. printk("%s: tx: aup %x len=%d, data=%p, head %d\n",
  927. dev->name, (unsigned)aup, skb->len,
  928. skb->data, aup->tx_head);
  929. ptxd = aup->tx_dma_ring[aup->tx_head];
  930. buff_stat = ptxd->buff_stat;
  931. if (buff_stat & TX_DMA_ENABLE) {
  932. /* We've wrapped around and the transmitter is still busy */
  933. netif_stop_queue(dev);
  934. aup->tx_full = 1;
  935. return 1;
  936. }
  937. else if (buff_stat & TX_T_DONE) {
  938. update_tx_stats(dev, ptxd->status);
  939. ptxd->len = 0;
  940. }
  941. if (aup->tx_full) {
  942. aup->tx_full = 0;
  943. netif_wake_queue(dev);
  944. }
  945. pDB = aup->tx_db_inuse[aup->tx_head];
  946. memcpy((void *)pDB->vaddr, skb->data, skb->len);
  947. if (skb->len < ETH_ZLEN) {
  948. for (i=skb->len; i<ETH_ZLEN; i++) {
  949. ((char *)pDB->vaddr)[i] = 0;
  950. }
  951. ptxd->len = ETH_ZLEN;
  952. }
  953. else
  954. ptxd->len = skb->len;
  955. ps->tx_packets++;
  956. ps->tx_bytes += ptxd->len;
  957. ptxd->buff_stat = pDB->dma_addr | TX_DMA_ENABLE;
  958. au_sync();
  959. dev_kfree_skb(skb);
  960. aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1);
  961. dev->trans_start = jiffies;
  962. return 0;
  963. }
  964. static inline void update_rx_stats(struct net_device *dev, u32 status)
  965. {
  966. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  967. struct net_device_stats *ps = &aup->stats;
  968. ps->rx_packets++;
  969. if (status & RX_MCAST_FRAME)
  970. ps->multicast++;
  971. if (status & RX_ERROR) {
  972. ps->rx_errors++;
  973. if (status & RX_MISSED_FRAME)
  974. ps->rx_missed_errors++;
  975. if (status & (RX_OVERLEN | RX_OVERLEN | RX_LEN_ERROR))
  976. ps->rx_length_errors++;
  977. if (status & RX_CRC_ERROR)
  978. ps->rx_crc_errors++;
  979. if (status & RX_COLL)
  980. ps->collisions++;
  981. }
  982. else
  983. ps->rx_bytes += status & RX_FRAME_LEN_MASK;
  984. }
  985. /*
  986. * Au1000 receive routine.
  987. */
  988. static int au1000_rx(struct net_device *dev)
  989. {
  990. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  991. struct sk_buff *skb;
  992. volatile rx_dma_t *prxd;
  993. u32 buff_stat, status;
  994. db_dest_t *pDB;
  995. u32 frmlen;
  996. if (au1000_debug > 5)
  997. printk("%s: au1000_rx head %d\n", dev->name, aup->rx_head);
  998. prxd = aup->rx_dma_ring[aup->rx_head];
  999. buff_stat = prxd->buff_stat;
  1000. while (buff_stat & RX_T_DONE) {
  1001. status = prxd->status;
  1002. pDB = aup->rx_db_inuse[aup->rx_head];
  1003. update_rx_stats(dev, status);
  1004. if (!(status & RX_ERROR)) {
  1005. /* good frame */
  1006. frmlen = (status & RX_FRAME_LEN_MASK);
  1007. frmlen -= 4; /* Remove FCS */
  1008. skb = dev_alloc_skb(frmlen + 2);
  1009. if (skb == NULL) {
  1010. printk(KERN_ERR
  1011. "%s: Memory squeeze, dropping packet.\n",
  1012. dev->name);
  1013. aup->stats.rx_dropped++;
  1014. continue;
  1015. }
  1016. skb->dev = dev;
  1017. skb_reserve(skb, 2); /* 16 byte IP header align */
  1018. eth_copy_and_sum(skb,
  1019. (unsigned char *)pDB->vaddr, frmlen, 0);
  1020. skb_put(skb, frmlen);
  1021. skb->protocol = eth_type_trans(skb, dev);
  1022. netif_rx(skb); /* pass the packet to upper layers */
  1023. }
  1024. else {
  1025. if (au1000_debug > 4) {
  1026. if (status & RX_MISSED_FRAME)
  1027. printk("rx miss\n");
  1028. if (status & RX_WDOG_TIMER)
  1029. printk("rx wdog\n");
  1030. if (status & RX_RUNT)
  1031. printk("rx runt\n");
  1032. if (status & RX_OVERLEN)
  1033. printk("rx overlen\n");
  1034. if (status & RX_COLL)
  1035. printk("rx coll\n");
  1036. if (status & RX_MII_ERROR)
  1037. printk("rx mii error\n");
  1038. if (status & RX_CRC_ERROR)
  1039. printk("rx crc error\n");
  1040. if (status & RX_LEN_ERROR)
  1041. printk("rx len error\n");
  1042. if (status & RX_U_CNTRL_FRAME)
  1043. printk("rx u control frame\n");
  1044. if (status & RX_MISSED_FRAME)
  1045. printk("rx miss\n");
  1046. }
  1047. }
  1048. prxd->buff_stat = (u32)(pDB->dma_addr | RX_DMA_ENABLE);
  1049. aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1);
  1050. au_sync();
  1051. /* next descriptor */
  1052. prxd = aup->rx_dma_ring[aup->rx_head];
  1053. buff_stat = prxd->buff_stat;
  1054. dev->last_rx = jiffies;
  1055. }
  1056. return 0;
  1057. }
  1058. /*
  1059. * Au1000 interrupt service routine.
  1060. */
  1061. static irqreturn_t au1000_interrupt(int irq, void *dev_id)
  1062. {
  1063. struct net_device *dev = (struct net_device *) dev_id;
  1064. if (dev == NULL) {
  1065. printk(KERN_ERR "%s: isr: null dev ptr\n", dev->name);
  1066. return IRQ_RETVAL(1);
  1067. }
  1068. /* Handle RX interrupts first to minimize chance of overrun */
  1069. au1000_rx(dev);
  1070. au1000_tx_ack(dev);
  1071. return IRQ_RETVAL(1);
  1072. }
  1073. /*
  1074. * The Tx ring has been full longer than the watchdog timeout
  1075. * value. The transmitter must be hung?
  1076. */
  1077. static void au1000_tx_timeout(struct net_device *dev)
  1078. {
  1079. printk(KERN_ERR "%s: au1000_tx_timeout: dev=%p\n", dev->name, dev);
  1080. reset_mac(dev);
  1081. au1000_init(dev);
  1082. dev->trans_start = jiffies;
  1083. netif_wake_queue(dev);
  1084. }
  1085. static void set_rx_mode(struct net_device *dev)
  1086. {
  1087. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  1088. if (au1000_debug > 4)
  1089. printk("%s: set_rx_mode: flags=%x\n", dev->name, dev->flags);
  1090. if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
  1091. aup->mac->control |= MAC_PROMISCUOUS;
  1092. } else if ((dev->flags & IFF_ALLMULTI) ||
  1093. dev->mc_count > MULTICAST_FILTER_LIMIT) {
  1094. aup->mac->control |= MAC_PASS_ALL_MULTI;
  1095. aup->mac->control &= ~MAC_PROMISCUOUS;
  1096. printk(KERN_INFO "%s: Pass all multicast\n", dev->name);
  1097. } else {
  1098. int i;
  1099. struct dev_mc_list *mclist;
  1100. u32 mc_filter[2]; /* Multicast hash filter */
  1101. mc_filter[1] = mc_filter[0] = 0;
  1102. for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
  1103. i++, mclist = mclist->next) {
  1104. set_bit(ether_crc(ETH_ALEN, mclist->dmi_addr)>>26,
  1105. (long *)mc_filter);
  1106. }
  1107. aup->mac->multi_hash_high = mc_filter[1];
  1108. aup->mac->multi_hash_low = mc_filter[0];
  1109. aup->mac->control &= ~MAC_PROMISCUOUS;
  1110. aup->mac->control |= MAC_HASH_MODE;
  1111. }
  1112. }
  1113. static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1114. {
  1115. struct au1000_private *aup = (struct au1000_private *)dev->priv;
  1116. if (!netif_running(dev)) return -EINVAL;
  1117. if (!aup->phy_dev) return -EINVAL; // PHY not controllable
  1118. return phy_mii_ioctl(aup->phy_dev, if_mii(rq), cmd);
  1119. }
  1120. static struct net_device_stats *au1000_get_stats(struct net_device *dev)
  1121. {
  1122. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  1123. if (au1000_debug > 4)
  1124. printk("%s: au1000_get_stats: dev=%p\n", dev->name, dev);
  1125. if (netif_device_present(dev)) {
  1126. return &aup->stats;
  1127. }
  1128. return 0;
  1129. }
  1130. module_init(au1000_init_module);
  1131. module_exit(au1000_cleanup_module);