7990.h 10 KB

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  1. /*
  2. * 7990.h -- LANCE ethernet IC generic routines.
  3. * This is an attempt to separate out the bits of various ethernet
  4. * drivers that are common because they all use the AMD 7990 LANCE
  5. * (Local Area Network Controller for Ethernet) chip.
  6. *
  7. * Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk>
  8. *
  9. * Most of this stuff was obtained by looking at other LANCE drivers,
  10. * in particular a2065.[ch]. The AMD C-LANCE datasheet was also helpful.
  11. */
  12. #ifndef _7990_H
  13. #define _7990_H
  14. /* The lance only has two register locations. We communicate mostly via memory. */
  15. #define LANCE_RDP 0 /* Register Data Port */
  16. #define LANCE_RAP 2 /* Register Address Port */
  17. /* Transmit/receive ring definitions.
  18. * We allow the specific drivers to override these defaults if they want to.
  19. * NB: according to lance.c, increasing the number of buffers is a waste
  20. * of space and reduces the chance that an upper layer will be able to
  21. * reorder queued Tx packets based on priority. [Clearly there is a minimum
  22. * limit too: too small and we drop rx packets and can't tx at full speed.]
  23. * 4+4 seems to be the usual setting; the atarilance driver uses 3 and 5.
  24. */
  25. /* Blast! This won't work. The problem is that we can't specify a default
  26. * setting because that would cause the lance_init_block struct to be
  27. * too long (and overflow the RAM on shared-memory cards like the HP LANCE.
  28. */
  29. #ifndef LANCE_LOG_TX_BUFFERS
  30. #define LANCE_LOG_TX_BUFFERS 1
  31. #define LANCE_LOG_RX_BUFFERS 3
  32. #endif
  33. #define TX_RING_SIZE (1<<LANCE_LOG_TX_BUFFERS)
  34. #define RX_RING_SIZE (1<<LANCE_LOG_RX_BUFFERS)
  35. #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
  36. #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
  37. #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
  38. #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
  39. #define PKT_BUFF_SIZE (1544)
  40. #define RX_BUFF_SIZE PKT_BUFF_SIZE
  41. #define TX_BUFF_SIZE PKT_BUFF_SIZE
  42. /* Each receive buffer is described by a receive message descriptor (RMD) */
  43. struct lance_rx_desc {
  44. volatile unsigned short rmd0; /* low address of packet */
  45. volatile unsigned char rmd1_bits; /* descriptor bits */
  46. volatile unsigned char rmd1_hadr; /* high address of packet */
  47. volatile short length; /* This length is 2s complement (negative)!
  48. * Buffer length
  49. */
  50. volatile unsigned short mblength; /* Actual number of bytes received */
  51. };
  52. /* Ditto for TMD: */
  53. struct lance_tx_desc {
  54. volatile unsigned short tmd0; /* low address of packet */
  55. volatile unsigned char tmd1_bits; /* descriptor bits */
  56. volatile unsigned char tmd1_hadr; /* high address of packet */
  57. volatile short length; /* Length is 2s complement (negative)! */
  58. volatile unsigned short misc;
  59. };
  60. /* There are three memory structures accessed by the LANCE:
  61. * the initialization block, the receive and transmit descriptor rings,
  62. * and the data buffers themselves. In fact we might as well put the
  63. * init block,the Tx and Rx rings and the buffers together in memory:
  64. */
  65. struct lance_init_block {
  66. volatile unsigned short mode; /* Pre-set mode (reg. 15) */
  67. volatile unsigned char phys_addr[6]; /* Physical ethernet address */
  68. volatile unsigned filter[2]; /* Multicast filter (64 bits) */
  69. /* Receive and transmit ring base, along with extra bits. */
  70. volatile unsigned short rx_ptr; /* receive descriptor addr */
  71. volatile unsigned short rx_len; /* receive len and high addr */
  72. volatile unsigned short tx_ptr; /* transmit descriptor addr */
  73. volatile unsigned short tx_len; /* transmit len and high addr */
  74. /* The Tx and Rx ring entries must be aligned on 8-byte boundaries.
  75. * This will be true if this whole struct is 8-byte aligned.
  76. */
  77. volatile struct lance_tx_desc btx_ring[TX_RING_SIZE];
  78. volatile struct lance_rx_desc brx_ring[RX_RING_SIZE];
  79. volatile char tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
  80. volatile char rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
  81. /* we use this just to make the struct big enough that we can move its startaddr
  82. * in order to force alignment to an eight byte boundary.
  83. */
  84. };
  85. /* This is where we keep all the stuff the driver needs to know about.
  86. * I'm definitely unhappy about the mechanism for allowing specific
  87. * drivers to add things...
  88. */
  89. struct lance_private
  90. {
  91. char *name;
  92. unsigned long base;
  93. volatile struct lance_init_block *init_block; /* CPU address of RAM */
  94. volatile struct lance_init_block *lance_init_block; /* LANCE address of RAM */
  95. int rx_new, tx_new;
  96. int rx_old, tx_old;
  97. int lance_log_rx_bufs, lance_log_tx_bufs;
  98. int rx_ring_mod_mask, tx_ring_mod_mask;
  99. struct net_device_stats stats;
  100. int tpe; /* TPE is selected */
  101. int auto_select; /* cable-selection is by carrier */
  102. unsigned short busmaster_regval;
  103. unsigned int irq; /* IRQ to register */
  104. /* This is because the HP LANCE is disgusting and you have to check
  105. * a DIO-specific register every time you read/write the LANCE regs :-<
  106. * [could we get away with making these some sort of macro?]
  107. */
  108. void (*writerap)(void *, unsigned short);
  109. void (*writerdp)(void *, unsigned short);
  110. unsigned short (*readrdp)(void *);
  111. spinlock_t devlock;
  112. char tx_full;
  113. };
  114. /*
  115. * Am7990 Control and Status Registers
  116. */
  117. #define LE_CSR0 0x0000 /* LANCE Controller Status */
  118. #define LE_CSR1 0x0001 /* IADR[15:0] (bit0==0 ie word aligned) */
  119. #define LE_CSR2 0x0002 /* IADR[23:16] (high bits reserved) */
  120. #define LE_CSR3 0x0003 /* Misc */
  121. /*
  122. * Bit definitions for CSR0 (LANCE Controller Status)
  123. */
  124. #define LE_C0_ERR 0x8000 /* Error = BABL | CERR | MISS | MERR */
  125. #define LE_C0_BABL 0x4000 /* Babble: Transmitted too many bits */
  126. #define LE_C0_CERR 0x2000 /* No Heartbeat (10BASE-T) */
  127. #define LE_C0_MISS 0x1000 /* Missed Frame (no rx buffer to put it in) */
  128. #define LE_C0_MERR 0x0800 /* Memory Error */
  129. #define LE_C0_RINT 0x0400 /* Receive Interrupt */
  130. #define LE_C0_TINT 0x0200 /* Transmit Interrupt */
  131. #define LE_C0_IDON 0x0100 /* Initialization Done */
  132. #define LE_C0_INTR 0x0080 /* Interrupt Flag
  133. = BABL | MISS | MERR | RINT | TINT | IDON */
  134. #define LE_C0_INEA 0x0040 /* Interrupt Enable */
  135. #define LE_C0_RXON 0x0020 /* Receive On */
  136. #define LE_C0_TXON 0x0010 /* Transmit On */
  137. #define LE_C0_TDMD 0x0008 /* Transmit Demand */
  138. #define LE_C0_STOP 0x0004 /* Stop */
  139. #define LE_C0_STRT 0x0002 /* Start */
  140. #define LE_C0_INIT 0x0001 /* Initialize */
  141. /*
  142. * Bit definitions for CSR3
  143. */
  144. #define LE_C3_BSWP 0x0004 /* Byte Swap
  145. (on for big endian byte order) */
  146. #define LE_C3_ACON 0x0002 /* ALE Control
  147. (on for active low ALE) */
  148. #define LE_C3_BCON 0x0001 /* Byte Control */
  149. /*
  150. * Mode Flags
  151. */
  152. #define LE_MO_PROM 0x8000 /* Promiscuous Mode */
  153. /* these next ones 0x4000 -- 0x0080 are not available on the LANCE 7990,
  154. * but they are in NetBSD's am7990.h, presumably for backwards-compatible chips
  155. */
  156. #define LE_MO_DRCVBC 0x4000 /* disable receive broadcast */
  157. #define LE_MO_DRCVPA 0x2000 /* disable physical address detection */
  158. #define LE_MO_DLNKTST 0x1000 /* disable link status */
  159. #define LE_MO_DAPC 0x0800 /* disable automatic polarity correction */
  160. #define LE_MO_MENDECL 0x0400 /* MENDEC loopback mode */
  161. #define LE_MO_LRTTSEL 0x0200 /* lower RX threshold / TX mode selection */
  162. #define LE_MO_PSEL1 0x0100 /* port selection bit1 */
  163. #define LE_MO_PSEL0 0x0080 /* port selection bit0 */
  164. /* and this one is from the C-LANCE data sheet... */
  165. #define LE_MO_EMBA 0x0080 /* Enable Modified Backoff Algorithm
  166. (C-LANCE, not original LANCE) */
  167. #define LE_MO_INTL 0x0040 /* Internal Loopback */
  168. #define LE_MO_DRTY 0x0020 /* Disable Retry */
  169. #define LE_MO_FCOLL 0x0010 /* Force Collision */
  170. #define LE_MO_DXMTFCS 0x0008 /* Disable Transmit CRC */
  171. #define LE_MO_LOOP 0x0004 /* Loopback Enable */
  172. #define LE_MO_DTX 0x0002 /* Disable Transmitter */
  173. #define LE_MO_DRX 0x0001 /* Disable Receiver */
  174. /*
  175. * Receive Flags
  176. */
  177. #define LE_R1_OWN 0x80 /* LANCE owns the descriptor */
  178. #define LE_R1_ERR 0x40 /* Error */
  179. #define LE_R1_FRA 0x20 /* Framing Error */
  180. #define LE_R1_OFL 0x10 /* Overflow Error */
  181. #define LE_R1_CRC 0x08 /* CRC Error */
  182. #define LE_R1_BUF 0x04 /* Buffer Error */
  183. #define LE_R1_SOP 0x02 /* Start of Packet */
  184. #define LE_R1_EOP 0x01 /* End of Packet */
  185. #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
  186. /*
  187. * Transmit Flags
  188. */
  189. #define LE_T1_OWN 0x80 /* LANCE owns the descriptor */
  190. #define LE_T1_ERR 0x40 /* Error */
  191. #define LE_T1_RES 0x20 /* Reserved, LANCE writes this with a zero */
  192. #define LE_T1_EMORE 0x10 /* More than one retry needed */
  193. #define LE_T1_EONE 0x08 /* One retry needed */
  194. #define LE_T1_EDEF 0x04 /* Deferred */
  195. #define LE_T1_SOP 0x02 /* Start of Packet */
  196. #define LE_T1_EOP 0x01 /* End of Packet */
  197. #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
  198. /*
  199. * Error Flags
  200. */
  201. #define LE_T3_BUF 0x8000 /* Buffer Error */
  202. #define LE_T3_UFL 0x4000 /* Underflow Error */
  203. #define LE_T3_LCOL 0x1000 /* Late Collision */
  204. #define LE_T3_CLOS 0x0800 /* Loss of Carrier */
  205. #define LE_T3_RTY 0x0400 /* Retry Error */
  206. #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry */
  207. /* Miscellaneous useful macros */
  208. #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
  209. lp->tx_old+lp->tx_ring_mod_mask-lp->tx_new:\
  210. lp->tx_old - lp->tx_new-1)
  211. /* The LANCE only uses 24 bit addresses. This does the obvious thing. */
  212. #define LANCE_ADDR(x) ((int)(x) & ~0xff000000)
  213. /* Now the prototypes we export */
  214. extern int lance_open(struct net_device *dev);
  215. extern int lance_close (struct net_device *dev);
  216. extern int lance_start_xmit (struct sk_buff *skb, struct net_device *dev);
  217. extern struct net_device_stats *lance_get_stats (struct net_device *dev);
  218. extern void lance_set_multicast (struct net_device *dev);
  219. extern void lance_tx_timeout(struct net_device *dev);
  220. #ifdef CONFIG_NET_POLL_CONTROLLER
  221. extern void lance_poll(struct net_device *dev);
  222. #endif
  223. #endif /* ndef _7990_H */