w83781d.c 51 KB

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  1. /*
  2. w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
  3. monitoring
  4. Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
  5. Philip Edelbrock <phil@netroedge.com>,
  6. and Mark Studebaker <mdsxyz123@yahoo.com>
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. /*
  20. Supports following chips:
  21. Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
  22. as99127f 7 3 0 3 0x31 0x12c3 yes no
  23. as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
  24. w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
  25. w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
  26. w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
  27. w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
  28. */
  29. #include <linux/module.h>
  30. #include <linux/init.h>
  31. #include <linux/slab.h>
  32. #include <linux/jiffies.h>
  33. #include <linux/i2c.h>
  34. #include <linux/i2c-isa.h>
  35. #include <linux/hwmon.h>
  36. #include <linux/hwmon-vid.h>
  37. #include <linux/sysfs.h>
  38. #include <linux/err.h>
  39. #include <linux/mutex.h>
  40. #include <asm/io.h>
  41. #include "lm75.h"
  42. /* Addresses to scan */
  43. static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
  44. 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
  45. 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
  46. static unsigned short isa_address = 0x290;
  47. /* Insmod parameters */
  48. I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
  49. I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
  50. "{bus, clientaddr, subclientaddr1, subclientaddr2}");
  51. static int reset;
  52. module_param(reset, bool, 0);
  53. MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
  54. static int init = 1;
  55. module_param(init, bool, 0);
  56. MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  57. /* Constants specified below */
  58. /* Length of ISA address segment */
  59. #define W83781D_EXTENT 8
  60. /* Where are the ISA address/data registers relative to the base address */
  61. #define W83781D_ADDR_REG_OFFSET 5
  62. #define W83781D_DATA_REG_OFFSET 6
  63. /* The W83781D registers */
  64. /* The W83782D registers for nr=7,8 are in bank 5 */
  65. #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
  66. (0x554 + (((nr) - 7) * 2)))
  67. #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
  68. (0x555 + (((nr) - 7) * 2)))
  69. #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
  70. (0x550 + (nr) - 7))
  71. #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
  72. #define W83781D_REG_FAN(nr) (0x27 + (nr))
  73. #define W83781D_REG_BANK 0x4E
  74. #define W83781D_REG_TEMP2_CONFIG 0x152
  75. #define W83781D_REG_TEMP3_CONFIG 0x252
  76. #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
  77. ((nr == 2) ? (0x0150) : \
  78. (0x27)))
  79. #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
  80. ((nr == 2) ? (0x153) : \
  81. (0x3A)))
  82. #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
  83. ((nr == 2) ? (0x155) : \
  84. (0x39)))
  85. #define W83781D_REG_CONFIG 0x40
  86. /* Interrupt status (W83781D, AS99127F) */
  87. #define W83781D_REG_ALARM1 0x41
  88. #define W83781D_REG_ALARM2 0x42
  89. /* Real-time status (W83782D, W83783S, W83627HF) */
  90. #define W83782D_REG_ALARM1 0x459
  91. #define W83782D_REG_ALARM2 0x45A
  92. #define W83782D_REG_ALARM3 0x45B
  93. #define W83781D_REG_BEEP_CONFIG 0x4D
  94. #define W83781D_REG_BEEP_INTS1 0x56
  95. #define W83781D_REG_BEEP_INTS2 0x57
  96. #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
  97. #define W83781D_REG_VID_FANDIV 0x47
  98. #define W83781D_REG_CHIPID 0x49
  99. #define W83781D_REG_WCHIPID 0x58
  100. #define W83781D_REG_CHIPMAN 0x4F
  101. #define W83781D_REG_PIN 0x4B
  102. /* 782D/783S only */
  103. #define W83781D_REG_VBAT 0x5D
  104. /* PWM 782D (1-4) and 783S (1-2) only */
  105. #define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */
  106. /* on which is which; */
  107. #define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */
  108. /* However 782d is probably wrong. */
  109. #define W83781D_REG_PWM3 0x5E
  110. #define W83781D_REG_PWM4 0x5F
  111. #define W83781D_REG_PWMCLK12 0x5C
  112. #define W83781D_REG_PWMCLK34 0x45C
  113. static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
  114. W83781D_REG_PWM3, W83781D_REG_PWM4
  115. };
  116. #define W83781D_REG_PWM(nr) (regpwm[(nr) - 1])
  117. #define W83781D_REG_I2C_ADDR 0x48
  118. #define W83781D_REG_I2C_SUBADDR 0x4A
  119. /* The following are undocumented in the data sheets however we
  120. received the information in an email from Winbond tech support */
  121. /* Sensor selection - not on 781d */
  122. #define W83781D_REG_SCFG1 0x5D
  123. static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
  124. #define W83781D_REG_SCFG2 0x59
  125. static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
  126. #define W83781D_DEFAULT_BETA 3435
  127. /* RT Table registers */
  128. #define W83781D_REG_RT_IDX 0x50
  129. #define W83781D_REG_RT_VAL 0x51
  130. /* Conversions. Rounding and limit checking is only done on the TO_REG
  131. variants. Note that you should be a bit careful with which arguments
  132. these macros are called: arguments may be evaluated more than once.
  133. Fixing this is just not worth it. */
  134. #define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
  135. #define IN_FROM_REG(val) (((val) * 16) / 10)
  136. static inline u8
  137. FAN_TO_REG(long rpm, int div)
  138. {
  139. if (rpm == 0)
  140. return 255;
  141. rpm = SENSORS_LIMIT(rpm, 1, 1000000);
  142. return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
  143. }
  144. #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
  145. ((val) == 255 ? 0 : \
  146. 1350000 / ((val) * (div))))
  147. #define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
  148. : (val)) / 1000, 0, 0xff))
  149. #define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
  150. #define PWM_FROM_REG(val) (val)
  151. #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
  152. #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
  153. (val) ^ 0x7fff : (val))
  154. #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
  155. (~(val)) & 0x7fff : (val) & 0xffffff)
  156. #define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0)
  157. #define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0)
  158. #define DIV_FROM_REG(val) (1 << (val))
  159. static inline u8
  160. DIV_TO_REG(long val, enum chips type)
  161. {
  162. int i;
  163. val = SENSORS_LIMIT(val, 1,
  164. ((type == w83781d
  165. || type == as99127f) ? 8 : 128)) >> 1;
  166. for (i = 0; i < 7; i++) {
  167. if (val == 0)
  168. break;
  169. val >>= 1;
  170. }
  171. return ((u8) i);
  172. }
  173. /* There are some complications in a module like this. First off, W83781D chips
  174. may be both present on the SMBus and the ISA bus, and we have to handle
  175. those cases separately at some places. Second, there might be several
  176. W83781D chips available (well, actually, that is probably never done; but
  177. it is a clean illustration of how to handle a case like that). Finally,
  178. a specific chip may be attached to *both* ISA and SMBus, and we would
  179. not like to detect it double. Fortunately, in the case of the W83781D at
  180. least, a register tells us what SMBus address we are on, so that helps
  181. a bit - except if there could be more than one SMBus. Groan. No solution
  182. for this yet. */
  183. /* For each registered chip, we need to keep some data in memory.
  184. The structure is dynamically allocated. */
  185. struct w83781d_data {
  186. struct i2c_client client;
  187. struct class_device *class_dev;
  188. struct mutex lock;
  189. enum chips type;
  190. struct mutex update_lock;
  191. char valid; /* !=0 if following fields are valid */
  192. unsigned long last_updated; /* In jiffies */
  193. struct i2c_client *lm75[2]; /* for secondary I2C addresses */
  194. /* array of 2 pointers to subclients */
  195. u8 in[9]; /* Register value - 8 & 9 for 782D only */
  196. u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
  197. u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
  198. u8 fan[3]; /* Register value */
  199. u8 fan_min[3]; /* Register value */
  200. u8 temp;
  201. u8 temp_max; /* Register value */
  202. u8 temp_max_hyst; /* Register value */
  203. u16 temp_add[2]; /* Register value */
  204. u16 temp_max_add[2]; /* Register value */
  205. u16 temp_max_hyst_add[2]; /* Register value */
  206. u8 fan_div[3]; /* Register encoding, shifted right */
  207. u8 vid; /* Register encoding, combined */
  208. u32 alarms; /* Register encoding, combined */
  209. u32 beep_mask; /* Register encoding, combined */
  210. u8 beep_enable; /* Boolean */
  211. u8 pwm[4]; /* Register value */
  212. u8 pwmenable[4]; /* Boolean */
  213. u16 sens[3]; /* 782D/783S only.
  214. 1 = pentium diode; 2 = 3904 diode;
  215. 3000-5000 = thermistor beta.
  216. Default = 3435.
  217. Other Betas unimplemented */
  218. u8 vrm;
  219. };
  220. static int w83781d_attach_adapter(struct i2c_adapter *adapter);
  221. static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter);
  222. static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
  223. static int w83781d_detach_client(struct i2c_client *client);
  224. static int w83781d_read_value(struct i2c_client *client, u16 reg);
  225. static int w83781d_write_value(struct i2c_client *client, u16 reg, u16 value);
  226. static struct w83781d_data *w83781d_update_device(struct device *dev);
  227. static void w83781d_init_client(struct i2c_client *client);
  228. static struct i2c_driver w83781d_driver = {
  229. .driver = {
  230. .name = "w83781d",
  231. },
  232. .id = I2C_DRIVERID_W83781D,
  233. .attach_adapter = w83781d_attach_adapter,
  234. .detach_client = w83781d_detach_client,
  235. };
  236. static struct i2c_driver w83781d_isa_driver = {
  237. .driver = {
  238. .owner = THIS_MODULE,
  239. .name = "w83781d-isa",
  240. },
  241. .attach_adapter = w83781d_isa_attach_adapter,
  242. .detach_client = w83781d_detach_client,
  243. };
  244. /* following are the sysfs callback functions */
  245. #define show_in_reg(reg) \
  246. static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
  247. { \
  248. struct w83781d_data *data = w83781d_update_device(dev); \
  249. return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
  250. }
  251. show_in_reg(in);
  252. show_in_reg(in_min);
  253. show_in_reg(in_max);
  254. #define store_in_reg(REG, reg) \
  255. static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
  256. { \
  257. struct i2c_client *client = to_i2c_client(dev); \
  258. struct w83781d_data *data = i2c_get_clientdata(client); \
  259. u32 val; \
  260. \
  261. val = simple_strtoul(buf, NULL, 10) / 10; \
  262. \
  263. mutex_lock(&data->update_lock); \
  264. data->in_##reg[nr] = IN_TO_REG(val); \
  265. w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
  266. \
  267. mutex_unlock(&data->update_lock); \
  268. return count; \
  269. }
  270. store_in_reg(MIN, min);
  271. store_in_reg(MAX, max);
  272. #define sysfs_in_offset(offset) \
  273. static ssize_t \
  274. show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  275. { \
  276. return show_in(dev, buf, offset); \
  277. } \
  278. static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
  279. #define sysfs_in_reg_offset(reg, offset) \
  280. static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  281. { \
  282. return show_in_##reg (dev, buf, offset); \
  283. } \
  284. static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
  285. { \
  286. return store_in_##reg (dev, buf, count, offset); \
  287. } \
  288. static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
  289. #define sysfs_in_offsets(offset) \
  290. sysfs_in_offset(offset); \
  291. sysfs_in_reg_offset(min, offset); \
  292. sysfs_in_reg_offset(max, offset);
  293. sysfs_in_offsets(0);
  294. sysfs_in_offsets(1);
  295. sysfs_in_offsets(2);
  296. sysfs_in_offsets(3);
  297. sysfs_in_offsets(4);
  298. sysfs_in_offsets(5);
  299. sysfs_in_offsets(6);
  300. sysfs_in_offsets(7);
  301. sysfs_in_offsets(8);
  302. #define show_fan_reg(reg) \
  303. static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
  304. { \
  305. struct w83781d_data *data = w83781d_update_device(dev); \
  306. return sprintf(buf,"%ld\n", \
  307. FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
  308. }
  309. show_fan_reg(fan);
  310. show_fan_reg(fan_min);
  311. static ssize_t
  312. store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
  313. {
  314. struct i2c_client *client = to_i2c_client(dev);
  315. struct w83781d_data *data = i2c_get_clientdata(client);
  316. u32 val;
  317. val = simple_strtoul(buf, NULL, 10);
  318. mutex_lock(&data->update_lock);
  319. data->fan_min[nr - 1] =
  320. FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
  321. w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
  322. data->fan_min[nr - 1]);
  323. mutex_unlock(&data->update_lock);
  324. return count;
  325. }
  326. #define sysfs_fan_offset(offset) \
  327. static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  328. { \
  329. return show_fan(dev, buf, offset); \
  330. } \
  331. static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
  332. #define sysfs_fan_min_offset(offset) \
  333. static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  334. { \
  335. return show_fan_min(dev, buf, offset); \
  336. } \
  337. static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
  338. { \
  339. return store_fan_min(dev, buf, count, offset); \
  340. } \
  341. static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
  342. sysfs_fan_offset(1);
  343. sysfs_fan_min_offset(1);
  344. sysfs_fan_offset(2);
  345. sysfs_fan_min_offset(2);
  346. sysfs_fan_offset(3);
  347. sysfs_fan_min_offset(3);
  348. #define show_temp_reg(reg) \
  349. static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
  350. { \
  351. struct w83781d_data *data = w83781d_update_device(dev); \
  352. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  353. return sprintf(buf,"%d\n", \
  354. LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
  355. } else { /* TEMP1 */ \
  356. return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
  357. } \
  358. }
  359. show_temp_reg(temp);
  360. show_temp_reg(temp_max);
  361. show_temp_reg(temp_max_hyst);
  362. #define store_temp_reg(REG, reg) \
  363. static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
  364. { \
  365. struct i2c_client *client = to_i2c_client(dev); \
  366. struct w83781d_data *data = i2c_get_clientdata(client); \
  367. s32 val; \
  368. \
  369. val = simple_strtol(buf, NULL, 10); \
  370. \
  371. mutex_lock(&data->update_lock); \
  372. \
  373. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  374. data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
  375. w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
  376. data->temp_##reg##_add[nr-2]); \
  377. } else { /* TEMP1 */ \
  378. data->temp_##reg = TEMP_TO_REG(val); \
  379. w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
  380. data->temp_##reg); \
  381. } \
  382. \
  383. mutex_unlock(&data->update_lock); \
  384. return count; \
  385. }
  386. store_temp_reg(OVER, max);
  387. store_temp_reg(HYST, max_hyst);
  388. #define sysfs_temp_offset(offset) \
  389. static ssize_t \
  390. show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  391. { \
  392. return show_temp(dev, buf, offset); \
  393. } \
  394. static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
  395. #define sysfs_temp_reg_offset(reg, offset) \
  396. static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  397. { \
  398. return show_temp_##reg (dev, buf, offset); \
  399. } \
  400. static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
  401. { \
  402. return store_temp_##reg (dev, buf, count, offset); \
  403. } \
  404. static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
  405. #define sysfs_temp_offsets(offset) \
  406. sysfs_temp_offset(offset); \
  407. sysfs_temp_reg_offset(max, offset); \
  408. sysfs_temp_reg_offset(max_hyst, offset);
  409. sysfs_temp_offsets(1);
  410. sysfs_temp_offsets(2);
  411. sysfs_temp_offsets(3);
  412. static ssize_t
  413. show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
  414. {
  415. struct w83781d_data *data = w83781d_update_device(dev);
  416. return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
  417. }
  418. static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
  419. static ssize_t
  420. show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
  421. {
  422. struct w83781d_data *data = w83781d_update_device(dev);
  423. return sprintf(buf, "%ld\n", (long) data->vrm);
  424. }
  425. static ssize_t
  426. store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
  427. {
  428. struct i2c_client *client = to_i2c_client(dev);
  429. struct w83781d_data *data = i2c_get_clientdata(client);
  430. u32 val;
  431. val = simple_strtoul(buf, NULL, 10);
  432. data->vrm = val;
  433. return count;
  434. }
  435. static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
  436. static ssize_t
  437. show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
  438. {
  439. struct w83781d_data *data = w83781d_update_device(dev);
  440. return sprintf(buf, "%u\n", data->alarms);
  441. }
  442. static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
  443. static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
  444. {
  445. struct w83781d_data *data = w83781d_update_device(dev);
  446. return sprintf(buf, "%ld\n",
  447. (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
  448. }
  449. static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
  450. {
  451. struct w83781d_data *data = w83781d_update_device(dev);
  452. return sprintf(buf, "%ld\n",
  453. (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
  454. }
  455. #define BEEP_ENABLE 0 /* Store beep_enable */
  456. #define BEEP_MASK 1 /* Store beep_mask */
  457. static ssize_t
  458. store_beep_reg(struct device *dev, const char *buf, size_t count,
  459. int update_mask)
  460. {
  461. struct i2c_client *client = to_i2c_client(dev);
  462. struct w83781d_data *data = i2c_get_clientdata(client);
  463. u32 val, val2;
  464. val = simple_strtoul(buf, NULL, 10);
  465. mutex_lock(&data->update_lock);
  466. if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
  467. data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
  468. w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
  469. data->beep_mask & 0xff);
  470. if ((data->type != w83781d) && (data->type != as99127f)) {
  471. w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
  472. ((data->beep_mask) >> 16) & 0xff);
  473. }
  474. val2 = (data->beep_mask >> 8) & 0x7f;
  475. } else { /* We are storing beep_enable */
  476. val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
  477. data->beep_enable = BEEP_ENABLE_TO_REG(val);
  478. }
  479. w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
  480. val2 | data->beep_enable << 7);
  481. mutex_unlock(&data->update_lock);
  482. return count;
  483. }
  484. #define sysfs_beep(REG, reg) \
  485. static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
  486. { \
  487. return show_beep_##reg(dev, attr, buf); \
  488. } \
  489. static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
  490. { \
  491. return store_beep_reg(dev, buf, count, BEEP_##REG); \
  492. } \
  493. static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
  494. sysfs_beep(ENABLE, enable);
  495. sysfs_beep(MASK, mask);
  496. static ssize_t
  497. show_fan_div_reg(struct device *dev, char *buf, int nr)
  498. {
  499. struct w83781d_data *data = w83781d_update_device(dev);
  500. return sprintf(buf, "%ld\n",
  501. (long) DIV_FROM_REG(data->fan_div[nr - 1]));
  502. }
  503. /* Note: we save and restore the fan minimum here, because its value is
  504. determined in part by the fan divisor. This follows the principle of
  505. least surprise; the user doesn't expect the fan minimum to change just
  506. because the divisor changed. */
  507. static ssize_t
  508. store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
  509. {
  510. struct i2c_client *client = to_i2c_client(dev);
  511. struct w83781d_data *data = i2c_get_clientdata(client);
  512. unsigned long min;
  513. u8 reg;
  514. unsigned long val = simple_strtoul(buf, NULL, 10);
  515. mutex_lock(&data->update_lock);
  516. /* Save fan_min */
  517. min = FAN_FROM_REG(data->fan_min[nr],
  518. DIV_FROM_REG(data->fan_div[nr]));
  519. data->fan_div[nr] = DIV_TO_REG(val, data->type);
  520. reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
  521. & (nr==0 ? 0xcf : 0x3f))
  522. | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
  523. w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
  524. /* w83781d and as99127f don't have extended divisor bits */
  525. if (data->type != w83781d && data->type != as99127f) {
  526. reg = (w83781d_read_value(client, W83781D_REG_VBAT)
  527. & ~(1 << (5 + nr)))
  528. | ((data->fan_div[nr] & 0x04) << (3 + nr));
  529. w83781d_write_value(client, W83781D_REG_VBAT, reg);
  530. }
  531. /* Restore fan_min */
  532. data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
  533. w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
  534. mutex_unlock(&data->update_lock);
  535. return count;
  536. }
  537. #define sysfs_fan_div(offset) \
  538. static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  539. { \
  540. return show_fan_div_reg(dev, buf, offset); \
  541. } \
  542. static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
  543. { \
  544. return store_fan_div_reg(dev, buf, count, offset - 1); \
  545. } \
  546. static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
  547. sysfs_fan_div(1);
  548. sysfs_fan_div(2);
  549. sysfs_fan_div(3);
  550. static ssize_t
  551. show_pwm_reg(struct device *dev, char *buf, int nr)
  552. {
  553. struct w83781d_data *data = w83781d_update_device(dev);
  554. return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
  555. }
  556. static ssize_t
  557. show_pwmenable_reg(struct device *dev, char *buf, int nr)
  558. {
  559. struct w83781d_data *data = w83781d_update_device(dev);
  560. return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
  561. }
  562. static ssize_t
  563. store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
  564. {
  565. struct i2c_client *client = to_i2c_client(dev);
  566. struct w83781d_data *data = i2c_get_clientdata(client);
  567. u32 val;
  568. val = simple_strtoul(buf, NULL, 10);
  569. mutex_lock(&data->update_lock);
  570. data->pwm[nr - 1] = PWM_TO_REG(val);
  571. w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
  572. mutex_unlock(&data->update_lock);
  573. return count;
  574. }
  575. static ssize_t
  576. store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
  577. {
  578. struct i2c_client *client = to_i2c_client(dev);
  579. struct w83781d_data *data = i2c_get_clientdata(client);
  580. u32 val, reg;
  581. val = simple_strtoul(buf, NULL, 10);
  582. mutex_lock(&data->update_lock);
  583. switch (val) {
  584. case 0:
  585. case 1:
  586. reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
  587. w83781d_write_value(client, W83781D_REG_PWMCLK12,
  588. (reg & 0xf7) | (val << 3));
  589. reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
  590. w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
  591. (reg & 0xef) | (!val << 4));
  592. data->pwmenable[nr - 1] = val;
  593. break;
  594. default:
  595. mutex_unlock(&data->update_lock);
  596. return -EINVAL;
  597. }
  598. mutex_unlock(&data->update_lock);
  599. return count;
  600. }
  601. #define sysfs_pwm(offset) \
  602. static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  603. { \
  604. return show_pwm_reg(dev, buf, offset); \
  605. } \
  606. static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
  607. const char *buf, size_t count) \
  608. { \
  609. return store_pwm_reg(dev, buf, count, offset); \
  610. } \
  611. static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
  612. show_regs_pwm_##offset, store_regs_pwm_##offset);
  613. #define sysfs_pwmenable(offset) \
  614. static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  615. { \
  616. return show_pwmenable_reg(dev, buf, offset); \
  617. } \
  618. static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
  619. const char *buf, size_t count) \
  620. { \
  621. return store_pwmenable_reg(dev, buf, count, offset); \
  622. } \
  623. static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
  624. show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
  625. sysfs_pwm(1);
  626. sysfs_pwm(2);
  627. sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */
  628. sysfs_pwm(3);
  629. sysfs_pwm(4);
  630. static ssize_t
  631. show_sensor_reg(struct device *dev, char *buf, int nr)
  632. {
  633. struct w83781d_data *data = w83781d_update_device(dev);
  634. return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
  635. }
  636. static ssize_t
  637. store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
  638. {
  639. struct i2c_client *client = to_i2c_client(dev);
  640. struct w83781d_data *data = i2c_get_clientdata(client);
  641. u32 val, tmp;
  642. val = simple_strtoul(buf, NULL, 10);
  643. mutex_lock(&data->update_lock);
  644. switch (val) {
  645. case 1: /* PII/Celeron diode */
  646. tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
  647. w83781d_write_value(client, W83781D_REG_SCFG1,
  648. tmp | BIT_SCFG1[nr - 1]);
  649. tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
  650. w83781d_write_value(client, W83781D_REG_SCFG2,
  651. tmp | BIT_SCFG2[nr - 1]);
  652. data->sens[nr - 1] = val;
  653. break;
  654. case 2: /* 3904 */
  655. tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
  656. w83781d_write_value(client, W83781D_REG_SCFG1,
  657. tmp | BIT_SCFG1[nr - 1]);
  658. tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
  659. w83781d_write_value(client, W83781D_REG_SCFG2,
  660. tmp & ~BIT_SCFG2[nr - 1]);
  661. data->sens[nr - 1] = val;
  662. break;
  663. case W83781D_DEFAULT_BETA: /* thermistor */
  664. tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
  665. w83781d_write_value(client, W83781D_REG_SCFG1,
  666. tmp & ~BIT_SCFG1[nr - 1]);
  667. data->sens[nr - 1] = val;
  668. break;
  669. default:
  670. dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
  671. (long) val, W83781D_DEFAULT_BETA);
  672. break;
  673. }
  674. mutex_unlock(&data->update_lock);
  675. return count;
  676. }
  677. #define sysfs_sensor(offset) \
  678. static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  679. { \
  680. return show_sensor_reg(dev, buf, offset); \
  681. } \
  682. static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
  683. { \
  684. return store_sensor_reg(dev, buf, count, offset); \
  685. } \
  686. static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
  687. sysfs_sensor(1);
  688. sysfs_sensor(2);
  689. sysfs_sensor(3);
  690. /* This function is called when:
  691. * w83781d_driver is inserted (when this module is loaded), for each
  692. available adapter
  693. * when a new adapter is inserted (and w83781d_driver is still present) */
  694. static int
  695. w83781d_attach_adapter(struct i2c_adapter *adapter)
  696. {
  697. if (!(adapter->class & I2C_CLASS_HWMON))
  698. return 0;
  699. return i2c_probe(adapter, &addr_data, w83781d_detect);
  700. }
  701. static int
  702. w83781d_isa_attach_adapter(struct i2c_adapter *adapter)
  703. {
  704. return w83781d_detect(adapter, isa_address, -1);
  705. }
  706. /* Assumes that adapter is of I2C, not ISA variety.
  707. * OTHERWISE DON'T CALL THIS
  708. */
  709. static int
  710. w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
  711. struct i2c_client *new_client)
  712. {
  713. int i, val1 = 0, id;
  714. int err;
  715. const char *client_name = "";
  716. struct w83781d_data *data = i2c_get_clientdata(new_client);
  717. data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
  718. if (!(data->lm75[0])) {
  719. err = -ENOMEM;
  720. goto ERROR_SC_0;
  721. }
  722. id = i2c_adapter_id(adapter);
  723. if (force_subclients[0] == id && force_subclients[1] == address) {
  724. for (i = 2; i <= 3; i++) {
  725. if (force_subclients[i] < 0x48 ||
  726. force_subclients[i] > 0x4f) {
  727. dev_err(&new_client->dev, "Invalid subclient "
  728. "address %d; must be 0x48-0x4f\n",
  729. force_subclients[i]);
  730. err = -EINVAL;
  731. goto ERROR_SC_1;
  732. }
  733. }
  734. w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
  735. (force_subclients[2] & 0x07) |
  736. ((force_subclients[3] & 0x07) << 4));
  737. data->lm75[0]->addr = force_subclients[2];
  738. } else {
  739. val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
  740. data->lm75[0]->addr = 0x48 + (val1 & 0x07);
  741. }
  742. if (kind != w83783s) {
  743. data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
  744. if (!(data->lm75[1])) {
  745. err = -ENOMEM;
  746. goto ERROR_SC_1;
  747. }
  748. if (force_subclients[0] == id &&
  749. force_subclients[1] == address) {
  750. data->lm75[1]->addr = force_subclients[3];
  751. } else {
  752. data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
  753. }
  754. if (data->lm75[0]->addr == data->lm75[1]->addr) {
  755. dev_err(&new_client->dev,
  756. "Duplicate addresses 0x%x for subclients.\n",
  757. data->lm75[0]->addr);
  758. err = -EBUSY;
  759. goto ERROR_SC_2;
  760. }
  761. }
  762. if (kind == w83781d)
  763. client_name = "w83781d subclient";
  764. else if (kind == w83782d)
  765. client_name = "w83782d subclient";
  766. else if (kind == w83783s)
  767. client_name = "w83783s subclient";
  768. else if (kind == w83627hf)
  769. client_name = "w83627hf subclient";
  770. else if (kind == as99127f)
  771. client_name = "as99127f subclient";
  772. for (i = 0; i <= 1; i++) {
  773. /* store all data in w83781d */
  774. i2c_set_clientdata(data->lm75[i], NULL);
  775. data->lm75[i]->adapter = adapter;
  776. data->lm75[i]->driver = &w83781d_driver;
  777. data->lm75[i]->flags = 0;
  778. strlcpy(data->lm75[i]->name, client_name,
  779. I2C_NAME_SIZE);
  780. if ((err = i2c_attach_client(data->lm75[i]))) {
  781. dev_err(&new_client->dev, "Subclient %d "
  782. "registration at address 0x%x "
  783. "failed.\n", i, data->lm75[i]->addr);
  784. if (i == 1)
  785. goto ERROR_SC_3;
  786. goto ERROR_SC_2;
  787. }
  788. if (kind == w83783s)
  789. break;
  790. }
  791. return 0;
  792. /* Undo inits in case of errors */
  793. ERROR_SC_3:
  794. i2c_detach_client(data->lm75[0]);
  795. ERROR_SC_2:
  796. kfree(data->lm75[1]);
  797. ERROR_SC_1:
  798. kfree(data->lm75[0]);
  799. ERROR_SC_0:
  800. return err;
  801. }
  802. #define IN_UNIT_ATTRS(X) \
  803. &dev_attr_in##X##_input.attr, \
  804. &dev_attr_in##X##_min.attr, \
  805. &dev_attr_in##X##_max.attr
  806. #define FAN_UNIT_ATTRS(X) \
  807. &dev_attr_fan##X##_input.attr, \
  808. &dev_attr_fan##X##_min.attr, \
  809. &dev_attr_fan##X##_div.attr
  810. #define TEMP_UNIT_ATTRS(X) \
  811. &dev_attr_temp##X##_input.attr, \
  812. &dev_attr_temp##X##_max.attr, \
  813. &dev_attr_temp##X##_max_hyst.attr
  814. static struct attribute* w83781d_attributes[] = {
  815. IN_UNIT_ATTRS(0),
  816. IN_UNIT_ATTRS(2),
  817. IN_UNIT_ATTRS(3),
  818. IN_UNIT_ATTRS(4),
  819. IN_UNIT_ATTRS(5),
  820. IN_UNIT_ATTRS(6),
  821. FAN_UNIT_ATTRS(1),
  822. FAN_UNIT_ATTRS(2),
  823. FAN_UNIT_ATTRS(3),
  824. TEMP_UNIT_ATTRS(1),
  825. TEMP_UNIT_ATTRS(2),
  826. &dev_attr_cpu0_vid.attr,
  827. &dev_attr_vrm.attr,
  828. &dev_attr_alarms.attr,
  829. &dev_attr_beep_mask.attr,
  830. &dev_attr_beep_enable.attr,
  831. NULL
  832. };
  833. static const struct attribute_group w83781d_group = {
  834. .attrs = w83781d_attributes,
  835. };
  836. static struct attribute *w83781d_attributes_opt[] = {
  837. IN_UNIT_ATTRS(1),
  838. IN_UNIT_ATTRS(7),
  839. IN_UNIT_ATTRS(8),
  840. TEMP_UNIT_ATTRS(3),
  841. &dev_attr_pwm1.attr,
  842. &dev_attr_pwm2.attr,
  843. &dev_attr_pwm2_enable.attr,
  844. &dev_attr_pwm3.attr,
  845. &dev_attr_pwm4.attr,
  846. &dev_attr_temp1_type.attr,
  847. &dev_attr_temp2_type.attr,
  848. &dev_attr_temp3_type.attr,
  849. NULL
  850. };
  851. static const struct attribute_group w83781d_group_opt = {
  852. .attrs = w83781d_attributes_opt,
  853. };
  854. static int
  855. w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
  856. {
  857. int i = 0, val1 = 0, val2;
  858. struct i2c_client *client;
  859. struct device *dev;
  860. struct w83781d_data *data;
  861. int err;
  862. const char *client_name = "";
  863. int is_isa = i2c_is_isa_adapter(adapter);
  864. enum vendor { winbond, asus } vendid;
  865. if (!is_isa
  866. && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
  867. err = -EINVAL;
  868. goto ERROR0;
  869. }
  870. /* Prevent users from forcing a kind for a bus it isn't supposed
  871. to possibly be on */
  872. if (is_isa && (kind == as99127f || kind == w83783s)) {
  873. dev_err(&adapter->dev,
  874. "Cannot force I2C-only chip for ISA address 0x%02x.\n",
  875. address);
  876. err = -EINVAL;
  877. goto ERROR0;
  878. }
  879. if (is_isa)
  880. if (!request_region(address, W83781D_EXTENT,
  881. w83781d_isa_driver.driver.name)) {
  882. dev_dbg(&adapter->dev, "Request of region "
  883. "0x%x-0x%x for w83781d failed\n", address,
  884. address + W83781D_EXTENT - 1);
  885. err = -EBUSY;
  886. goto ERROR0;
  887. }
  888. /* Probe whether there is anything available on this address. Already
  889. done for SMBus clients */
  890. if (kind < 0) {
  891. if (is_isa) {
  892. #define REALLY_SLOW_IO
  893. /* We need the timeouts for at least some LM78-like
  894. chips. But only if we read 'undefined' registers. */
  895. i = inb_p(address + 1);
  896. if (inb_p(address + 2) != i
  897. || inb_p(address + 3) != i
  898. || inb_p(address + 7) != i) {
  899. dev_dbg(&adapter->dev, "Detection of w83781d "
  900. "chip failed at step 1\n");
  901. err = -ENODEV;
  902. goto ERROR1;
  903. }
  904. #undef REALLY_SLOW_IO
  905. /* Let's just hope nothing breaks here */
  906. i = inb_p(address + 5) & 0x7f;
  907. outb_p(~i & 0x7f, address + 5);
  908. val2 = inb_p(address + 5) & 0x7f;
  909. if (val2 != (~i & 0x7f)) {
  910. outb_p(i, address + 5);
  911. dev_dbg(&adapter->dev, "Detection of w83781d "
  912. "chip failed at step 2 (0x%x != "
  913. "0x%x at 0x%x)\n", val2, ~i & 0x7f,
  914. address + 5);
  915. err = -ENODEV;
  916. goto ERROR1;
  917. }
  918. }
  919. }
  920. /* OK. For now, we presume we have a valid client. We now create the
  921. client structure, even though we cannot fill it completely yet.
  922. But it allows us to access w83781d_{read,write}_value. */
  923. if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
  924. err = -ENOMEM;
  925. goto ERROR1;
  926. }
  927. client = &data->client;
  928. i2c_set_clientdata(client, data);
  929. client->addr = address;
  930. mutex_init(&data->lock);
  931. client->adapter = adapter;
  932. client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver;
  933. client->flags = 0;
  934. dev = &client->dev;
  935. /* Now, we do the remaining detection. */
  936. /* The w8378?d may be stuck in some other bank than bank 0. This may
  937. make reading other information impossible. Specify a force=... or
  938. force_*=... parameter, and the Winbond will be reset to the right
  939. bank. */
  940. if (kind < 0) {
  941. if (w83781d_read_value(client, W83781D_REG_CONFIG) & 0x80) {
  942. dev_dbg(&adapter->dev, "Detection of w83781d chip "
  943. "failed at step 3\n");
  944. err = -ENODEV;
  945. goto ERROR2;
  946. }
  947. val1 = w83781d_read_value(client, W83781D_REG_BANK);
  948. val2 = w83781d_read_value(client, W83781D_REG_CHIPMAN);
  949. /* Check for Winbond or Asus ID if in bank 0 */
  950. if ((!(val1 & 0x07)) &&
  951. (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
  952. || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
  953. dev_dbg(&adapter->dev, "Detection of w83781d chip "
  954. "failed at step 4\n");
  955. err = -ENODEV;
  956. goto ERROR2;
  957. }
  958. /* If Winbond SMBus, check address at 0x48.
  959. Asus doesn't support, except for as99127f rev.2 */
  960. if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
  961. ((val1 & 0x80) && (val2 == 0x5c)))) {
  962. if (w83781d_read_value
  963. (client, W83781D_REG_I2C_ADDR) != address) {
  964. dev_dbg(&adapter->dev, "Detection of w83781d "
  965. "chip failed at step 5\n");
  966. err = -ENODEV;
  967. goto ERROR2;
  968. }
  969. }
  970. }
  971. /* We have either had a force parameter, or we have already detected the
  972. Winbond. Put it now into bank 0 and Vendor ID High Byte */
  973. w83781d_write_value(client, W83781D_REG_BANK,
  974. (w83781d_read_value(client, W83781D_REG_BANK)
  975. & 0x78) | 0x80);
  976. /* Determine the chip type. */
  977. if (kind <= 0) {
  978. /* get vendor ID */
  979. val2 = w83781d_read_value(client, W83781D_REG_CHIPMAN);
  980. if (val2 == 0x5c)
  981. vendid = winbond;
  982. else if (val2 == 0x12)
  983. vendid = asus;
  984. else {
  985. dev_dbg(&adapter->dev, "w83781d chip vendor is "
  986. "neither Winbond nor Asus\n");
  987. err = -ENODEV;
  988. goto ERROR2;
  989. }
  990. val1 = w83781d_read_value(client, W83781D_REG_WCHIPID);
  991. if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
  992. kind = w83781d;
  993. else if (val1 == 0x30 && vendid == winbond)
  994. kind = w83782d;
  995. else if (val1 == 0x40 && vendid == winbond && !is_isa
  996. && address == 0x2d)
  997. kind = w83783s;
  998. else if (val1 == 0x21 && vendid == winbond)
  999. kind = w83627hf;
  1000. else if (val1 == 0x31 && !is_isa && address >= 0x28)
  1001. kind = as99127f;
  1002. else {
  1003. if (kind == 0)
  1004. dev_warn(&adapter->dev, "Ignoring 'force' "
  1005. "parameter for unknown chip at "
  1006. "address 0x%02x\n", address);
  1007. err = -EINVAL;
  1008. goto ERROR2;
  1009. }
  1010. }
  1011. if (kind == w83781d) {
  1012. client_name = "w83781d";
  1013. } else if (kind == w83782d) {
  1014. client_name = "w83782d";
  1015. } else if (kind == w83783s) {
  1016. client_name = "w83783s";
  1017. } else if (kind == w83627hf) {
  1018. client_name = "w83627hf";
  1019. } else if (kind == as99127f) {
  1020. client_name = "as99127f";
  1021. }
  1022. /* Fill in the remaining client fields and put into the global list */
  1023. strlcpy(client->name, client_name, I2C_NAME_SIZE);
  1024. data->type = kind;
  1025. data->valid = 0;
  1026. mutex_init(&data->update_lock);
  1027. /* Tell the I2C layer a new client has arrived */
  1028. if ((err = i2c_attach_client(client)))
  1029. goto ERROR2;
  1030. /* attach secondary i2c lm75-like clients */
  1031. if (!is_isa) {
  1032. if ((err = w83781d_detect_subclients(adapter, address,
  1033. kind, client)))
  1034. goto ERROR3;
  1035. } else {
  1036. data->lm75[0] = NULL;
  1037. data->lm75[1] = NULL;
  1038. }
  1039. /* Initialize the chip */
  1040. w83781d_init_client(client);
  1041. /* A few vars need to be filled upon startup */
  1042. for (i = 1; i <= 3; i++) {
  1043. data->fan_min[i - 1] = w83781d_read_value(client,
  1044. W83781D_REG_FAN_MIN(i));
  1045. }
  1046. if (kind != w83781d && kind != as99127f)
  1047. for (i = 0; i < 4; i++)
  1048. data->pwmenable[i] = 1;
  1049. /* Register sysfs hooks */
  1050. if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
  1051. goto ERROR4;
  1052. if (kind != w83783s) {
  1053. if ((err = device_create_file(dev, &dev_attr_in1_input))
  1054. || (err = device_create_file(dev, &dev_attr_in1_min))
  1055. || (err = device_create_file(dev, &dev_attr_in1_max)))
  1056. goto ERROR4;
  1057. }
  1058. if (kind != as99127f && kind != w83781d && kind != w83783s) {
  1059. if ((err = device_create_file(dev, &dev_attr_in7_input))
  1060. || (err = device_create_file(dev, &dev_attr_in7_min))
  1061. || (err = device_create_file(dev, &dev_attr_in7_max))
  1062. || (err = device_create_file(dev, &dev_attr_in8_input))
  1063. || (err = device_create_file(dev, &dev_attr_in8_min))
  1064. || (err = device_create_file(dev, &dev_attr_in8_max)))
  1065. goto ERROR4;
  1066. }
  1067. if (kind != w83783s) {
  1068. if ((err = device_create_file(dev, &dev_attr_temp3_input))
  1069. || (err = device_create_file(dev, &dev_attr_temp3_max))
  1070. || (err = device_create_file(dev,
  1071. &dev_attr_temp3_max_hyst)))
  1072. goto ERROR4;
  1073. }
  1074. if (kind != w83781d && kind != as99127f) {
  1075. if ((err = device_create_file(dev, &dev_attr_pwm1))
  1076. || (err = device_create_file(dev, &dev_attr_pwm2))
  1077. || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
  1078. goto ERROR4;
  1079. }
  1080. if (kind == w83782d && !is_isa) {
  1081. if ((err = device_create_file(dev, &dev_attr_pwm3))
  1082. || (err = device_create_file(dev, &dev_attr_pwm4)))
  1083. goto ERROR4;
  1084. }
  1085. if (kind != as99127f && kind != w83781d) {
  1086. if ((err = device_create_file(dev, &dev_attr_temp1_type))
  1087. || (err = device_create_file(dev,
  1088. &dev_attr_temp2_type)))
  1089. goto ERROR4;
  1090. if (kind != w83783s) {
  1091. if ((err = device_create_file(dev,
  1092. &dev_attr_temp3_type)))
  1093. goto ERROR4;
  1094. }
  1095. }
  1096. data->class_dev = hwmon_device_register(dev);
  1097. if (IS_ERR(data->class_dev)) {
  1098. err = PTR_ERR(data->class_dev);
  1099. goto ERROR4;
  1100. }
  1101. return 0;
  1102. ERROR4:
  1103. sysfs_remove_group(&dev->kobj, &w83781d_group);
  1104. sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
  1105. if (data->lm75[1]) {
  1106. i2c_detach_client(data->lm75[1]);
  1107. kfree(data->lm75[1]);
  1108. }
  1109. if (data->lm75[0]) {
  1110. i2c_detach_client(data->lm75[0]);
  1111. kfree(data->lm75[0]);
  1112. }
  1113. ERROR3:
  1114. i2c_detach_client(client);
  1115. ERROR2:
  1116. kfree(data);
  1117. ERROR1:
  1118. if (is_isa)
  1119. release_region(address, W83781D_EXTENT);
  1120. ERROR0:
  1121. return err;
  1122. }
  1123. static int
  1124. w83781d_detach_client(struct i2c_client *client)
  1125. {
  1126. struct w83781d_data *data = i2c_get_clientdata(client);
  1127. int err;
  1128. /* main client */
  1129. if (data) {
  1130. hwmon_device_unregister(data->class_dev);
  1131. sysfs_remove_group(&client->dev.kobj, &w83781d_group);
  1132. sysfs_remove_group(&client->dev.kobj, &w83781d_group_opt);
  1133. }
  1134. if (i2c_is_isa_client(client))
  1135. release_region(client->addr, W83781D_EXTENT);
  1136. if ((err = i2c_detach_client(client)))
  1137. return err;
  1138. /* main client */
  1139. if (data)
  1140. kfree(data);
  1141. /* subclient */
  1142. else
  1143. kfree(client);
  1144. return 0;
  1145. }
  1146. /* The SMBus locks itself, usually, but nothing may access the Winbond between
  1147. bank switches. ISA access must always be locked explicitly!
  1148. We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
  1149. would slow down the W83781D access and should not be necessary.
  1150. There are some ugly typecasts here, but the good news is - they should
  1151. nowhere else be necessary! */
  1152. static int
  1153. w83781d_read_value(struct i2c_client *client, u16 reg)
  1154. {
  1155. struct w83781d_data *data = i2c_get_clientdata(client);
  1156. int res, word_sized, bank;
  1157. struct i2c_client *cl;
  1158. mutex_lock(&data->lock);
  1159. if (i2c_is_isa_client(client)) {
  1160. word_sized = (((reg & 0xff00) == 0x100)
  1161. || ((reg & 0xff00) == 0x200))
  1162. && (((reg & 0x00ff) == 0x50)
  1163. || ((reg & 0x00ff) == 0x53)
  1164. || ((reg & 0x00ff) == 0x55));
  1165. if (reg & 0xff00) {
  1166. outb_p(W83781D_REG_BANK,
  1167. client->addr + W83781D_ADDR_REG_OFFSET);
  1168. outb_p(reg >> 8,
  1169. client->addr + W83781D_DATA_REG_OFFSET);
  1170. }
  1171. outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
  1172. res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
  1173. if (word_sized) {
  1174. outb_p((reg & 0xff) + 1,
  1175. client->addr + W83781D_ADDR_REG_OFFSET);
  1176. res =
  1177. (res << 8) + inb_p(client->addr +
  1178. W83781D_DATA_REG_OFFSET);
  1179. }
  1180. if (reg & 0xff00) {
  1181. outb_p(W83781D_REG_BANK,
  1182. client->addr + W83781D_ADDR_REG_OFFSET);
  1183. outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
  1184. }
  1185. } else {
  1186. bank = (reg >> 8) & 0x0f;
  1187. if (bank > 2)
  1188. /* switch banks */
  1189. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1190. bank);
  1191. if (bank == 0 || bank > 2) {
  1192. res = i2c_smbus_read_byte_data(client, reg & 0xff);
  1193. } else {
  1194. /* switch to subclient */
  1195. cl = data->lm75[bank - 1];
  1196. /* convert from ISA to LM75 I2C addresses */
  1197. switch (reg & 0xff) {
  1198. case 0x50: /* TEMP */
  1199. res = swab16(i2c_smbus_read_word_data(cl, 0));
  1200. break;
  1201. case 0x52: /* CONFIG */
  1202. res = i2c_smbus_read_byte_data(cl, 1);
  1203. break;
  1204. case 0x53: /* HYST */
  1205. res = swab16(i2c_smbus_read_word_data(cl, 2));
  1206. break;
  1207. case 0x55: /* OVER */
  1208. default:
  1209. res = swab16(i2c_smbus_read_word_data(cl, 3));
  1210. break;
  1211. }
  1212. }
  1213. if (bank > 2)
  1214. i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
  1215. }
  1216. mutex_unlock(&data->lock);
  1217. return res;
  1218. }
  1219. static int
  1220. w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
  1221. {
  1222. struct w83781d_data *data = i2c_get_clientdata(client);
  1223. int word_sized, bank;
  1224. struct i2c_client *cl;
  1225. mutex_lock(&data->lock);
  1226. if (i2c_is_isa_client(client)) {
  1227. word_sized = (((reg & 0xff00) == 0x100)
  1228. || ((reg & 0xff00) == 0x200))
  1229. && (((reg & 0x00ff) == 0x53)
  1230. || ((reg & 0x00ff) == 0x55));
  1231. if (reg & 0xff00) {
  1232. outb_p(W83781D_REG_BANK,
  1233. client->addr + W83781D_ADDR_REG_OFFSET);
  1234. outb_p(reg >> 8,
  1235. client->addr + W83781D_DATA_REG_OFFSET);
  1236. }
  1237. outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
  1238. if (word_sized) {
  1239. outb_p(value >> 8,
  1240. client->addr + W83781D_DATA_REG_OFFSET);
  1241. outb_p((reg & 0xff) + 1,
  1242. client->addr + W83781D_ADDR_REG_OFFSET);
  1243. }
  1244. outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
  1245. if (reg & 0xff00) {
  1246. outb_p(W83781D_REG_BANK,
  1247. client->addr + W83781D_ADDR_REG_OFFSET);
  1248. outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
  1249. }
  1250. } else {
  1251. bank = (reg >> 8) & 0x0f;
  1252. if (bank > 2)
  1253. /* switch banks */
  1254. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1255. bank);
  1256. if (bank == 0 || bank > 2) {
  1257. i2c_smbus_write_byte_data(client, reg & 0xff,
  1258. value & 0xff);
  1259. } else {
  1260. /* switch to subclient */
  1261. cl = data->lm75[bank - 1];
  1262. /* convert from ISA to LM75 I2C addresses */
  1263. switch (reg & 0xff) {
  1264. case 0x52: /* CONFIG */
  1265. i2c_smbus_write_byte_data(cl, 1, value & 0xff);
  1266. break;
  1267. case 0x53: /* HYST */
  1268. i2c_smbus_write_word_data(cl, 2, swab16(value));
  1269. break;
  1270. case 0x55: /* OVER */
  1271. i2c_smbus_write_word_data(cl, 3, swab16(value));
  1272. break;
  1273. }
  1274. }
  1275. if (bank > 2)
  1276. i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
  1277. }
  1278. mutex_unlock(&data->lock);
  1279. return 0;
  1280. }
  1281. static void
  1282. w83781d_init_client(struct i2c_client *client)
  1283. {
  1284. struct w83781d_data *data = i2c_get_clientdata(client);
  1285. int i, p;
  1286. int type = data->type;
  1287. u8 tmp;
  1288. if (reset && type != as99127f) { /* this resets registers we don't have
  1289. documentation for on the as99127f */
  1290. /* Resetting the chip has been the default for a long time,
  1291. but it causes the BIOS initializations (fan clock dividers,
  1292. thermal sensor types...) to be lost, so it is now optional.
  1293. It might even go away if nobody reports it as being useful,
  1294. as I see very little reason why this would be needed at
  1295. all. */
  1296. dev_info(&client->dev, "If reset=1 solved a problem you were "
  1297. "having, please report!\n");
  1298. /* save these registers */
  1299. i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
  1300. p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
  1301. /* Reset all except Watchdog values and last conversion values
  1302. This sets fan-divs to 2, among others */
  1303. w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
  1304. /* Restore the registers and disable power-on abnormal beep.
  1305. This saves FAN 1/2/3 input/output values set by BIOS. */
  1306. w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1307. w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
  1308. /* Disable master beep-enable (reset turns it on).
  1309. Individual beep_mask should be reset to off but for some reason
  1310. disabling this bit helps some people not get beeped */
  1311. w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
  1312. }
  1313. /* Disable power-on abnormal beep, as advised by the datasheet.
  1314. Already done if reset=1. */
  1315. if (init && !reset && type != as99127f) {
  1316. i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
  1317. w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1318. }
  1319. data->vrm = vid_which_vrm();
  1320. if ((type != w83781d) && (type != as99127f)) {
  1321. tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
  1322. for (i = 1; i <= 3; i++) {
  1323. if (!(tmp & BIT_SCFG1[i - 1])) {
  1324. data->sens[i - 1] = W83781D_DEFAULT_BETA;
  1325. } else {
  1326. if (w83781d_read_value
  1327. (client,
  1328. W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
  1329. data->sens[i - 1] = 1;
  1330. else
  1331. data->sens[i - 1] = 2;
  1332. }
  1333. if (type == w83783s && i == 2)
  1334. break;
  1335. }
  1336. }
  1337. if (init && type != as99127f) {
  1338. /* Enable temp2 */
  1339. tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
  1340. if (tmp & 0x01) {
  1341. dev_warn(&client->dev, "Enabling temp2, readings "
  1342. "might not make sense\n");
  1343. w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
  1344. tmp & 0xfe);
  1345. }
  1346. /* Enable temp3 */
  1347. if (type != w83783s) {
  1348. tmp = w83781d_read_value(client,
  1349. W83781D_REG_TEMP3_CONFIG);
  1350. if (tmp & 0x01) {
  1351. dev_warn(&client->dev, "Enabling temp3, "
  1352. "readings might not make sense\n");
  1353. w83781d_write_value(client,
  1354. W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
  1355. }
  1356. }
  1357. }
  1358. /* Start monitoring */
  1359. w83781d_write_value(client, W83781D_REG_CONFIG,
  1360. (w83781d_read_value(client,
  1361. W83781D_REG_CONFIG) & 0xf7)
  1362. | 0x01);
  1363. }
  1364. static struct w83781d_data *w83781d_update_device(struct device *dev)
  1365. {
  1366. struct i2c_client *client = to_i2c_client(dev);
  1367. struct w83781d_data *data = i2c_get_clientdata(client);
  1368. int i;
  1369. mutex_lock(&data->update_lock);
  1370. if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
  1371. || !data->valid) {
  1372. dev_dbg(dev, "Starting device update\n");
  1373. for (i = 0; i <= 8; i++) {
  1374. if (data->type == w83783s && i == 1)
  1375. continue; /* 783S has no in1 */
  1376. data->in[i] =
  1377. w83781d_read_value(client, W83781D_REG_IN(i));
  1378. data->in_min[i] =
  1379. w83781d_read_value(client, W83781D_REG_IN_MIN(i));
  1380. data->in_max[i] =
  1381. w83781d_read_value(client, W83781D_REG_IN_MAX(i));
  1382. if ((data->type != w83782d)
  1383. && (data->type != w83627hf) && (i == 6))
  1384. break;
  1385. }
  1386. for (i = 1; i <= 3; i++) {
  1387. data->fan[i - 1] =
  1388. w83781d_read_value(client, W83781D_REG_FAN(i));
  1389. data->fan_min[i - 1] =
  1390. w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
  1391. }
  1392. if (data->type != w83781d && data->type != as99127f) {
  1393. for (i = 1; i <= 4; i++) {
  1394. data->pwm[i - 1] =
  1395. w83781d_read_value(client,
  1396. W83781D_REG_PWM(i));
  1397. if ((data->type != w83782d
  1398. || i2c_is_isa_client(client))
  1399. && i == 2)
  1400. break;
  1401. }
  1402. /* Only PWM2 can be disabled */
  1403. data->pwmenable[1] = (w83781d_read_value(client,
  1404. W83781D_REG_PWMCLK12) & 0x08) >> 3;
  1405. }
  1406. data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
  1407. data->temp_max =
  1408. w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
  1409. data->temp_max_hyst =
  1410. w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
  1411. data->temp_add[0] =
  1412. w83781d_read_value(client, W83781D_REG_TEMP(2));
  1413. data->temp_max_add[0] =
  1414. w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
  1415. data->temp_max_hyst_add[0] =
  1416. w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
  1417. if (data->type != w83783s) {
  1418. data->temp_add[1] =
  1419. w83781d_read_value(client, W83781D_REG_TEMP(3));
  1420. data->temp_max_add[1] =
  1421. w83781d_read_value(client,
  1422. W83781D_REG_TEMP_OVER(3));
  1423. data->temp_max_hyst_add[1] =
  1424. w83781d_read_value(client,
  1425. W83781D_REG_TEMP_HYST(3));
  1426. }
  1427. i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
  1428. data->vid = i & 0x0f;
  1429. data->vid |= (w83781d_read_value(client,
  1430. W83781D_REG_CHIPID) & 0x01) << 4;
  1431. data->fan_div[0] = (i >> 4) & 0x03;
  1432. data->fan_div[1] = (i >> 6) & 0x03;
  1433. data->fan_div[2] = (w83781d_read_value(client,
  1434. W83781D_REG_PIN) >> 6) & 0x03;
  1435. if ((data->type != w83781d) && (data->type != as99127f)) {
  1436. i = w83781d_read_value(client, W83781D_REG_VBAT);
  1437. data->fan_div[0] |= (i >> 3) & 0x04;
  1438. data->fan_div[1] |= (i >> 4) & 0x04;
  1439. data->fan_div[2] |= (i >> 5) & 0x04;
  1440. }
  1441. if ((data->type == w83782d) || (data->type == w83627hf)) {
  1442. data->alarms = w83781d_read_value(client,
  1443. W83782D_REG_ALARM1)
  1444. | (w83781d_read_value(client,
  1445. W83782D_REG_ALARM2) << 8)
  1446. | (w83781d_read_value(client,
  1447. W83782D_REG_ALARM3) << 16);
  1448. } else if (data->type == w83783s) {
  1449. data->alarms = w83781d_read_value(client,
  1450. W83782D_REG_ALARM1)
  1451. | (w83781d_read_value(client,
  1452. W83782D_REG_ALARM2) << 8);
  1453. } else {
  1454. /* No real-time status registers, fall back to
  1455. interrupt status registers */
  1456. data->alarms = w83781d_read_value(client,
  1457. W83781D_REG_ALARM1)
  1458. | (w83781d_read_value(client,
  1459. W83781D_REG_ALARM2) << 8);
  1460. }
  1461. i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
  1462. data->beep_enable = i >> 7;
  1463. data->beep_mask = ((i & 0x7f) << 8) +
  1464. w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
  1465. if ((data->type != w83781d) && (data->type != as99127f)) {
  1466. data->beep_mask |=
  1467. w83781d_read_value(client,
  1468. W83781D_REG_BEEP_INTS3) << 16;
  1469. }
  1470. data->last_updated = jiffies;
  1471. data->valid = 1;
  1472. }
  1473. mutex_unlock(&data->update_lock);
  1474. return data;
  1475. }
  1476. static int __init
  1477. sensors_w83781d_init(void)
  1478. {
  1479. int res;
  1480. res = i2c_add_driver(&w83781d_driver);
  1481. if (res)
  1482. return res;
  1483. /* Don't exit if this one fails, we still want the I2C variants
  1484. to work! */
  1485. if (i2c_isa_add_driver(&w83781d_isa_driver))
  1486. isa_address = 0;
  1487. return 0;
  1488. }
  1489. static void __exit
  1490. sensors_w83781d_exit(void)
  1491. {
  1492. if (isa_address)
  1493. i2c_isa_del_driver(&w83781d_isa_driver);
  1494. i2c_del_driver(&w83781d_driver);
  1495. }
  1496. MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
  1497. "Philip Edelbrock <phil@netroedge.com>, "
  1498. "and Mark Studebaker <mdsxyz123@yahoo.com>");
  1499. MODULE_DESCRIPTION("W83781D driver");
  1500. MODULE_LICENSE("GPL");
  1501. module_init(sensors_w83781d_init);
  1502. module_exit(sensors_w83781d_exit);