ioatdma_io.h 3.5 KB

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  1. /*
  2. * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 2 of the License, or (at your option)
  7. * any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc., 59
  16. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called COPYING.
  20. */
  21. #ifndef IOATDMA_IO_H
  22. #define IOATDMA_IO_H
  23. #include <asm/io.h>
  24. /*
  25. * device and per-channel MMIO register read and write functions
  26. * this is a lot of anoying inline functions, but it's typesafe
  27. */
  28. static inline u8 ioatdma_read8(struct ioat_device *device,
  29. unsigned int offset)
  30. {
  31. return readb(device->reg_base + offset);
  32. }
  33. static inline u16 ioatdma_read16(struct ioat_device *device,
  34. unsigned int offset)
  35. {
  36. return readw(device->reg_base + offset);
  37. }
  38. static inline u32 ioatdma_read32(struct ioat_device *device,
  39. unsigned int offset)
  40. {
  41. return readl(device->reg_base + offset);
  42. }
  43. static inline void ioatdma_write8(struct ioat_device *device,
  44. unsigned int offset, u8 value)
  45. {
  46. writeb(value, device->reg_base + offset);
  47. }
  48. static inline void ioatdma_write16(struct ioat_device *device,
  49. unsigned int offset, u16 value)
  50. {
  51. writew(value, device->reg_base + offset);
  52. }
  53. static inline void ioatdma_write32(struct ioat_device *device,
  54. unsigned int offset, u32 value)
  55. {
  56. writel(value, device->reg_base + offset);
  57. }
  58. static inline u8 ioatdma_chan_read8(struct ioat_dma_chan *chan,
  59. unsigned int offset)
  60. {
  61. return readb(chan->reg_base + offset);
  62. }
  63. static inline u16 ioatdma_chan_read16(struct ioat_dma_chan *chan,
  64. unsigned int offset)
  65. {
  66. return readw(chan->reg_base + offset);
  67. }
  68. static inline u32 ioatdma_chan_read32(struct ioat_dma_chan *chan,
  69. unsigned int offset)
  70. {
  71. return readl(chan->reg_base + offset);
  72. }
  73. static inline void ioatdma_chan_write8(struct ioat_dma_chan *chan,
  74. unsigned int offset, u8 value)
  75. {
  76. writeb(value, chan->reg_base + offset);
  77. }
  78. static inline void ioatdma_chan_write16(struct ioat_dma_chan *chan,
  79. unsigned int offset, u16 value)
  80. {
  81. writew(value, chan->reg_base + offset);
  82. }
  83. static inline void ioatdma_chan_write32(struct ioat_dma_chan *chan,
  84. unsigned int offset, u32 value)
  85. {
  86. writel(value, chan->reg_base + offset);
  87. }
  88. #if (BITS_PER_LONG == 64)
  89. static inline u64 ioatdma_chan_read64(struct ioat_dma_chan *chan,
  90. unsigned int offset)
  91. {
  92. return readq(chan->reg_base + offset);
  93. }
  94. static inline void ioatdma_chan_write64(struct ioat_dma_chan *chan,
  95. unsigned int offset, u64 value)
  96. {
  97. writeq(value, chan->reg_base + offset);
  98. }
  99. #endif
  100. #endif /* IOATDMA_IO_H */