vme_scc.c 28 KB

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  1. /*
  2. * drivers/char/vme_scc.c: MVME147, MVME162, BVME6000 SCC serial ports
  3. * implementation.
  4. * Copyright 1999 Richard Hirst <richard@sleepie.demon.co.uk>
  5. *
  6. * Based on atari_SCC.c which was
  7. * Copyright 1994-95 Roman Hodek <Roman.Hodek@informatik.uni-erlangen.de>
  8. * Partially based on PC-Linux serial.c by Linus Torvalds and Theodore Ts'o
  9. *
  10. * This file is subject to the terms and conditions of the GNU General Public
  11. * License. See the file COPYING in the main directory of this archive
  12. * for more details.
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/kdev_t.h>
  17. #include <asm/io.h>
  18. #include <linux/kernel.h>
  19. #include <linux/ioport.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/errno.h>
  22. #include <linux/tty.h>
  23. #include <linux/tty_flip.h>
  24. #include <linux/mm.h>
  25. #include <linux/serial.h>
  26. #include <linux/fcntl.h>
  27. #include <linux/major.h>
  28. #include <linux/delay.h>
  29. #include <linux/slab.h>
  30. #include <linux/miscdevice.h>
  31. #include <linux/console.h>
  32. #include <linux/init.h>
  33. #include <asm/setup.h>
  34. #include <asm/bootinfo.h>
  35. #ifdef CONFIG_MVME147_SCC
  36. #include <asm/mvme147hw.h>
  37. #endif
  38. #ifdef CONFIG_MVME162_SCC
  39. #include <asm/mvme16xhw.h>
  40. #endif
  41. #ifdef CONFIG_BVME6000_SCC
  42. #include <asm/bvme6000hw.h>
  43. #endif
  44. #include <linux/generic_serial.h>
  45. #include "scc.h"
  46. #define CHANNEL_A 0
  47. #define CHANNEL_B 1
  48. #define SCC_MINOR_BASE 64
  49. /* Shadows for all SCC write registers */
  50. static unsigned char scc_shadow[2][16];
  51. /* Location to access for SCC register access delay */
  52. static volatile unsigned char *scc_del = NULL;
  53. /* To keep track of STATUS_REG state for detection of Ext/Status int source */
  54. static unsigned char scc_last_status_reg[2];
  55. /***************************** Prototypes *****************************/
  56. /* Function prototypes */
  57. static void scc_disable_tx_interrupts(void * ptr);
  58. static void scc_enable_tx_interrupts(void * ptr);
  59. static void scc_disable_rx_interrupts(void * ptr);
  60. static void scc_enable_rx_interrupts(void * ptr);
  61. static int scc_get_CD(void * ptr);
  62. static void scc_shutdown_port(void * ptr);
  63. static int scc_set_real_termios(void *ptr);
  64. static void scc_hungup(void *ptr);
  65. static void scc_close(void *ptr);
  66. static int scc_chars_in_buffer(void * ptr);
  67. static int scc_open(struct tty_struct * tty, struct file * filp);
  68. static int scc_ioctl(struct tty_struct * tty, struct file * filp,
  69. unsigned int cmd, unsigned long arg);
  70. static void scc_throttle(struct tty_struct *tty);
  71. static void scc_unthrottle(struct tty_struct *tty);
  72. static irqreturn_t scc_tx_int(int irq, void *data);
  73. static irqreturn_t scc_rx_int(int irq, void *data);
  74. static irqreturn_t scc_stat_int(int irq, void *data);
  75. static irqreturn_t scc_spcond_int(int irq, void *data);
  76. static void scc_setsignals(struct scc_port *port, int dtr, int rts);
  77. static void scc_break_ctl(struct tty_struct *tty, int break_state);
  78. static struct tty_driver *scc_driver;
  79. struct scc_port scc_ports[2];
  80. int scc_initialized = 0;
  81. /*---------------------------------------------------------------------------
  82. * Interface from generic_serial.c back here
  83. *--------------------------------------------------------------------------*/
  84. static struct real_driver scc_real_driver = {
  85. scc_disable_tx_interrupts,
  86. scc_enable_tx_interrupts,
  87. scc_disable_rx_interrupts,
  88. scc_enable_rx_interrupts,
  89. scc_get_CD,
  90. scc_shutdown_port,
  91. scc_set_real_termios,
  92. scc_chars_in_buffer,
  93. scc_close,
  94. scc_hungup,
  95. NULL
  96. };
  97. static const struct tty_operations scc_ops = {
  98. .open = scc_open,
  99. .close = gs_close,
  100. .write = gs_write,
  101. .put_char = gs_put_char,
  102. .flush_chars = gs_flush_chars,
  103. .write_room = gs_write_room,
  104. .chars_in_buffer = gs_chars_in_buffer,
  105. .flush_buffer = gs_flush_buffer,
  106. .ioctl = scc_ioctl,
  107. .throttle = scc_throttle,
  108. .unthrottle = scc_unthrottle,
  109. .set_termios = gs_set_termios,
  110. .stop = gs_stop,
  111. .start = gs_start,
  112. .hangup = gs_hangup,
  113. .break_ctl = scc_break_ctl,
  114. };
  115. /*----------------------------------------------------------------------------
  116. * vme_scc_init() and support functions
  117. *---------------------------------------------------------------------------*/
  118. static int scc_init_drivers(void)
  119. {
  120. int error;
  121. scc_driver = alloc_tty_driver(2);
  122. if (!scc_driver)
  123. return -ENOMEM;
  124. scc_driver->owner = THIS_MODULE;
  125. scc_driver->driver_name = "scc";
  126. scc_driver->name = "ttyS";
  127. scc_driver->major = TTY_MAJOR;
  128. scc_driver->minor_start = SCC_MINOR_BASE;
  129. scc_driver->type = TTY_DRIVER_TYPE_SERIAL;
  130. scc_driver->subtype = SERIAL_TYPE_NORMAL;
  131. scc_driver->init_termios = tty_std_termios;
  132. scc_driver->init_termios.c_cflag =
  133. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  134. scc_driver->init_termios.c_ispeed = 9600;
  135. scc_driver->init_termios.c_ospeed = 9600;
  136. scc_driver->flags = TTY_DRIVER_REAL_RAW;
  137. tty_set_operations(scc_driver, &scc_ops);
  138. if ((error = tty_register_driver(scc_driver))) {
  139. printk(KERN_ERR "scc: Couldn't register scc driver, error = %d\n",
  140. error);
  141. put_tty_driver(scc_driver);
  142. return 1;
  143. }
  144. return 0;
  145. }
  146. /* ports[] array is indexed by line no (i.e. [0] for ttyS0, [1] for ttyS1).
  147. */
  148. static void scc_init_portstructs(void)
  149. {
  150. struct scc_port *port;
  151. int i;
  152. for (i = 0; i < 2; i++) {
  153. port = scc_ports + i;
  154. port->gs.magic = SCC_MAGIC;
  155. port->gs.close_delay = HZ/2;
  156. port->gs.closing_wait = 30 * HZ;
  157. port->gs.rd = &scc_real_driver;
  158. #ifdef NEW_WRITE_LOCKING
  159. port->gs.port_write_mutex = MUTEX;
  160. #endif
  161. init_waitqueue_head(&port->gs.open_wait);
  162. init_waitqueue_head(&port->gs.close_wait);
  163. }
  164. }
  165. #ifdef CONFIG_MVME147_SCC
  166. static int mvme147_scc_init(void)
  167. {
  168. struct scc_port *port;
  169. printk(KERN_INFO "SCC: MVME147 Serial Driver\n");
  170. /* Init channel A */
  171. port = &scc_ports[0];
  172. port->channel = CHANNEL_A;
  173. port->ctrlp = (volatile unsigned char *)M147_SCC_A_ADDR;
  174. port->datap = port->ctrlp + 1;
  175. port->port_a = &scc_ports[0];
  176. port->port_b = &scc_ports[1];
  177. request_irq(MVME147_IRQ_SCCA_TX, scc_tx_int, IRQF_DISABLED,
  178. "SCC-A TX", port);
  179. request_irq(MVME147_IRQ_SCCA_STAT, scc_stat_int, IRQF_DISABLED,
  180. "SCC-A status", port);
  181. request_irq(MVME147_IRQ_SCCA_RX, scc_rx_int, IRQF_DISABLED,
  182. "SCC-A RX", port);
  183. request_irq(MVME147_IRQ_SCCA_SPCOND, scc_spcond_int, IRQF_DISABLED,
  184. "SCC-A special cond", port);
  185. {
  186. SCC_ACCESS_INIT(port);
  187. /* disable interrupts for this channel */
  188. SCCwrite(INT_AND_DMA_REG, 0);
  189. /* Set the interrupt vector */
  190. SCCwrite(INT_VECTOR_REG, MVME147_IRQ_SCC_BASE);
  191. /* Interrupt parameters: vector includes status, status low */
  192. SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT);
  193. SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB);
  194. }
  195. /* Init channel B */
  196. port = &scc_ports[1];
  197. port->channel = CHANNEL_B;
  198. port->ctrlp = (volatile unsigned char *)M147_SCC_B_ADDR;
  199. port->datap = port->ctrlp + 1;
  200. port->port_a = &scc_ports[0];
  201. port->port_b = &scc_ports[1];
  202. request_irq(MVME147_IRQ_SCCB_TX, scc_tx_int, IRQF_DISABLED,
  203. "SCC-B TX", port);
  204. request_irq(MVME147_IRQ_SCCB_STAT, scc_stat_int, IRQF_DISABLED,
  205. "SCC-B status", port);
  206. request_irq(MVME147_IRQ_SCCB_RX, scc_rx_int, IRQF_DISABLED,
  207. "SCC-B RX", port);
  208. request_irq(MVME147_IRQ_SCCB_SPCOND, scc_spcond_int, IRQF_DISABLED,
  209. "SCC-B special cond", port);
  210. {
  211. SCC_ACCESS_INIT(port);
  212. /* disable interrupts for this channel */
  213. SCCwrite(INT_AND_DMA_REG, 0);
  214. }
  215. /* Ensure interrupts are enabled in the PCC chip */
  216. m147_pcc->serial_cntrl=PCC_LEVEL_SERIAL|PCC_INT_ENAB;
  217. /* Initialise the tty driver structures and register */
  218. scc_init_portstructs();
  219. scc_init_drivers();
  220. return 0;
  221. }
  222. #endif
  223. #ifdef CONFIG_MVME162_SCC
  224. static int mvme162_scc_init(void)
  225. {
  226. struct scc_port *port;
  227. if (!(mvme16x_config & MVME16x_CONFIG_GOT_SCCA))
  228. return (-ENODEV);
  229. printk(KERN_INFO "SCC: MVME162 Serial Driver\n");
  230. /* Init channel A */
  231. port = &scc_ports[0];
  232. port->channel = CHANNEL_A;
  233. port->ctrlp = (volatile unsigned char *)MVME_SCC_A_ADDR;
  234. port->datap = port->ctrlp + 2;
  235. port->port_a = &scc_ports[0];
  236. port->port_b = &scc_ports[1];
  237. request_irq(MVME162_IRQ_SCCA_TX, scc_tx_int, IRQF_DISABLED,
  238. "SCC-A TX", port);
  239. request_irq(MVME162_IRQ_SCCA_STAT, scc_stat_int, IRQF_DISABLED,
  240. "SCC-A status", port);
  241. request_irq(MVME162_IRQ_SCCA_RX, scc_rx_int, IRQF_DISABLED,
  242. "SCC-A RX", port);
  243. request_irq(MVME162_IRQ_SCCA_SPCOND, scc_spcond_int, IRQF_DISABLED,
  244. "SCC-A special cond", port);
  245. {
  246. SCC_ACCESS_INIT(port);
  247. /* disable interrupts for this channel */
  248. SCCwrite(INT_AND_DMA_REG, 0);
  249. /* Set the interrupt vector */
  250. SCCwrite(INT_VECTOR_REG, MVME162_IRQ_SCC_BASE);
  251. /* Interrupt parameters: vector includes status, status low */
  252. SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT);
  253. SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB);
  254. }
  255. /* Init channel B */
  256. port = &scc_ports[1];
  257. port->channel = CHANNEL_B;
  258. port->ctrlp = (volatile unsigned char *)MVME_SCC_B_ADDR;
  259. port->datap = port->ctrlp + 2;
  260. port->port_a = &scc_ports[0];
  261. port->port_b = &scc_ports[1];
  262. request_irq(MVME162_IRQ_SCCB_TX, scc_tx_int, IRQF_DISABLED,
  263. "SCC-B TX", port);
  264. request_irq(MVME162_IRQ_SCCB_STAT, scc_stat_int, IRQF_DISABLED,
  265. "SCC-B status", port);
  266. request_irq(MVME162_IRQ_SCCB_RX, scc_rx_int, IRQF_DISABLED,
  267. "SCC-B RX", port);
  268. request_irq(MVME162_IRQ_SCCB_SPCOND, scc_spcond_int, IRQF_DISABLED,
  269. "SCC-B special cond", port);
  270. {
  271. SCC_ACCESS_INIT(port); /* Either channel will do */
  272. /* disable interrupts for this channel */
  273. SCCwrite(INT_AND_DMA_REG, 0);
  274. }
  275. /* Ensure interrupts are enabled in the MC2 chip */
  276. *(volatile char *)0xfff4201d = 0x14;
  277. /* Initialise the tty driver structures and register */
  278. scc_init_portstructs();
  279. scc_init_drivers();
  280. return 0;
  281. }
  282. #endif
  283. #ifdef CONFIG_BVME6000_SCC
  284. static int bvme6000_scc_init(void)
  285. {
  286. struct scc_port *port;
  287. printk(KERN_INFO "SCC: BVME6000 Serial Driver\n");
  288. /* Init channel A */
  289. port = &scc_ports[0];
  290. port->channel = CHANNEL_A;
  291. port->ctrlp = (volatile unsigned char *)BVME_SCC_A_ADDR;
  292. port->datap = port->ctrlp + 4;
  293. port->port_a = &scc_ports[0];
  294. port->port_b = &scc_ports[1];
  295. request_irq(BVME_IRQ_SCCA_TX, scc_tx_int, IRQF_DISABLED,
  296. "SCC-A TX", port);
  297. request_irq(BVME_IRQ_SCCA_STAT, scc_stat_int, IRQF_DISABLED,
  298. "SCC-A status", port);
  299. request_irq(BVME_IRQ_SCCA_RX, scc_rx_int, IRQF_DISABLED,
  300. "SCC-A RX", port);
  301. request_irq(BVME_IRQ_SCCA_SPCOND, scc_spcond_int, IRQF_DISABLED,
  302. "SCC-A special cond", port);
  303. {
  304. SCC_ACCESS_INIT(port);
  305. /* disable interrupts for this channel */
  306. SCCwrite(INT_AND_DMA_REG, 0);
  307. /* Set the interrupt vector */
  308. SCCwrite(INT_VECTOR_REG, BVME_IRQ_SCC_BASE);
  309. /* Interrupt parameters: vector includes status, status low */
  310. SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT);
  311. SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB);
  312. }
  313. /* Init channel B */
  314. port = &scc_ports[1];
  315. port->channel = CHANNEL_B;
  316. port->ctrlp = (volatile unsigned char *)BVME_SCC_B_ADDR;
  317. port->datap = port->ctrlp + 4;
  318. port->port_a = &scc_ports[0];
  319. port->port_b = &scc_ports[1];
  320. request_irq(BVME_IRQ_SCCB_TX, scc_tx_int, IRQF_DISABLED,
  321. "SCC-B TX", port);
  322. request_irq(BVME_IRQ_SCCB_STAT, scc_stat_int, IRQF_DISABLED,
  323. "SCC-B status", port);
  324. request_irq(BVME_IRQ_SCCB_RX, scc_rx_int, IRQF_DISABLED,
  325. "SCC-B RX", port);
  326. request_irq(BVME_IRQ_SCCB_SPCOND, scc_spcond_int, IRQF_DISABLED,
  327. "SCC-B special cond", port);
  328. {
  329. SCC_ACCESS_INIT(port); /* Either channel will do */
  330. /* disable interrupts for this channel */
  331. SCCwrite(INT_AND_DMA_REG, 0);
  332. }
  333. /* Initialise the tty driver structures and register */
  334. scc_init_portstructs();
  335. scc_init_drivers();
  336. return 0;
  337. }
  338. #endif
  339. static int vme_scc_init(void)
  340. {
  341. int res = -ENODEV;
  342. #ifdef CONFIG_MVME147_SCC
  343. if (MACH_IS_MVME147)
  344. res = mvme147_scc_init();
  345. #endif
  346. #ifdef CONFIG_MVME162_SCC
  347. if (MACH_IS_MVME16x)
  348. res = mvme162_scc_init();
  349. #endif
  350. #ifdef CONFIG_BVME6000_SCC
  351. if (MACH_IS_BVME6000)
  352. res = bvme6000_scc_init();
  353. #endif
  354. return res;
  355. }
  356. module_init(vme_scc_init);
  357. /*---------------------------------------------------------------------------
  358. * Interrupt handlers
  359. *--------------------------------------------------------------------------*/
  360. static irqreturn_t scc_rx_int(int irq, void *data)
  361. {
  362. unsigned char ch;
  363. struct scc_port *port = data;
  364. struct tty_struct *tty = port->gs.tty;
  365. SCC_ACCESS_INIT(port);
  366. ch = SCCread_NB(RX_DATA_REG);
  367. if (!tty) {
  368. printk(KERN_WARNING "scc_rx_int with NULL tty!\n");
  369. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  370. return IRQ_HANDLED;
  371. }
  372. tty_insert_flip_char(tty, ch, 0);
  373. /* Check if another character is already ready; in that case, the
  374. * spcond_int() function must be used, because this character may have an
  375. * error condition that isn't signalled by the interrupt vector used!
  376. */
  377. if (SCCread(INT_PENDING_REG) &
  378. (port->channel == CHANNEL_A ? IPR_A_RX : IPR_B_RX)) {
  379. scc_spcond_int (irq, data);
  380. return IRQ_HANDLED;
  381. }
  382. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  383. tty_flip_buffer_push(tty);
  384. return IRQ_HANDLED;
  385. }
  386. static irqreturn_t scc_spcond_int(int irq, void *data)
  387. {
  388. struct scc_port *port = data;
  389. struct tty_struct *tty = port->gs.tty;
  390. unsigned char stat, ch, err;
  391. int int_pending_mask = port->channel == CHANNEL_A ?
  392. IPR_A_RX : IPR_B_RX;
  393. SCC_ACCESS_INIT(port);
  394. if (!tty) {
  395. printk(KERN_WARNING "scc_spcond_int with NULL tty!\n");
  396. SCCwrite(COMMAND_REG, CR_ERROR_RESET);
  397. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  398. return IRQ_HANDLED;
  399. }
  400. do {
  401. stat = SCCread(SPCOND_STATUS_REG);
  402. ch = SCCread_NB(RX_DATA_REG);
  403. if (stat & SCSR_RX_OVERRUN)
  404. err = TTY_OVERRUN;
  405. else if (stat & SCSR_PARITY_ERR)
  406. err = TTY_PARITY;
  407. else if (stat & SCSR_CRC_FRAME_ERR)
  408. err = TTY_FRAME;
  409. else
  410. err = 0;
  411. tty_insert_flip_char(tty, ch, err);
  412. /* ++TeSche: *All* errors have to be cleared manually,
  413. * else the condition persists for the next chars
  414. */
  415. if (err)
  416. SCCwrite(COMMAND_REG, CR_ERROR_RESET);
  417. } while(SCCread(INT_PENDING_REG) & int_pending_mask);
  418. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  419. tty_flip_buffer_push(tty);
  420. return IRQ_HANDLED;
  421. }
  422. static irqreturn_t scc_tx_int(int irq, void *data)
  423. {
  424. struct scc_port *port = data;
  425. SCC_ACCESS_INIT(port);
  426. if (!port->gs.tty) {
  427. printk(KERN_WARNING "scc_tx_int with NULL tty!\n");
  428. SCCmod (INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0);
  429. SCCwrite(COMMAND_REG, CR_TX_PENDING_RESET);
  430. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  431. return IRQ_HANDLED;
  432. }
  433. while ((SCCread_NB(STATUS_REG) & SR_TX_BUF_EMPTY)) {
  434. if (port->x_char) {
  435. SCCwrite(TX_DATA_REG, port->x_char);
  436. port->x_char = 0;
  437. }
  438. else if ((port->gs.xmit_cnt <= 0) || port->gs.tty->stopped ||
  439. port->gs.tty->hw_stopped)
  440. break;
  441. else {
  442. SCCwrite(TX_DATA_REG, port->gs.xmit_buf[port->gs.xmit_tail++]);
  443. port->gs.xmit_tail = port->gs.xmit_tail & (SERIAL_XMIT_SIZE-1);
  444. if (--port->gs.xmit_cnt <= 0)
  445. break;
  446. }
  447. }
  448. if ((port->gs.xmit_cnt <= 0) || port->gs.tty->stopped ||
  449. port->gs.tty->hw_stopped) {
  450. /* disable tx interrupts */
  451. SCCmod (INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0);
  452. SCCwrite(COMMAND_REG, CR_TX_PENDING_RESET); /* disable tx_int on next tx underrun? */
  453. port->gs.flags &= ~GS_TX_INTEN;
  454. }
  455. if (port->gs.tty && port->gs.xmit_cnt <= port->gs.wakeup_chars)
  456. tty_wakeup(port->gs.tty);
  457. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  458. return IRQ_HANDLED;
  459. }
  460. static irqreturn_t scc_stat_int(int irq, void *data)
  461. {
  462. struct scc_port *port = data;
  463. unsigned channel = port->channel;
  464. unsigned char last_sr, sr, changed;
  465. SCC_ACCESS_INIT(port);
  466. last_sr = scc_last_status_reg[channel];
  467. sr = scc_last_status_reg[channel] = SCCread_NB(STATUS_REG);
  468. changed = last_sr ^ sr;
  469. if (changed & SR_DCD) {
  470. port->c_dcd = !!(sr & SR_DCD);
  471. if (!(port->gs.flags & ASYNC_CHECK_CD))
  472. ; /* Don't report DCD changes */
  473. else if (port->c_dcd) {
  474. wake_up_interruptible(&port->gs.open_wait);
  475. }
  476. else {
  477. if (port->gs.tty)
  478. tty_hangup (port->gs.tty);
  479. }
  480. }
  481. SCCwrite(COMMAND_REG, CR_EXTSTAT_RESET);
  482. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  483. return IRQ_HANDLED;
  484. }
  485. /*---------------------------------------------------------------------------
  486. * generic_serial.c callback funtions
  487. *--------------------------------------------------------------------------*/
  488. static void scc_disable_tx_interrupts(void *ptr)
  489. {
  490. struct scc_port *port = ptr;
  491. unsigned long flags;
  492. SCC_ACCESS_INIT(port);
  493. local_irq_save(flags);
  494. SCCmod(INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0);
  495. port->gs.flags &= ~GS_TX_INTEN;
  496. local_irq_restore(flags);
  497. }
  498. static void scc_enable_tx_interrupts(void *ptr)
  499. {
  500. struct scc_port *port = ptr;
  501. unsigned long flags;
  502. SCC_ACCESS_INIT(port);
  503. local_irq_save(flags);
  504. SCCmod(INT_AND_DMA_REG, 0xff, IDR_TX_INT_ENAB);
  505. /* restart the transmitter */
  506. scc_tx_int (0, port);
  507. local_irq_restore(flags);
  508. }
  509. static void scc_disable_rx_interrupts(void *ptr)
  510. {
  511. struct scc_port *port = ptr;
  512. unsigned long flags;
  513. SCC_ACCESS_INIT(port);
  514. local_irq_save(flags);
  515. SCCmod(INT_AND_DMA_REG,
  516. ~(IDR_RX_INT_MASK|IDR_PARERR_AS_SPCOND|IDR_EXTSTAT_INT_ENAB), 0);
  517. local_irq_restore(flags);
  518. }
  519. static void scc_enable_rx_interrupts(void *ptr)
  520. {
  521. struct scc_port *port = ptr;
  522. unsigned long flags;
  523. SCC_ACCESS_INIT(port);
  524. local_irq_save(flags);
  525. SCCmod(INT_AND_DMA_REG, 0xff,
  526. IDR_EXTSTAT_INT_ENAB|IDR_PARERR_AS_SPCOND|IDR_RX_INT_ALL);
  527. local_irq_restore(flags);
  528. }
  529. static int scc_get_CD(void *ptr)
  530. {
  531. struct scc_port *port = ptr;
  532. unsigned channel = port->channel;
  533. return !!(scc_last_status_reg[channel] & SR_DCD);
  534. }
  535. static void scc_shutdown_port(void *ptr)
  536. {
  537. struct scc_port *port = ptr;
  538. port->gs.flags &= ~ GS_ACTIVE;
  539. if (port->gs.tty && port->gs.tty->termios->c_cflag & HUPCL) {
  540. scc_setsignals (port, 0, 0);
  541. }
  542. }
  543. static int scc_set_real_termios (void *ptr)
  544. {
  545. /* the SCC has char sizes 5,7,6,8 in that order! */
  546. static int chsize_map[4] = { 0, 2, 1, 3 };
  547. unsigned cflag, baud, chsize, channel, brgval = 0;
  548. unsigned long flags;
  549. struct scc_port *port = ptr;
  550. SCC_ACCESS_INIT(port);
  551. if (!port->gs.tty || !port->gs.tty->termios) return 0;
  552. channel = port->channel;
  553. if (channel == CHANNEL_A)
  554. return 0; /* Settings controlled by boot PROM */
  555. cflag = port->gs.tty->termios->c_cflag;
  556. baud = port->gs.baud;
  557. chsize = (cflag & CSIZE) >> 4;
  558. if (baud == 0) {
  559. /* speed == 0 -> drop DTR */
  560. local_irq_save(flags);
  561. SCCmod(TX_CTRL_REG, ~TCR_DTR, 0);
  562. local_irq_restore(flags);
  563. return 0;
  564. }
  565. else if ((MACH_IS_MVME16x && (baud < 50 || baud > 38400)) ||
  566. (MACH_IS_MVME147 && (baud < 50 || baud > 19200)) ||
  567. (MACH_IS_BVME6000 &&(baud < 50 || baud > 76800))) {
  568. printk(KERN_NOTICE "SCC: Bad speed requested, %d\n", baud);
  569. return 0;
  570. }
  571. if (cflag & CLOCAL)
  572. port->gs.flags &= ~ASYNC_CHECK_CD;
  573. else
  574. port->gs.flags |= ASYNC_CHECK_CD;
  575. #ifdef CONFIG_MVME147_SCC
  576. if (MACH_IS_MVME147)
  577. brgval = (M147_SCC_PCLK + baud/2) / (16 * 2 * baud) - 2;
  578. #endif
  579. #ifdef CONFIG_MVME162_SCC
  580. if (MACH_IS_MVME16x)
  581. brgval = (MVME_SCC_PCLK + baud/2) / (16 * 2 * baud) - 2;
  582. #endif
  583. #ifdef CONFIG_BVME6000_SCC
  584. if (MACH_IS_BVME6000)
  585. brgval = (BVME_SCC_RTxC + baud/2) / (16 * 2 * baud) - 2;
  586. #endif
  587. /* Now we have all parameters and can go to set them: */
  588. local_irq_save(flags);
  589. /* receiver's character size and auto-enables */
  590. SCCmod(RX_CTRL_REG, ~(RCR_CHSIZE_MASK|RCR_AUTO_ENAB_MODE),
  591. (chsize_map[chsize] << 6) |
  592. ((cflag & CRTSCTS) ? RCR_AUTO_ENAB_MODE : 0));
  593. /* parity and stop bits (both, Tx and Rx), clock mode never changes */
  594. SCCmod (AUX1_CTRL_REG,
  595. ~(A1CR_PARITY_MASK | A1CR_MODE_MASK),
  596. ((cflag & PARENB
  597. ? (cflag & PARODD ? A1CR_PARITY_ODD : A1CR_PARITY_EVEN)
  598. : A1CR_PARITY_NONE)
  599. | (cflag & CSTOPB ? A1CR_MODE_ASYNC_2 : A1CR_MODE_ASYNC_1)));
  600. /* sender's character size, set DTR for valid baud rate */
  601. SCCmod(TX_CTRL_REG, ~TCR_CHSIZE_MASK, chsize_map[chsize] << 5 | TCR_DTR);
  602. /* clock sources never change */
  603. /* disable BRG before changing the value */
  604. SCCmod(DPLL_CTRL_REG, ~DCR_BRG_ENAB, 0);
  605. /* BRG value */
  606. SCCwrite(TIMER_LOW_REG, brgval & 0xff);
  607. SCCwrite(TIMER_HIGH_REG, (brgval >> 8) & 0xff);
  608. /* BRG enable, and clock source never changes */
  609. SCCmod(DPLL_CTRL_REG, 0xff, DCR_BRG_ENAB);
  610. local_irq_restore(flags);
  611. return 0;
  612. }
  613. static int scc_chars_in_buffer (void *ptr)
  614. {
  615. struct scc_port *port = ptr;
  616. SCC_ACCESS_INIT(port);
  617. return (SCCread (SPCOND_STATUS_REG) & SCSR_ALL_SENT) ? 0 : 1;
  618. }
  619. /* Comment taken from sx.c (2.4.0):
  620. I haven't the foggiest why the decrement use count has to happen
  621. here. The whole linux serial drivers stuff needs to be redesigned.
  622. My guess is that this is a hack to minimize the impact of a bug
  623. elsewhere. Thinking about it some more. (try it sometime) Try
  624. running minicom on a serial port that is driven by a modularized
  625. driver. Have the modem hangup. Then remove the driver module. Then
  626. exit minicom. I expect an "oops". -- REW */
  627. static void scc_hungup(void *ptr)
  628. {
  629. scc_disable_tx_interrupts(ptr);
  630. scc_disable_rx_interrupts(ptr);
  631. }
  632. static void scc_close(void *ptr)
  633. {
  634. scc_disable_tx_interrupts(ptr);
  635. scc_disable_rx_interrupts(ptr);
  636. }
  637. /*---------------------------------------------------------------------------
  638. * Internal support functions
  639. *--------------------------------------------------------------------------*/
  640. static void scc_setsignals(struct scc_port *port, int dtr, int rts)
  641. {
  642. unsigned long flags;
  643. unsigned char t;
  644. SCC_ACCESS_INIT(port);
  645. local_irq_save(flags);
  646. t = SCCread(TX_CTRL_REG);
  647. if (dtr >= 0) t = dtr? (t | TCR_DTR): (t & ~TCR_DTR);
  648. if (rts >= 0) t = rts? (t | TCR_RTS): (t & ~TCR_RTS);
  649. SCCwrite(TX_CTRL_REG, t);
  650. local_irq_restore(flags);
  651. }
  652. static void scc_send_xchar(struct tty_struct *tty, char ch)
  653. {
  654. struct scc_port *port = (struct scc_port *)tty->driver_data;
  655. port->x_char = ch;
  656. if (ch)
  657. scc_enable_tx_interrupts(port);
  658. }
  659. /*---------------------------------------------------------------------------
  660. * Driver entrypoints referenced from above
  661. *--------------------------------------------------------------------------*/
  662. static int scc_open (struct tty_struct * tty, struct file * filp)
  663. {
  664. int line = tty->index;
  665. int retval;
  666. struct scc_port *port = &scc_ports[line];
  667. int i, channel = port->channel;
  668. unsigned long flags;
  669. SCC_ACCESS_INIT(port);
  670. #if defined(CONFIG_MVME162_SCC) || defined(CONFIG_MVME147_SCC)
  671. static const struct {
  672. unsigned reg, val;
  673. } mvme_init_tab[] = {
  674. /* Values for MVME162 and MVME147 */
  675. /* no parity, 1 stop bit, async, 1:16 */
  676. { AUX1_CTRL_REG, A1CR_PARITY_NONE|A1CR_MODE_ASYNC_1|A1CR_CLKMODE_x16 },
  677. /* parity error is special cond, ints disabled, no DMA */
  678. { INT_AND_DMA_REG, IDR_PARERR_AS_SPCOND | IDR_RX_INT_DISAB },
  679. /* Rx 8 bits/char, no auto enable, Rx off */
  680. { RX_CTRL_REG, RCR_CHSIZE_8 },
  681. /* DTR off, Tx 8 bits/char, RTS off, Tx off */
  682. { TX_CTRL_REG, TCR_CHSIZE_8 },
  683. /* special features off */
  684. { AUX2_CTRL_REG, 0 },
  685. { CLK_CTRL_REG, CCR_RXCLK_BRG | CCR_TXCLK_BRG },
  686. { DPLL_CTRL_REG, DCR_BRG_ENAB | DCR_BRG_USE_PCLK },
  687. /* Start Rx */
  688. { RX_CTRL_REG, RCR_RX_ENAB | RCR_CHSIZE_8 },
  689. /* Start Tx */
  690. { TX_CTRL_REG, TCR_TX_ENAB | TCR_RTS | TCR_DTR | TCR_CHSIZE_8 },
  691. /* Ext/Stat ints: DCD only */
  692. { INT_CTRL_REG, ICR_ENAB_DCD_INT },
  693. /* Reset Ext/Stat ints */
  694. { COMMAND_REG, CR_EXTSTAT_RESET },
  695. /* ...again */
  696. { COMMAND_REG, CR_EXTSTAT_RESET },
  697. };
  698. #endif
  699. #if defined(CONFIG_BVME6000_SCC)
  700. static const struct {
  701. unsigned reg, val;
  702. } bvme_init_tab[] = {
  703. /* Values for BVME6000 */
  704. /* no parity, 1 stop bit, async, 1:16 */
  705. { AUX1_CTRL_REG, A1CR_PARITY_NONE|A1CR_MODE_ASYNC_1|A1CR_CLKMODE_x16 },
  706. /* parity error is special cond, ints disabled, no DMA */
  707. { INT_AND_DMA_REG, IDR_PARERR_AS_SPCOND | IDR_RX_INT_DISAB },
  708. /* Rx 8 bits/char, no auto enable, Rx off */
  709. { RX_CTRL_REG, RCR_CHSIZE_8 },
  710. /* DTR off, Tx 8 bits/char, RTS off, Tx off */
  711. { TX_CTRL_REG, TCR_CHSIZE_8 },
  712. /* special features off */
  713. { AUX2_CTRL_REG, 0 },
  714. { CLK_CTRL_REG, CCR_RTxC_XTAL | CCR_RXCLK_BRG | CCR_TXCLK_BRG },
  715. { DPLL_CTRL_REG, DCR_BRG_ENAB },
  716. /* Start Rx */
  717. { RX_CTRL_REG, RCR_RX_ENAB | RCR_CHSIZE_8 },
  718. /* Start Tx */
  719. { TX_CTRL_REG, TCR_TX_ENAB | TCR_RTS | TCR_DTR | TCR_CHSIZE_8 },
  720. /* Ext/Stat ints: DCD only */
  721. { INT_CTRL_REG, ICR_ENAB_DCD_INT },
  722. /* Reset Ext/Stat ints */
  723. { COMMAND_REG, CR_EXTSTAT_RESET },
  724. /* ...again */
  725. { COMMAND_REG, CR_EXTSTAT_RESET },
  726. };
  727. #endif
  728. if (!(port->gs.flags & ASYNC_INITIALIZED)) {
  729. local_irq_save(flags);
  730. #if defined(CONFIG_MVME147_SCC) || defined(CONFIG_MVME162_SCC)
  731. if (MACH_IS_MVME147 || MACH_IS_MVME16x) {
  732. for (i = 0; i < ARRAY_SIZE(mvme_init_tab); ++i)
  733. SCCwrite(mvme_init_tab[i].reg, mvme_init_tab[i].val);
  734. }
  735. #endif
  736. #if defined(CONFIG_BVME6000_SCC)
  737. if (MACH_IS_BVME6000) {
  738. for (i = 0; i < ARRAY_SIZE(bvme_init_tab); ++i)
  739. SCCwrite(bvme_init_tab[i].reg, bvme_init_tab[i].val);
  740. }
  741. #endif
  742. /* remember status register for detection of DCD and CTS changes */
  743. scc_last_status_reg[channel] = SCCread(STATUS_REG);
  744. port->c_dcd = 0; /* Prevent initial 1->0 interrupt */
  745. scc_setsignals (port, 1,1);
  746. local_irq_restore(flags);
  747. }
  748. tty->driver_data = port;
  749. port->gs.tty = tty;
  750. port->gs.count++;
  751. retval = gs_init_port(&port->gs);
  752. if (retval) {
  753. port->gs.count--;
  754. return retval;
  755. }
  756. port->gs.flags |= GS_ACTIVE;
  757. retval = gs_block_til_ready(port, filp);
  758. if (retval) {
  759. port->gs.count--;
  760. return retval;
  761. }
  762. port->c_dcd = scc_get_CD (port);
  763. scc_enable_rx_interrupts(port);
  764. return 0;
  765. }
  766. static void scc_throttle (struct tty_struct * tty)
  767. {
  768. struct scc_port *port = (struct scc_port *)tty->driver_data;
  769. unsigned long flags;
  770. SCC_ACCESS_INIT(port);
  771. if (tty->termios->c_cflag & CRTSCTS) {
  772. local_irq_save(flags);
  773. SCCmod(TX_CTRL_REG, ~TCR_RTS, 0);
  774. local_irq_restore(flags);
  775. }
  776. if (I_IXOFF(tty))
  777. scc_send_xchar(tty, STOP_CHAR(tty));
  778. }
  779. static void scc_unthrottle (struct tty_struct * tty)
  780. {
  781. struct scc_port *port = (struct scc_port *)tty->driver_data;
  782. unsigned long flags;
  783. SCC_ACCESS_INIT(port);
  784. if (tty->termios->c_cflag & CRTSCTS) {
  785. local_irq_save(flags);
  786. SCCmod(TX_CTRL_REG, 0xff, TCR_RTS);
  787. local_irq_restore(flags);
  788. }
  789. if (I_IXOFF(tty))
  790. scc_send_xchar(tty, START_CHAR(tty));
  791. }
  792. static int scc_ioctl(struct tty_struct *tty, struct file *file,
  793. unsigned int cmd, unsigned long arg)
  794. {
  795. return -ENOIOCTLCMD;
  796. }
  797. static void scc_break_ctl(struct tty_struct *tty, int break_state)
  798. {
  799. struct scc_port *port = (struct scc_port *)tty->driver_data;
  800. unsigned long flags;
  801. SCC_ACCESS_INIT(port);
  802. local_irq_save(flags);
  803. SCCmod(TX_CTRL_REG, ~TCR_SEND_BREAK,
  804. break_state ? TCR_SEND_BREAK : 0);
  805. local_irq_restore(flags);
  806. }
  807. /*---------------------------------------------------------------------------
  808. * Serial console stuff...
  809. *--------------------------------------------------------------------------*/
  810. #define scc_delay() do { __asm__ __volatile__ (" nop; nop"); } while (0)
  811. static void scc_ch_write (char ch)
  812. {
  813. volatile char *p = NULL;
  814. #ifdef CONFIG_MVME147_SCC
  815. if (MACH_IS_MVME147)
  816. p = (volatile char *)M147_SCC_A_ADDR;
  817. #endif
  818. #ifdef CONFIG_MVME162_SCC
  819. if (MACH_IS_MVME16x)
  820. p = (volatile char *)MVME_SCC_A_ADDR;
  821. #endif
  822. #ifdef CONFIG_BVME6000_SCC
  823. if (MACH_IS_BVME6000)
  824. p = (volatile char *)BVME_SCC_A_ADDR;
  825. #endif
  826. do {
  827. scc_delay();
  828. }
  829. while (!(*p & 4));
  830. scc_delay();
  831. *p = 8;
  832. scc_delay();
  833. *p = ch;
  834. }
  835. /* The console must be locked when we get here. */
  836. static void scc_console_write (struct console *co, const char *str, unsigned count)
  837. {
  838. unsigned long flags;
  839. local_irq_save(flags);
  840. while (count--)
  841. {
  842. if (*str == '\n')
  843. scc_ch_write ('\r');
  844. scc_ch_write (*str++);
  845. }
  846. local_irq_restore(flags);
  847. }
  848. static struct tty_driver *scc_console_device(struct console *c, int *index)
  849. {
  850. *index = c->index;
  851. return scc_driver;
  852. }
  853. static int __init scc_console_setup(struct console *co, char *options)
  854. {
  855. return 0;
  856. }
  857. static struct console sercons = {
  858. .name = "ttyS",
  859. .write = scc_console_write,
  860. .device = scc_console_device,
  861. .setup = scc_console_setup,
  862. .flags = CON_PRINTBUFFER,
  863. .index = -1,
  864. };
  865. static int __init vme_scc_console_init(void)
  866. {
  867. if (vme_brdtype == VME_TYPE_MVME147 ||
  868. vme_brdtype == VME_TYPE_MVME162 ||
  869. vme_brdtype == VME_TYPE_MVME172 ||
  870. vme_brdtype == VME_TYPE_BVME4000 ||
  871. vme_brdtype == VME_TYPE_BVME6000)
  872. register_console(&sercons);
  873. return 0;
  874. }
  875. console_initcall(vme_scc_console_init);