sxboards.h 8.5 KB

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  1. /************************************************************************/
  2. /* */
  3. /* Title : SX/SI/XIO Board Hardware Definitions */
  4. /* */
  5. /* Author : N.P.Vassallo */
  6. /* */
  7. /* Creation : 16th March 1998 */
  8. /* */
  9. /* Version : 3.0.0 */
  10. /* */
  11. /* Copyright : (c) Specialix International Ltd. 1998 */
  12. /* */
  13. /* Description : Prototypes, structures and definitions */
  14. /* describing the SX/SI/XIO board hardware */
  15. /* */
  16. /************************************************************************/
  17. /* History...
  18. 3.0.0 16/03/98 NPV Creation.
  19. */
  20. #ifndef _sxboards_h /* If SXBOARDS.H not already defined */
  21. #define _sxboards_h 1
  22. /*****************************************************************************
  23. ******************************* ******************************
  24. ******************************* Board Types ******************************
  25. ******************************* ******************************
  26. *****************************************************************************/
  27. /* BUS types... */
  28. #define BUS_ISA 0
  29. #define BUS_MCA 1
  30. #define BUS_EISA 2
  31. #define BUS_PCI 3
  32. /* Board phases... */
  33. #define SI1_Z280 1
  34. #define SI2_Z280 2
  35. #define SI3_T225 3
  36. /* Board types... */
  37. #define CARD_TYPE(bus,phase) (bus<<4|phase)
  38. #define CARD_BUS(type) ((type>>4)&0xF)
  39. #define CARD_PHASE(type) (type&0xF)
  40. #define TYPE_SI1_ISA CARD_TYPE(BUS_ISA,SI1_Z280)
  41. #define TYPE_SI2_ISA CARD_TYPE(BUS_ISA,SI2_Z280)
  42. #define TYPE_SI2_EISA CARD_TYPE(BUS_EISA,SI2_Z280)
  43. #define TYPE_SI2_PCI CARD_TYPE(BUS_PCI,SI2_Z280)
  44. #define TYPE_SX_ISA CARD_TYPE(BUS_ISA,SI3_T225)
  45. #define TYPE_SX_PCI CARD_TYPE(BUS_PCI,SI3_T225)
  46. /*****************************************************************************
  47. ****************************** ******************************
  48. ****************************** Phase 1 Z280 ******************************
  49. ****************************** ******************************
  50. *****************************************************************************/
  51. /* ISA board details... */
  52. #define SI1_ISA_WINDOW_LEN 0x10000 /* 64 Kbyte shared memory window */
  53. //#define SI1_ISA_MEMORY_LEN 0x8000 /* Usable memory - unused define*/
  54. //#define SI1_ISA_ADDR_LOW 0x0A0000 /* Lowest address = 640 Kbyte */
  55. //#define SI1_ISA_ADDR_HIGH 0xFF8000 /* Highest address = 16Mbyte - 32Kbyte */
  56. //#define SI2_ISA_ADDR_STEP SI2_ISA_WINDOW_LEN/* ISA board address step */
  57. //#define SI2_ISA_IRQ_MASK 0x9800 /* IRQs 15,12,11 */
  58. /* ISA board, register definitions... */
  59. //#define SI2_ISA_ID_BASE 0x7FF8 /* READ: Board ID string */
  60. #define SI1_ISA_RESET 0x8000 /* WRITE: Host Reset */
  61. #define SI1_ISA_RESET_CLEAR 0xc000 /* WRITE: Host Reset clear*/
  62. #define SI1_ISA_WAIT 0x9000 /* WRITE: Host wait */
  63. #define SI1_ISA_WAIT_CLEAR 0xd000 /* WRITE: Host wait clear */
  64. #define SI1_ISA_INTCL 0xa000 /* WRITE: Host Reset */
  65. #define SI1_ISA_INTCL_CLEAR 0xe000 /* WRITE: Host Reset */
  66. /*****************************************************************************
  67. ****************************** ******************************
  68. ****************************** Phase 2 Z280 ******************************
  69. ****************************** ******************************
  70. *****************************************************************************/
  71. /* ISA board details... */
  72. #define SI2_ISA_WINDOW_LEN 0x8000 /* 32 Kbyte shared memory window */
  73. #define SI2_ISA_MEMORY_LEN 0x7FF8 /* Usable memory */
  74. #define SI2_ISA_ADDR_LOW 0x0A0000 /* Lowest address = 640 Kbyte */
  75. #define SI2_ISA_ADDR_HIGH 0xFF8000 /* Highest address = 16Mbyte - 32Kbyte */
  76. #define SI2_ISA_ADDR_STEP SI2_ISA_WINDOW_LEN/* ISA board address step */
  77. #define SI2_ISA_IRQ_MASK 0x9800 /* IRQs 15,12,11 */
  78. /* ISA board, register definitions... */
  79. #define SI2_ISA_ID_BASE 0x7FF8 /* READ: Board ID string */
  80. #define SI2_ISA_RESET SI2_ISA_ID_BASE /* WRITE: Host Reset */
  81. #define SI2_ISA_IRQ11 (SI2_ISA_ID_BASE+1) /* WRITE: Set IRQ11 */
  82. #define SI2_ISA_IRQ12 (SI2_ISA_ID_BASE+2) /* WRITE: Set IRQ12 */
  83. #define SI2_ISA_IRQ15 (SI2_ISA_ID_BASE+3) /* WRITE: Set IRQ15 */
  84. #define SI2_ISA_IRQSET (SI2_ISA_ID_BASE+4) /* WRITE: Set Host Interrupt */
  85. #define SI2_ISA_INTCLEAR (SI2_ISA_ID_BASE+5) /* WRITE: Enable Host Interrupt */
  86. #define SI2_ISA_IRQ11_SET 0x10
  87. #define SI2_ISA_IRQ11_CLEAR 0x00
  88. #define SI2_ISA_IRQ12_SET 0x10
  89. #define SI2_ISA_IRQ12_CLEAR 0x00
  90. #define SI2_ISA_IRQ15_SET 0x10
  91. #define SI2_ISA_IRQ15_CLEAR 0x00
  92. #define SI2_ISA_INTCLEAR_SET 0x10
  93. #define SI2_ISA_INTCLEAR_CLEAR 0x00
  94. #define SI2_ISA_IRQSET_CLEAR 0x10
  95. #define SI2_ISA_IRQSET_SET 0x00
  96. #define SI2_ISA_RESET_SET 0x00
  97. #define SI2_ISA_RESET_CLEAR 0x10
  98. /* PCI board details... */
  99. #define SI2_PCI_WINDOW_LEN 0x100000 /* 1 Mbyte memory window */
  100. /* PCI board register definitions... */
  101. #define SI2_PCI_SET_IRQ 0x40001 /* Set Host Interrupt */
  102. #define SI2_PCI_RESET 0xC0001 /* Host Reset */
  103. /*****************************************************************************
  104. ****************************** ******************************
  105. ****************************** Phase 3 T225 ******************************
  106. ****************************** ******************************
  107. *****************************************************************************/
  108. /* General board details... */
  109. #define SX_WINDOW_LEN 64*1024 /* 64 Kbyte memory window */
  110. /* ISA board details... */
  111. #define SX_ISA_ADDR_LOW 0x0A0000 /* Lowest address = 640 Kbyte */
  112. #define SX_ISA_ADDR_HIGH 0xFF8000 /* Highest address = 16Mbyte - 32Kbyte */
  113. #define SX_ISA_ADDR_STEP SX_WINDOW_LEN /* ISA board address step */
  114. #define SX_ISA_IRQ_MASK 0x9E00 /* IRQs 15,12,11,10,9 */
  115. /* Hardware register definitions... */
  116. #define SX_EVENT_STATUS 0x7800 /* READ: T225 Event Status */
  117. #define SX_EVENT_STROBE 0x7800 /* WRITE: T225 Event Strobe */
  118. #define SX_EVENT_ENABLE 0x7880 /* WRITE: T225 Event Enable */
  119. #define SX_VPD_ROM 0x7C00 /* READ: Vital Product Data ROM */
  120. #define SX_CONFIG 0x7C00 /* WRITE: Host Configuration Register */
  121. #define SX_IRQ_STATUS 0x7C80 /* READ: Host Interrupt Status */
  122. #define SX_SET_IRQ 0x7C80 /* WRITE: Set Host Interrupt */
  123. #define SX_RESET_STATUS 0x7D00 /* READ: Host Reset Status */
  124. #define SX_RESET 0x7D00 /* WRITE: Host Reset */
  125. #define SX_RESET_IRQ 0x7D80 /* WRITE: Reset Host Interrupt */
  126. /* SX_VPD_ROM definitions... */
  127. #define SX_VPD_SLX_ID1 0x00
  128. #define SX_VPD_SLX_ID2 0x01
  129. #define SX_VPD_HW_REV 0x02
  130. #define SX_VPD_HW_ASSEM 0x03
  131. #define SX_VPD_UNIQUEID4 0x04
  132. #define SX_VPD_UNIQUEID3 0x05
  133. #define SX_VPD_UNIQUEID2 0x06
  134. #define SX_VPD_UNIQUEID1 0x07
  135. #define SX_VPD_MANU_YEAR 0x08
  136. #define SX_VPD_MANU_WEEK 0x09
  137. #define SX_VPD_IDENT 0x10
  138. #define SX_VPD_IDENT_STRING "JET HOST BY KEV#"
  139. /* SX unique identifiers... */
  140. #define SX_UNIQUEID_MASK 0xF0
  141. #define SX_ISA_UNIQUEID1 0x20
  142. #define SX_PCI_UNIQUEID1 0x50
  143. /* SX_CONFIG definitions... */
  144. #define SX_CONF_BUSEN 0x02 /* Enable T225 memory and I/O */
  145. #define SX_CONF_HOSTIRQ 0x04 /* Enable board to host interrupt */
  146. /* SX bootstrap... */
  147. #define SX_BOOTSTRAP "\x28\x20\x21\x02\x60\x0a"
  148. #define SX_BOOTSTRAP_SIZE 6
  149. #define SX_BOOTSTRAP_ADDR (0x8000-SX_BOOTSTRAP_SIZE)
  150. /*****************************************************************************
  151. ********************************** **********************************
  152. ********************************** EISA **********************************
  153. ********************************** **********************************
  154. *****************************************************************************/
  155. #define SI2_EISA_OFF 0x42
  156. #define SI2_EISA_VAL 0x01
  157. #define SI2_EISA_WINDOW_LEN 0x10000
  158. /*****************************************************************************
  159. *********************************** **********************************
  160. *********************************** PCI **********************************
  161. *********************************** **********************************
  162. *****************************************************************************/
  163. /* General definitions... */
  164. #define SPX_VENDOR_ID 0x11CB /* Assigned by the PCI SIG */
  165. #define SPX_DEVICE_ID 0x4000 /* SI/XIO boards */
  166. #define SPX_PLXDEVICE_ID 0x2000 /* SX boards */
  167. #define SPX_SUB_VENDOR_ID SPX_VENDOR_ID /* Same as vendor id */
  168. #define SI2_SUB_SYS_ID 0x400 /* Phase 2 (Z280) board */
  169. #define SX_SUB_SYS_ID 0x200 /* Phase 3 (t225) board */
  170. #endif /*_sxboards_h */
  171. /* End of SXBOARDS.H */