pc8736x_gpio.c 8.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347
  1. /* linux/drivers/char/pc8736x_gpio.c
  2. National Semiconductor PC8736x GPIO driver. Allows a user space
  3. process to play with the GPIO pins.
  4. Copyright (c) 2005,2006 Jim Cromie <jim.cromie@gmail.com>
  5. adapted from linux/drivers/char/scx200_gpio.c
  6. Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>,
  7. */
  8. #include <linux/fs.h>
  9. #include <linux/module.h>
  10. #include <linux/errno.h>
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/cdev.h>
  14. #include <linux/io.h>
  15. #include <linux/ioport.h>
  16. #include <linux/mutex.h>
  17. #include <linux/nsc_gpio.h>
  18. #include <linux/platform_device.h>
  19. #include <asm/uaccess.h>
  20. #define DEVNAME "pc8736x_gpio"
  21. MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>");
  22. MODULE_DESCRIPTION("NatSemi/Winbond PC-8736x GPIO Pin Driver");
  23. MODULE_LICENSE("GPL");
  24. static int major; /* default to dynamic major */
  25. module_param(major, int, 0);
  26. MODULE_PARM_DESC(major, "Major device number");
  27. static DEFINE_MUTEX(pc8736x_gpio_config_lock);
  28. static unsigned pc8736x_gpio_base;
  29. static u8 pc8736x_gpio_shadow[4];
  30. #define SIO_BASE1 0x2E /* 1st command-reg to check */
  31. #define SIO_BASE2 0x4E /* alt command-reg to check */
  32. #define SIO_SID 0x20 /* SuperI/O ID Register */
  33. #define SIO_SID_VALUE 0xe9 /* Expected value in SuperI/O ID Register */
  34. #define SIO_CF1 0x21 /* chip config, bit0 is chip enable */
  35. #define PC8736X_GPIO_RANGE 16 /* ioaddr range */
  36. #define PC8736X_GPIO_CT 32 /* minors matching 4 8 bit ports */
  37. #define SIO_UNIT_SEL 0x7 /* unit select reg */
  38. #define SIO_UNIT_ACT 0x30 /* unit enable */
  39. #define SIO_GPIO_UNIT 0x7 /* unit number of GPIO */
  40. #define SIO_VLM_UNIT 0x0D
  41. #define SIO_TMS_UNIT 0x0E
  42. /* config-space addrs to read/write each unit's runtime addr */
  43. #define SIO_BASE_HADDR 0x60
  44. #define SIO_BASE_LADDR 0x61
  45. /* GPIO config-space pin-control addresses */
  46. #define SIO_GPIO_PIN_SELECT 0xF0
  47. #define SIO_GPIO_PIN_CONFIG 0xF1
  48. #define SIO_GPIO_PIN_EVENT 0xF2
  49. static unsigned char superio_cmd = 0;
  50. static unsigned char selected_device = 0xFF; /* bogus start val */
  51. /* GPIO port runtime access, functionality */
  52. static int port_offset[] = { 0, 4, 8, 10 }; /* non-uniform offsets ! */
  53. /* static int event_capable[] = { 1, 1, 0, 0 }; ports 2,3 are hobbled */
  54. #define PORT_OUT 0
  55. #define PORT_IN 1
  56. #define PORT_EVT_EN 2
  57. #define PORT_EVT_STST 3
  58. static struct platform_device *pdev; /* use in dev_*() */
  59. static inline void superio_outb(int addr, int val)
  60. {
  61. outb_p(addr, superio_cmd);
  62. outb_p(val, superio_cmd + 1);
  63. }
  64. static inline int superio_inb(int addr)
  65. {
  66. outb_p(addr, superio_cmd);
  67. return inb_p(superio_cmd + 1);
  68. }
  69. static int pc8736x_superio_present(void)
  70. {
  71. /* try the 2 possible values, read a hardware reg to verify */
  72. superio_cmd = SIO_BASE1;
  73. if (superio_inb(SIO_SID) == SIO_SID_VALUE)
  74. return superio_cmd;
  75. superio_cmd = SIO_BASE2;
  76. if (superio_inb(SIO_SID) == SIO_SID_VALUE)
  77. return superio_cmd;
  78. return 0;
  79. }
  80. static void device_select(unsigned devldn)
  81. {
  82. superio_outb(SIO_UNIT_SEL, devldn);
  83. selected_device = devldn;
  84. }
  85. static void select_pin(unsigned iminor)
  86. {
  87. /* select GPIO port/pin from device minor number */
  88. device_select(SIO_GPIO_UNIT);
  89. superio_outb(SIO_GPIO_PIN_SELECT,
  90. ((iminor << 1) & 0xF0) | (iminor & 0x7));
  91. }
  92. static inline u32 pc8736x_gpio_configure_fn(unsigned index, u32 mask, u32 bits,
  93. u32 func_slct)
  94. {
  95. u32 config, new_config;
  96. mutex_lock(&pc8736x_gpio_config_lock);
  97. device_select(SIO_GPIO_UNIT);
  98. select_pin(index);
  99. /* read current config value */
  100. config = superio_inb(func_slct);
  101. /* set new config */
  102. new_config = (config & mask) | bits;
  103. superio_outb(func_slct, new_config);
  104. mutex_unlock(&pc8736x_gpio_config_lock);
  105. return config;
  106. }
  107. static u32 pc8736x_gpio_configure(unsigned index, u32 mask, u32 bits)
  108. {
  109. return pc8736x_gpio_configure_fn(index, mask, bits,
  110. SIO_GPIO_PIN_CONFIG);
  111. }
  112. static int pc8736x_gpio_get(unsigned minor)
  113. {
  114. int port, bit, val;
  115. port = minor >> 3;
  116. bit = minor & 7;
  117. val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN);
  118. val >>= bit;
  119. val &= 1;
  120. dev_dbg(&pdev->dev, "_gpio_get(%d from %x bit %d) == val %d\n",
  121. minor, pc8736x_gpio_base + port_offset[port] + PORT_IN, bit,
  122. val);
  123. return val;
  124. }
  125. static void pc8736x_gpio_set(unsigned minor, int val)
  126. {
  127. int port, bit, curval;
  128. minor &= 0x1f;
  129. port = minor >> 3;
  130. bit = minor & 7;
  131. curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT);
  132. dev_dbg(&pdev->dev, "addr:%x cur:%x bit-pos:%d cur-bit:%x + new:%d -> bit-new:%d\n",
  133. pc8736x_gpio_base + port_offset[port] + PORT_OUT,
  134. curval, bit, (curval & ~(1 << bit)), val, (val << bit));
  135. val = (curval & ~(1 << bit)) | (val << bit);
  136. dev_dbg(&pdev->dev, "gpio_set(minor:%d port:%d bit:%d)"
  137. " %2x -> %2x\n", minor, port, bit, curval, val);
  138. outb_p(val, pc8736x_gpio_base + port_offset[port] + PORT_OUT);
  139. curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT);
  140. val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN);
  141. dev_dbg(&pdev->dev, "wrote %x, read: %x\n", curval, val);
  142. pc8736x_gpio_shadow[port] = val;
  143. }
  144. static int pc8736x_gpio_current(unsigned minor)
  145. {
  146. int port, bit;
  147. minor &= 0x1f;
  148. port = minor >> 3;
  149. bit = minor & 7;
  150. return ((pc8736x_gpio_shadow[port] >> bit) & 0x01);
  151. }
  152. static void pc8736x_gpio_change(unsigned index)
  153. {
  154. pc8736x_gpio_set(index, !pc8736x_gpio_current(index));
  155. }
  156. static struct nsc_gpio_ops pc8736x_gpio_ops = {
  157. .owner = THIS_MODULE,
  158. .gpio_config = pc8736x_gpio_configure,
  159. .gpio_dump = nsc_gpio_dump,
  160. .gpio_get = pc8736x_gpio_get,
  161. .gpio_set = pc8736x_gpio_set,
  162. .gpio_change = pc8736x_gpio_change,
  163. .gpio_current = pc8736x_gpio_current
  164. };
  165. static int pc8736x_gpio_open(struct inode *inode, struct file *file)
  166. {
  167. unsigned m = iminor(inode);
  168. file->private_data = &pc8736x_gpio_ops;
  169. dev_dbg(&pdev->dev, "open %d\n", m);
  170. if (m >= PC8736X_GPIO_CT)
  171. return -EINVAL;
  172. return nonseekable_open(inode, file);
  173. }
  174. static const struct file_operations pc8736x_gpio_fileops = {
  175. .owner = THIS_MODULE,
  176. .open = pc8736x_gpio_open,
  177. .write = nsc_gpio_write,
  178. .read = nsc_gpio_read,
  179. };
  180. static void __init pc8736x_init_shadow(void)
  181. {
  182. int port;
  183. /* read the current values driven on the GPIO signals */
  184. for (port = 0; port < 4; ++port)
  185. pc8736x_gpio_shadow[port]
  186. = inb_p(pc8736x_gpio_base + port_offset[port]
  187. + PORT_OUT);
  188. }
  189. static struct cdev pc8736x_gpio_cdev;
  190. static int __init pc8736x_gpio_init(void)
  191. {
  192. int rc;
  193. dev_t devid;
  194. pdev = platform_device_alloc(DEVNAME, 0);
  195. if (!pdev)
  196. return -ENOMEM;
  197. rc = platform_device_add(pdev);
  198. if (rc) {
  199. rc = -ENODEV;
  200. goto undo_platform_dev_alloc;
  201. }
  202. dev_info(&pdev->dev, "NatSemi pc8736x GPIO Driver Initializing\n");
  203. if (!pc8736x_superio_present()) {
  204. rc = -ENODEV;
  205. dev_err(&pdev->dev, "no device found\n");
  206. goto undo_platform_dev_add;
  207. }
  208. pc8736x_gpio_ops.dev = &pdev->dev;
  209. /* Verify that chip and it's GPIO unit are both enabled.
  210. My BIOS does this, so I take minimum action here
  211. */
  212. rc = superio_inb(SIO_CF1);
  213. if (!(rc & 0x01)) {
  214. rc = -ENODEV;
  215. dev_err(&pdev->dev, "device not enabled\n");
  216. goto undo_platform_dev_add;
  217. }
  218. device_select(SIO_GPIO_UNIT);
  219. if (!superio_inb(SIO_UNIT_ACT)) {
  220. rc = -ENODEV;
  221. dev_err(&pdev->dev, "GPIO unit not enabled\n");
  222. goto undo_platform_dev_add;
  223. }
  224. /* read the GPIO unit base addr that chip responds to */
  225. pc8736x_gpio_base = (superio_inb(SIO_BASE_HADDR) << 8
  226. | superio_inb(SIO_BASE_LADDR));
  227. if (!request_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE, DEVNAME)) {
  228. rc = -ENODEV;
  229. dev_err(&pdev->dev, "GPIO ioport %x busy\n",
  230. pc8736x_gpio_base);
  231. goto undo_platform_dev_add;
  232. }
  233. dev_info(&pdev->dev, "GPIO ioport %x reserved\n", pc8736x_gpio_base);
  234. if (major) {
  235. devid = MKDEV(major, 0);
  236. rc = register_chrdev_region(devid, PC8736X_GPIO_CT, DEVNAME);
  237. } else {
  238. rc = alloc_chrdev_region(&devid, 0, PC8736X_GPIO_CT, DEVNAME);
  239. major = MAJOR(devid);
  240. }
  241. if (rc < 0) {
  242. dev_err(&pdev->dev, "register-chrdev failed: %d\n", rc);
  243. goto undo_request_region;
  244. }
  245. if (!major) {
  246. major = rc;
  247. dev_dbg(&pdev->dev, "got dynamic major %d\n", major);
  248. }
  249. pc8736x_init_shadow();
  250. /* ignore minor errs, and succeed */
  251. cdev_init(&pc8736x_gpio_cdev, &pc8736x_gpio_fileops);
  252. cdev_add(&pc8736x_gpio_cdev, devid, PC8736X_GPIO_CT);
  253. return 0;
  254. undo_request_region:
  255. release_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE);
  256. undo_platform_dev_add:
  257. platform_device_del(pdev);
  258. undo_platform_dev_alloc:
  259. platform_device_put(pdev);
  260. return rc;
  261. }
  262. static void __exit pc8736x_gpio_cleanup(void)
  263. {
  264. dev_dbg(&pdev->dev, "cleanup\n");
  265. cdev_del(&pc8736x_gpio_cdev);
  266. unregister_chrdev_region(MKDEV(major,0), PC8736X_GPIO_CT);
  267. release_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE);
  268. platform_device_del(pdev);
  269. platform_device_put(pdev);
  270. }
  271. module_init(pc8736x_gpio_init);
  272. module_exit(pc8736x_gpio_cleanup);