nwflash.c 14 KB

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  1. /*
  2. * Flash memory interface rev.5 driver for the Intel
  3. * Flash chips used on the NetWinder.
  4. *
  5. * 20/08/2000 RMK use __ioremap to map flash into virtual memory
  6. * make a few more places use "volatile"
  7. * 22/05/2001 RMK - Lock read against write
  8. * - merge printk level changes (with mods) from Alan Cox.
  9. * - use *ppos as the file position, not file->f_pos.
  10. * - fix check for out of range pos and r/w size
  11. *
  12. * Please note that we are tampering with the only flash chip in the
  13. * machine, which contains the bootup code. We therefore have the
  14. * power to convert these machines into doorstops...
  15. */
  16. #include <linux/module.h>
  17. #include <linux/types.h>
  18. #include <linux/fs.h>
  19. #include <linux/errno.h>
  20. #include <linux/mm.h>
  21. #include <linux/delay.h>
  22. #include <linux/proc_fs.h>
  23. #include <linux/miscdevice.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/rwsem.h>
  26. #include <linux/init.h>
  27. #include <linux/smp_lock.h>
  28. #include <linux/mutex.h>
  29. #include <asm/hardware/dec21285.h>
  30. #include <asm/io.h>
  31. #include <asm/leds.h>
  32. #include <asm/mach-types.h>
  33. #include <asm/system.h>
  34. #include <asm/uaccess.h>
  35. /*****************************************************************************/
  36. #include <asm/nwflash.h>
  37. #define NWFLASH_VERSION "6.4"
  38. static void kick_open(void);
  39. static int get_flash_id(void);
  40. static int erase_block(int nBlock);
  41. static int write_block(unsigned long p, const char __user *buf, int count);
  42. #define KFLASH_SIZE 1024*1024 //1 Meg
  43. #define KFLASH_SIZE4 4*1024*1024 //4 Meg
  44. #define KFLASH_ID 0x89A6 //Intel flash
  45. #define KFLASH_ID4 0xB0D4 //Intel flash 4Meg
  46. static int flashdebug; //if set - we will display progress msgs
  47. static int gbWriteEnable;
  48. static int gbWriteBase64Enable;
  49. static volatile unsigned char *FLASH_BASE;
  50. static int gbFlashSize = KFLASH_SIZE;
  51. static DEFINE_MUTEX(nwflash_mutex);
  52. extern spinlock_t gpio_lock;
  53. static int get_flash_id(void)
  54. {
  55. volatile unsigned int c1, c2;
  56. /*
  57. * try to get flash chip ID
  58. */
  59. kick_open();
  60. c2 = inb(0x80);
  61. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x90;
  62. udelay(15);
  63. c1 = *(volatile unsigned char *) FLASH_BASE;
  64. c2 = inb(0x80);
  65. /*
  66. * on 4 Meg flash the second byte is actually at offset 2...
  67. */
  68. if (c1 == 0xB0)
  69. c2 = *(volatile unsigned char *) (FLASH_BASE + 2);
  70. else
  71. c2 = *(volatile unsigned char *) (FLASH_BASE + 1);
  72. c2 += (c1 << 8);
  73. /*
  74. * set it back to read mode
  75. */
  76. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
  77. if (c2 == KFLASH_ID4)
  78. gbFlashSize = KFLASH_SIZE4;
  79. return c2;
  80. }
  81. static int flash_ioctl(struct inode *inodep, struct file *filep, unsigned int cmd, unsigned long arg)
  82. {
  83. switch (cmd) {
  84. case CMD_WRITE_DISABLE:
  85. gbWriteBase64Enable = 0;
  86. gbWriteEnable = 0;
  87. break;
  88. case CMD_WRITE_ENABLE:
  89. gbWriteEnable = 1;
  90. break;
  91. case CMD_WRITE_BASE64K_ENABLE:
  92. gbWriteBase64Enable = 1;
  93. break;
  94. default:
  95. gbWriteBase64Enable = 0;
  96. gbWriteEnable = 0;
  97. return -EINVAL;
  98. }
  99. return 0;
  100. }
  101. static ssize_t flash_read(struct file *file, char __user *buf, size_t size,
  102. loff_t *ppos)
  103. {
  104. unsigned long p = *ppos;
  105. unsigned int count = size;
  106. int ret = 0;
  107. if (flashdebug)
  108. printk(KERN_DEBUG "flash_read: flash_read: offset=0x%lX, "
  109. "buffer=%p, count=0x%X.\n", p, buf, count);
  110. if (count)
  111. ret = -ENXIO;
  112. if (p < gbFlashSize) {
  113. if (count > gbFlashSize - p)
  114. count = gbFlashSize - p;
  115. /*
  116. * We now lock against reads and writes. --rmk
  117. */
  118. if (mutex_lock_interruptible(&nwflash_mutex))
  119. return -ERESTARTSYS;
  120. ret = copy_to_user(buf, (void *)(FLASH_BASE + p), count);
  121. if (ret == 0) {
  122. ret = count;
  123. *ppos += count;
  124. } else
  125. ret = -EFAULT;
  126. mutex_unlock(&nwflash_mutex);
  127. }
  128. return ret;
  129. }
  130. static ssize_t flash_write(struct file *file, const char __user *buf,
  131. size_t size, loff_t * ppos)
  132. {
  133. unsigned long p = *ppos;
  134. unsigned int count = size;
  135. int written;
  136. int nBlock, temp, rc;
  137. int i, j;
  138. if (flashdebug)
  139. printk("flash_write: offset=0x%lX, buffer=0x%p, count=0x%X.\n",
  140. p, buf, count);
  141. if (!gbWriteEnable)
  142. return -EINVAL;
  143. if (p < 64 * 1024 && (!gbWriteBase64Enable))
  144. return -EINVAL;
  145. /*
  146. * check for out of range pos or count
  147. */
  148. if (p >= gbFlashSize)
  149. return count ? -ENXIO : 0;
  150. if (count > gbFlashSize - p)
  151. count = gbFlashSize - p;
  152. if (!access_ok(VERIFY_READ, buf, count))
  153. return -EFAULT;
  154. /*
  155. * We now lock against reads and writes. --rmk
  156. */
  157. if (mutex_lock_interruptible(&nwflash_mutex))
  158. return -ERESTARTSYS;
  159. written = 0;
  160. leds_event(led_claim);
  161. leds_event(led_green_on);
  162. nBlock = (int) p >> 16; //block # of 64K bytes
  163. /*
  164. * # of 64K blocks to erase and write
  165. */
  166. temp = ((int) (p + count) >> 16) - nBlock + 1;
  167. /*
  168. * write ends at exactly 64k boundary?
  169. */
  170. if (((int) (p + count) & 0xFFFF) == 0)
  171. temp -= 1;
  172. if (flashdebug)
  173. printk(KERN_DEBUG "flash_write: writing %d block(s) "
  174. "starting at %d.\n", temp, nBlock);
  175. for (; temp; temp--, nBlock++) {
  176. if (flashdebug)
  177. printk(KERN_DEBUG "flash_write: erasing block %d.\n", nBlock);
  178. /*
  179. * first we have to erase the block(s), where we will write...
  180. */
  181. i = 0;
  182. j = 0;
  183. RetryBlock:
  184. do {
  185. rc = erase_block(nBlock);
  186. i++;
  187. } while (rc && i < 10);
  188. if (rc) {
  189. printk(KERN_ERR "flash_write: erase error %x\n", rc);
  190. break;
  191. }
  192. if (flashdebug)
  193. printk(KERN_DEBUG "flash_write: writing offset %lX, "
  194. "from buf %p, bytes left %X.\n", p, buf,
  195. count - written);
  196. /*
  197. * write_block will limit write to space left in this block
  198. */
  199. rc = write_block(p, buf, count - written);
  200. j++;
  201. /*
  202. * if somehow write verify failed? Can't happen??
  203. */
  204. if (!rc) {
  205. /*
  206. * retry up to 10 times
  207. */
  208. if (j < 10)
  209. goto RetryBlock;
  210. else
  211. /*
  212. * else quit with error...
  213. */
  214. rc = -1;
  215. }
  216. if (rc < 0) {
  217. printk(KERN_ERR "flash_write: write error %X\n", rc);
  218. break;
  219. }
  220. p += rc;
  221. buf += rc;
  222. written += rc;
  223. *ppos += rc;
  224. if (flashdebug)
  225. printk(KERN_DEBUG "flash_write: written 0x%X bytes OK.\n", written);
  226. }
  227. /*
  228. * restore reg on exit
  229. */
  230. leds_event(led_release);
  231. mutex_unlock(&nwflash_mutex);
  232. return written;
  233. }
  234. /*
  235. * The memory devices use the full 32/64 bits of the offset, and so we cannot
  236. * check against negative addresses: they are ok. The return value is weird,
  237. * though, in that case (0).
  238. *
  239. * also note that seeking relative to the "end of file" isn't supported:
  240. * it has no meaning, so it returns -EINVAL.
  241. */
  242. static loff_t flash_llseek(struct file *file, loff_t offset, int orig)
  243. {
  244. loff_t ret;
  245. lock_kernel();
  246. if (flashdebug)
  247. printk(KERN_DEBUG "flash_llseek: offset=0x%X, orig=0x%X.\n",
  248. (unsigned int) offset, orig);
  249. switch (orig) {
  250. case 0:
  251. if (offset < 0) {
  252. ret = -EINVAL;
  253. break;
  254. }
  255. if ((unsigned int) offset > gbFlashSize) {
  256. ret = -EINVAL;
  257. break;
  258. }
  259. file->f_pos = (unsigned int) offset;
  260. ret = file->f_pos;
  261. break;
  262. case 1:
  263. if ((file->f_pos + offset) > gbFlashSize) {
  264. ret = -EINVAL;
  265. break;
  266. }
  267. if ((file->f_pos + offset) < 0) {
  268. ret = -EINVAL;
  269. break;
  270. }
  271. file->f_pos += offset;
  272. ret = file->f_pos;
  273. break;
  274. default:
  275. ret = -EINVAL;
  276. }
  277. unlock_kernel();
  278. return ret;
  279. }
  280. /*
  281. * assume that main Write routine did the parameter checking...
  282. * so just go ahead and erase, what requested!
  283. */
  284. static int erase_block(int nBlock)
  285. {
  286. volatile unsigned int c1;
  287. volatile unsigned char *pWritePtr;
  288. unsigned long timeout;
  289. int temp, temp1;
  290. /*
  291. * orange LED == erase
  292. */
  293. leds_event(led_amber_on);
  294. /*
  295. * reset footbridge to the correct offset 0 (...0..3)
  296. */
  297. *CSR_ROMWRITEREG = 0;
  298. /*
  299. * dummy ROM read
  300. */
  301. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  302. kick_open();
  303. /*
  304. * reset status if old errors
  305. */
  306. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  307. /*
  308. * erase a block...
  309. * aim at the middle of a current block...
  310. */
  311. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + 0x8000 + (nBlock << 16)));
  312. /*
  313. * dummy read
  314. */
  315. c1 = *pWritePtr;
  316. kick_open();
  317. /*
  318. * erase
  319. */
  320. *(volatile unsigned char *) pWritePtr = 0x20;
  321. /*
  322. * confirm
  323. */
  324. *(volatile unsigned char *) pWritePtr = 0xD0;
  325. /*
  326. * wait 10 ms
  327. */
  328. msleep(10);
  329. /*
  330. * wait while erasing in process (up to 10 sec)
  331. */
  332. timeout = jiffies + 10 * HZ;
  333. c1 = 0;
  334. while (!(c1 & 0x80) && time_before(jiffies, timeout)) {
  335. msleep(10);
  336. /*
  337. * read any address
  338. */
  339. c1 = *(volatile unsigned char *) (pWritePtr);
  340. // printk("Flash_erase: status=%X.\n",c1);
  341. }
  342. /*
  343. * set flash for normal read access
  344. */
  345. kick_open();
  346. // *(volatile unsigned char*)(FLASH_BASE+0x8000) = 0xFF;
  347. *(volatile unsigned char *) pWritePtr = 0xFF; //back to normal operation
  348. /*
  349. * check if erase errors were reported
  350. */
  351. if (c1 & 0x20) {
  352. printk(KERN_ERR "flash_erase: err at %p\n", pWritePtr);
  353. /*
  354. * reset error
  355. */
  356. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  357. return -2;
  358. }
  359. /*
  360. * just to make sure - verify if erased OK...
  361. */
  362. msleep(10);
  363. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + (nBlock << 16)));
  364. for (temp = 0; temp < 16 * 1024; temp++, pWritePtr += 4) {
  365. if ((temp1 = *(volatile unsigned int *) pWritePtr) != 0xFFFFFFFF) {
  366. printk(KERN_ERR "flash_erase: verify err at %p = %X\n",
  367. pWritePtr, temp1);
  368. return -1;
  369. }
  370. }
  371. return 0;
  372. }
  373. /*
  374. * write_block will limit number of bytes written to the space in this block
  375. */
  376. static int write_block(unsigned long p, const char __user *buf, int count)
  377. {
  378. volatile unsigned int c1;
  379. volatile unsigned int c2;
  380. unsigned char *pWritePtr;
  381. unsigned int uAddress;
  382. unsigned int offset;
  383. unsigned long timeout;
  384. unsigned long timeout1;
  385. /*
  386. * red LED == write
  387. */
  388. leds_event(led_amber_off);
  389. leds_event(led_red_on);
  390. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
  391. /*
  392. * check if write will end in this block....
  393. */
  394. offset = p & 0xFFFF;
  395. if (offset + count > 0x10000)
  396. count = 0x10000 - offset;
  397. /*
  398. * wait up to 30 sec for this block
  399. */
  400. timeout = jiffies + 30 * HZ;
  401. for (offset = 0; offset < count; offset++, pWritePtr++) {
  402. uAddress = (unsigned int) pWritePtr;
  403. uAddress &= 0xFFFFFFFC;
  404. if (__get_user(c2, buf + offset))
  405. return -EFAULT;
  406. WriteRetry:
  407. /*
  408. * dummy read
  409. */
  410. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  411. /*
  412. * kick open the write gate
  413. */
  414. kick_open();
  415. /*
  416. * program footbridge to the correct offset...0..3
  417. */
  418. *CSR_ROMWRITEREG = (unsigned int) pWritePtr & 3;
  419. /*
  420. * write cmd
  421. */
  422. *(volatile unsigned char *) (uAddress) = 0x40;
  423. /*
  424. * data to write
  425. */
  426. *(volatile unsigned char *) (uAddress) = c2;
  427. /*
  428. * get status
  429. */
  430. *(volatile unsigned char *) (FLASH_BASE + 0x10000) = 0x70;
  431. c1 = 0;
  432. /*
  433. * wait up to 1 sec for this byte
  434. */
  435. timeout1 = jiffies + 1 * HZ;
  436. /*
  437. * while not ready...
  438. */
  439. while (!(c1 & 0x80) && time_before(jiffies, timeout1))
  440. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  441. /*
  442. * if timeout getting status
  443. */
  444. if (time_after_eq(jiffies, timeout1)) {
  445. kick_open();
  446. /*
  447. * reset err
  448. */
  449. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  450. goto WriteRetry;
  451. }
  452. /*
  453. * switch on read access, as a default flash operation mode
  454. */
  455. kick_open();
  456. /*
  457. * read access
  458. */
  459. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
  460. /*
  461. * if hardware reports an error writing, and not timeout -
  462. * reset the chip and retry
  463. */
  464. if (c1 & 0x10) {
  465. kick_open();
  466. /*
  467. * reset err
  468. */
  469. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  470. /*
  471. * before timeout?
  472. */
  473. if (time_before(jiffies, timeout)) {
  474. if (flashdebug)
  475. printk(KERN_DEBUG "write_block: Retrying write at 0x%X)n",
  476. pWritePtr - FLASH_BASE);
  477. /*
  478. * no LED == waiting
  479. */
  480. leds_event(led_amber_off);
  481. /*
  482. * wait couple ms
  483. */
  484. msleep(10);
  485. /*
  486. * red LED == write
  487. */
  488. leds_event(led_red_on);
  489. goto WriteRetry;
  490. } else {
  491. printk(KERN_ERR "write_block: timeout at 0x%X\n",
  492. pWritePtr - FLASH_BASE);
  493. /*
  494. * return error -2
  495. */
  496. return -2;
  497. }
  498. }
  499. }
  500. /*
  501. * green LED == read/verify
  502. */
  503. leds_event(led_amber_off);
  504. leds_event(led_green_on);
  505. msleep(10);
  506. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
  507. for (offset = 0; offset < count; offset++) {
  508. char c, c1;
  509. if (__get_user(c, buf))
  510. return -EFAULT;
  511. buf++;
  512. if ((c1 = *pWritePtr++) != c) {
  513. printk(KERN_ERR "write_block: verify error at 0x%X (%02X!=%02X)\n",
  514. pWritePtr - FLASH_BASE, c1, c);
  515. return 0;
  516. }
  517. }
  518. return count;
  519. }
  520. static void kick_open(void)
  521. {
  522. unsigned long flags;
  523. /*
  524. * we want to write a bit pattern XXX1 to Xilinx to enable
  525. * the write gate, which will be open for about the next 2ms.
  526. */
  527. spin_lock_irqsave(&gpio_lock, flags);
  528. cpld_modify(1, 1);
  529. spin_unlock_irqrestore(&gpio_lock, flags);
  530. /*
  531. * let the ISA bus to catch on...
  532. */
  533. udelay(25);
  534. }
  535. static const struct file_operations flash_fops =
  536. {
  537. .owner = THIS_MODULE,
  538. .llseek = flash_llseek,
  539. .read = flash_read,
  540. .write = flash_write,
  541. .ioctl = flash_ioctl,
  542. };
  543. static struct miscdevice flash_miscdev =
  544. {
  545. FLASH_MINOR,
  546. "nwflash",
  547. &flash_fops
  548. };
  549. static int __init nwflash_init(void)
  550. {
  551. int ret = -ENODEV;
  552. if (machine_is_netwinder()) {
  553. int id;
  554. FLASH_BASE = ioremap(DC21285_FLASH, KFLASH_SIZE4);
  555. if (!FLASH_BASE)
  556. goto out;
  557. id = get_flash_id();
  558. if ((id != KFLASH_ID) && (id != KFLASH_ID4)) {
  559. ret = -ENXIO;
  560. iounmap((void *)FLASH_BASE);
  561. printk("Flash: incorrect ID 0x%04X.\n", id);
  562. goto out;
  563. }
  564. printk("Flash ROM driver v.%s, flash device ID 0x%04X, size %d Mb.\n",
  565. NWFLASH_VERSION, id, gbFlashSize / (1024 * 1024));
  566. ret = misc_register(&flash_miscdev);
  567. if (ret < 0) {
  568. iounmap((void *)FLASH_BASE);
  569. }
  570. }
  571. out:
  572. return ret;
  573. }
  574. static void __exit nwflash_exit(void)
  575. {
  576. misc_deregister(&flash_miscdev);
  577. iounmap((void *)FLASH_BASE);
  578. }
  579. MODULE_LICENSE("GPL");
  580. module_param(flashdebug, bool, 0644);
  581. module_init(nwflash_init);
  582. module_exit(nwflash_exit);