mmtimer.c 18 KB

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  1. /*
  2. * Timer device implementation for SGI SN platforms.
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (c) 2001-2006 Silicon Graphics, Inc. All rights reserved.
  9. *
  10. * This driver exports an API that should be supportable by any HPET or IA-PC
  11. * multimedia timer. The code below is currently specific to the SGI Altix
  12. * SHub RTC, however.
  13. *
  14. * 11/01/01 - jbarnes - initial revision
  15. * 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion
  16. * 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE
  17. * 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt
  18. * support via the posix timer interface
  19. */
  20. #include <linux/types.h>
  21. #include <linux/kernel.h>
  22. #include <linux/ioctl.h>
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/errno.h>
  26. #include <linux/mm.h>
  27. #include <linux/mmtimer.h>
  28. #include <linux/miscdevice.h>
  29. #include <linux/posix-timers.h>
  30. #include <linux/interrupt.h>
  31. #include <asm/uaccess.h>
  32. #include <asm/sn/addrs.h>
  33. #include <asm/sn/intr.h>
  34. #include <asm/sn/shub_mmr.h>
  35. #include <asm/sn/nodepda.h>
  36. #include <asm/sn/shubio.h>
  37. MODULE_AUTHOR("Jesse Barnes <jbarnes@sgi.com>");
  38. MODULE_DESCRIPTION("SGI Altix RTC Timer");
  39. MODULE_LICENSE("GPL");
  40. /* name of the device, usually in /dev */
  41. #define MMTIMER_NAME "mmtimer"
  42. #define MMTIMER_DESC "SGI Altix RTC Timer"
  43. #define MMTIMER_VERSION "2.1"
  44. #define RTC_BITS 55 /* 55 bits for this implementation */
  45. extern unsigned long sn_rtc_cycles_per_second;
  46. #define RTC_COUNTER_ADDR ((long *)LOCAL_MMR_ADDR(SH_RTC))
  47. #define rtc_time() (*RTC_COUNTER_ADDR)
  48. static int mmtimer_ioctl(struct inode *inode, struct file *file,
  49. unsigned int cmd, unsigned long arg);
  50. static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma);
  51. /*
  52. * Period in femtoseconds (10^-15 s)
  53. */
  54. static unsigned long mmtimer_femtoperiod = 0;
  55. static const struct file_operations mmtimer_fops = {
  56. .owner = THIS_MODULE,
  57. .mmap = mmtimer_mmap,
  58. .ioctl = mmtimer_ioctl,
  59. };
  60. /*
  61. * We only have comparison registers RTC1-4 currently available per
  62. * node. RTC0 is used by SAL.
  63. */
  64. #define NUM_COMPARATORS 3
  65. /* Check for an RTC interrupt pending */
  66. static int inline mmtimer_int_pending(int comparator)
  67. {
  68. if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) &
  69. SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator)
  70. return 1;
  71. else
  72. return 0;
  73. }
  74. /* Clear the RTC interrupt pending bit */
  75. static void inline mmtimer_clr_int_pending(int comparator)
  76. {
  77. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS),
  78. SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator);
  79. }
  80. /* Setup timer on comparator RTC1 */
  81. static void inline mmtimer_setup_int_0(u64 expires)
  82. {
  83. u64 val;
  84. /* Disable interrupt */
  85. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL);
  86. /* Initialize comparator value */
  87. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L);
  88. /* Clear pending bit */
  89. mmtimer_clr_int_pending(0);
  90. val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) |
  91. ((u64)cpu_physical_id(smp_processor_id()) <<
  92. SH_RTC1_INT_CONFIG_PID_SHFT);
  93. /* Set configuration */
  94. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val);
  95. /* Enable RTC interrupts */
  96. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL);
  97. /* Initialize comparator value */
  98. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires);
  99. }
  100. /* Setup timer on comparator RTC2 */
  101. static void inline mmtimer_setup_int_1(u64 expires)
  102. {
  103. u64 val;
  104. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL);
  105. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L);
  106. mmtimer_clr_int_pending(1);
  107. val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) |
  108. ((u64)cpu_physical_id(smp_processor_id()) <<
  109. SH_RTC2_INT_CONFIG_PID_SHFT);
  110. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val);
  111. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL);
  112. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires);
  113. }
  114. /* Setup timer on comparator RTC3 */
  115. static void inline mmtimer_setup_int_2(u64 expires)
  116. {
  117. u64 val;
  118. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL);
  119. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L);
  120. mmtimer_clr_int_pending(2);
  121. val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) |
  122. ((u64)cpu_physical_id(smp_processor_id()) <<
  123. SH_RTC3_INT_CONFIG_PID_SHFT);
  124. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val);
  125. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL);
  126. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires);
  127. }
  128. /*
  129. * This function must be called with interrupts disabled and preemption off
  130. * in order to insure that the setup succeeds in a deterministic time frame.
  131. * It will check if the interrupt setup succeeded.
  132. */
  133. static int inline mmtimer_setup(int comparator, unsigned long expires)
  134. {
  135. switch (comparator) {
  136. case 0:
  137. mmtimer_setup_int_0(expires);
  138. break;
  139. case 1:
  140. mmtimer_setup_int_1(expires);
  141. break;
  142. case 2:
  143. mmtimer_setup_int_2(expires);
  144. break;
  145. }
  146. /* We might've missed our expiration time */
  147. if (rtc_time() < expires)
  148. return 1;
  149. /*
  150. * If an interrupt is already pending then its okay
  151. * if not then we failed
  152. */
  153. return mmtimer_int_pending(comparator);
  154. }
  155. static int inline mmtimer_disable_int(long nasid, int comparator)
  156. {
  157. switch (comparator) {
  158. case 0:
  159. nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE),
  160. 0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL);
  161. break;
  162. case 1:
  163. nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE),
  164. 0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL);
  165. break;
  166. case 2:
  167. nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE),
  168. 0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL);
  169. break;
  170. default:
  171. return -EFAULT;
  172. }
  173. return 0;
  174. }
  175. #define TIMER_OFF 0xbadcabLL
  176. /* There is one of these for each comparator */
  177. typedef struct mmtimer {
  178. spinlock_t lock ____cacheline_aligned;
  179. struct k_itimer *timer;
  180. int i;
  181. int cpu;
  182. struct tasklet_struct tasklet;
  183. } mmtimer_t;
  184. static mmtimer_t ** timers;
  185. /**
  186. * mmtimer_ioctl - ioctl interface for /dev/mmtimer
  187. * @inode: inode of the device
  188. * @file: file structure for the device
  189. * @cmd: command to execute
  190. * @arg: optional argument to command
  191. *
  192. * Executes the command specified by @cmd. Returns 0 for success, < 0 for
  193. * failure.
  194. *
  195. * Valid commands:
  196. *
  197. * %MMTIMER_GETOFFSET - Should return the offset (relative to the start
  198. * of the page where the registers are mapped) for the counter in question.
  199. *
  200. * %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15)
  201. * seconds
  202. *
  203. * %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address
  204. * specified by @arg
  205. *
  206. * %MMTIMER_GETBITS - Returns the number of bits in the clock's counter
  207. *
  208. * %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace
  209. *
  210. * %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it
  211. * in the address specified by @arg.
  212. */
  213. static int mmtimer_ioctl(struct inode *inode, struct file *file,
  214. unsigned int cmd, unsigned long arg)
  215. {
  216. int ret = 0;
  217. switch (cmd) {
  218. case MMTIMER_GETOFFSET: /* offset of the counter */
  219. /*
  220. * SN RTC registers are on their own 64k page
  221. */
  222. if(PAGE_SIZE <= (1 << 16))
  223. ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8;
  224. else
  225. ret = -ENOSYS;
  226. break;
  227. case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */
  228. if(copy_to_user((unsigned long __user *)arg,
  229. &mmtimer_femtoperiod, sizeof(unsigned long)))
  230. return -EFAULT;
  231. break;
  232. case MMTIMER_GETFREQ: /* frequency in Hz */
  233. if(copy_to_user((unsigned long __user *)arg,
  234. &sn_rtc_cycles_per_second,
  235. sizeof(unsigned long)))
  236. return -EFAULT;
  237. ret = 0;
  238. break;
  239. case MMTIMER_GETBITS: /* number of bits in the clock */
  240. ret = RTC_BITS;
  241. break;
  242. case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */
  243. ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0;
  244. break;
  245. case MMTIMER_GETCOUNTER:
  246. if(copy_to_user((unsigned long __user *)arg,
  247. RTC_COUNTER_ADDR, sizeof(unsigned long)))
  248. return -EFAULT;
  249. break;
  250. default:
  251. ret = -ENOSYS;
  252. break;
  253. }
  254. return ret;
  255. }
  256. /**
  257. * mmtimer_mmap - maps the clock's registers into userspace
  258. * @file: file structure for the device
  259. * @vma: VMA to map the registers into
  260. *
  261. * Calls remap_pfn_range() to map the clock's registers into
  262. * the calling process' address space.
  263. */
  264. static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma)
  265. {
  266. unsigned long mmtimer_addr;
  267. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  268. return -EINVAL;
  269. if (vma->vm_flags & VM_WRITE)
  270. return -EPERM;
  271. if (PAGE_SIZE > (1 << 16))
  272. return -ENOSYS;
  273. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  274. mmtimer_addr = __pa(RTC_COUNTER_ADDR);
  275. mmtimer_addr &= ~(PAGE_SIZE - 1);
  276. mmtimer_addr &= 0xfffffffffffffffUL;
  277. if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT,
  278. PAGE_SIZE, vma->vm_page_prot)) {
  279. printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n");
  280. return -EAGAIN;
  281. }
  282. return 0;
  283. }
  284. static struct miscdevice mmtimer_miscdev = {
  285. SGI_MMTIMER,
  286. MMTIMER_NAME,
  287. &mmtimer_fops
  288. };
  289. static struct timespec sgi_clock_offset;
  290. static int sgi_clock_period;
  291. /*
  292. * Posix Timer Interface
  293. */
  294. static struct timespec sgi_clock_offset;
  295. static int sgi_clock_period;
  296. static int sgi_clock_get(clockid_t clockid, struct timespec *tp)
  297. {
  298. u64 nsec;
  299. nsec = rtc_time() * sgi_clock_period
  300. + sgi_clock_offset.tv_nsec;
  301. tp->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &tp->tv_nsec)
  302. + sgi_clock_offset.tv_sec;
  303. return 0;
  304. };
  305. static int sgi_clock_set(clockid_t clockid, struct timespec *tp)
  306. {
  307. u64 nsec;
  308. u64 rem;
  309. nsec = rtc_time() * sgi_clock_period;
  310. sgi_clock_offset.tv_sec = tp->tv_sec - div_long_long_rem(nsec, NSEC_PER_SEC, &rem);
  311. if (rem <= tp->tv_nsec)
  312. sgi_clock_offset.tv_nsec = tp->tv_sec - rem;
  313. else {
  314. sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem;
  315. sgi_clock_offset.tv_sec--;
  316. }
  317. return 0;
  318. }
  319. /*
  320. * Schedule the next periodic interrupt. This function will attempt
  321. * to schedule a periodic interrupt later if necessary. If the scheduling
  322. * of an interrupt fails then the time to skip is lengthened
  323. * exponentially in order to ensure that the next interrupt
  324. * can be properly scheduled..
  325. */
  326. static int inline reschedule_periodic_timer(mmtimer_t *x)
  327. {
  328. int n;
  329. struct k_itimer *t = x->timer;
  330. t->it.mmtimer.clock = x->i;
  331. t->it_overrun--;
  332. n = 0;
  333. do {
  334. t->it.mmtimer.expires += t->it.mmtimer.incr << n;
  335. t->it_overrun += 1 << n;
  336. n++;
  337. if (n > 20)
  338. return 1;
  339. } while (!mmtimer_setup(x->i, t->it.mmtimer.expires));
  340. return 0;
  341. }
  342. /**
  343. * mmtimer_interrupt - timer interrupt handler
  344. * @irq: irq received
  345. * @dev_id: device the irq came from
  346. *
  347. * Called when one of the comarators matches the counter, This
  348. * routine will send signals to processes that have requested
  349. * them.
  350. *
  351. * This interrupt is run in an interrupt context
  352. * by the SHUB. It is therefore safe to locally access SHub
  353. * registers.
  354. */
  355. static irqreturn_t
  356. mmtimer_interrupt(int irq, void *dev_id)
  357. {
  358. int i;
  359. unsigned long expires = 0;
  360. int result = IRQ_NONE;
  361. unsigned indx = cpu_to_node(smp_processor_id());
  362. /*
  363. * Do this once for each comparison register
  364. */
  365. for (i = 0; i < NUM_COMPARATORS; i++) {
  366. mmtimer_t *base = timers[indx] + i;
  367. /* Make sure this doesn't get reused before tasklet_sched */
  368. spin_lock(&base->lock);
  369. if (base->cpu == smp_processor_id()) {
  370. if (base->timer)
  371. expires = base->timer->it.mmtimer.expires;
  372. /* expires test won't work with shared irqs */
  373. if ((mmtimer_int_pending(i) > 0) ||
  374. (expires && (expires < rtc_time()))) {
  375. mmtimer_clr_int_pending(i);
  376. tasklet_schedule(&base->tasklet);
  377. result = IRQ_HANDLED;
  378. }
  379. }
  380. spin_unlock(&base->lock);
  381. expires = 0;
  382. }
  383. return result;
  384. }
  385. void mmtimer_tasklet(unsigned long data) {
  386. mmtimer_t *x = (mmtimer_t *)data;
  387. struct k_itimer *t = x->timer;
  388. unsigned long flags;
  389. if (t == NULL)
  390. return;
  391. /* Send signal and deal with periodic signals */
  392. spin_lock_irqsave(&t->it_lock, flags);
  393. spin_lock(&x->lock);
  394. /* If timer was deleted between interrupt and here, leave */
  395. if (t != x->timer)
  396. goto out;
  397. t->it_overrun = 0;
  398. if (posix_timer_event(t, 0) != 0) {
  399. // printk(KERN_WARNING "mmtimer: cannot deliver signal.\n");
  400. t->it_overrun++;
  401. }
  402. if(t->it.mmtimer.incr) {
  403. /* Periodic timer */
  404. if (reschedule_periodic_timer(x)) {
  405. printk(KERN_WARNING "mmtimer: unable to reschedule\n");
  406. x->timer = NULL;
  407. }
  408. } else {
  409. /* Ensure we don't false trigger in mmtimer_interrupt */
  410. t->it.mmtimer.expires = 0;
  411. }
  412. t->it_overrun_last = t->it_overrun;
  413. out:
  414. spin_unlock(&x->lock);
  415. spin_unlock_irqrestore(&t->it_lock, flags);
  416. }
  417. static int sgi_timer_create(struct k_itimer *timer)
  418. {
  419. /* Insure that a newly created timer is off */
  420. timer->it.mmtimer.clock = TIMER_OFF;
  421. return 0;
  422. }
  423. /* This does not really delete a timer. It just insures
  424. * that the timer is not active
  425. *
  426. * Assumption: it_lock is already held with irq's disabled
  427. */
  428. static int sgi_timer_del(struct k_itimer *timr)
  429. {
  430. int i = timr->it.mmtimer.clock;
  431. cnodeid_t nodeid = timr->it.mmtimer.node;
  432. mmtimer_t *t = timers[nodeid] + i;
  433. unsigned long irqflags;
  434. if (i != TIMER_OFF) {
  435. spin_lock_irqsave(&t->lock, irqflags);
  436. mmtimer_disable_int(cnodeid_to_nasid(nodeid),i);
  437. t->timer = NULL;
  438. timr->it.mmtimer.clock = TIMER_OFF;
  439. timr->it.mmtimer.expires = 0;
  440. spin_unlock_irqrestore(&t->lock, irqflags);
  441. }
  442. return 0;
  443. }
  444. #define timespec_to_ns(x) ((x).tv_nsec + (x).tv_sec * NSEC_PER_SEC)
  445. #define ns_to_timespec(ts, nsec) (ts).tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &(ts).tv_nsec)
  446. /* Assumption: it_lock is already held with irq's disabled */
  447. static void sgi_timer_get(struct k_itimer *timr, struct itimerspec *cur_setting)
  448. {
  449. if (timr->it.mmtimer.clock == TIMER_OFF) {
  450. cur_setting->it_interval.tv_nsec = 0;
  451. cur_setting->it_interval.tv_sec = 0;
  452. cur_setting->it_value.tv_nsec = 0;
  453. cur_setting->it_value.tv_sec =0;
  454. return;
  455. }
  456. ns_to_timespec(cur_setting->it_interval, timr->it.mmtimer.incr * sgi_clock_period);
  457. ns_to_timespec(cur_setting->it_value, (timr->it.mmtimer.expires - rtc_time())* sgi_clock_period);
  458. return;
  459. }
  460. static int sgi_timer_set(struct k_itimer *timr, int flags,
  461. struct itimerspec * new_setting,
  462. struct itimerspec * old_setting)
  463. {
  464. int i;
  465. unsigned long when, period, irqflags;
  466. int err = 0;
  467. cnodeid_t nodeid;
  468. mmtimer_t *base;
  469. if (old_setting)
  470. sgi_timer_get(timr, old_setting);
  471. sgi_timer_del(timr);
  472. when = timespec_to_ns(new_setting->it_value);
  473. period = timespec_to_ns(new_setting->it_interval);
  474. if (when == 0)
  475. /* Clear timer */
  476. return 0;
  477. if (flags & TIMER_ABSTIME) {
  478. struct timespec n;
  479. unsigned long now;
  480. getnstimeofday(&n);
  481. now = timespec_to_ns(n);
  482. if (when > now)
  483. when -= now;
  484. else
  485. /* Fire the timer immediately */
  486. when = 0;
  487. }
  488. /*
  489. * Convert to sgi clock period. Need to keep rtc_time() as near as possible
  490. * to getnstimeofday() in order to be as faithful as possible to the time
  491. * specified.
  492. */
  493. when = (when + sgi_clock_period - 1) / sgi_clock_period + rtc_time();
  494. period = (period + sgi_clock_period - 1) / sgi_clock_period;
  495. /*
  496. * We are allocating a local SHub comparator. If we would be moved to another
  497. * cpu then another SHub may be local to us. Prohibit that by switching off
  498. * preemption.
  499. */
  500. preempt_disable();
  501. nodeid = cpu_to_node(smp_processor_id());
  502. retry:
  503. /* Don't use an allocated timer, or a deleted one that's pending */
  504. for(i = 0; i< NUM_COMPARATORS; i++) {
  505. base = timers[nodeid] + i;
  506. if (!base->timer && !base->tasklet.state) {
  507. break;
  508. }
  509. }
  510. if (i == NUM_COMPARATORS) {
  511. preempt_enable();
  512. return -EBUSY;
  513. }
  514. spin_lock_irqsave(&base->lock, irqflags);
  515. if (base->timer || base->tasklet.state != 0) {
  516. spin_unlock_irqrestore(&base->lock, irqflags);
  517. goto retry;
  518. }
  519. base->timer = timr;
  520. base->cpu = smp_processor_id();
  521. timr->it.mmtimer.clock = i;
  522. timr->it.mmtimer.node = nodeid;
  523. timr->it.mmtimer.incr = period;
  524. timr->it.mmtimer.expires = when;
  525. if (period == 0) {
  526. if (!mmtimer_setup(i, when)) {
  527. mmtimer_disable_int(-1, i);
  528. posix_timer_event(timr, 0);
  529. timr->it.mmtimer.expires = 0;
  530. }
  531. } else {
  532. timr->it.mmtimer.expires -= period;
  533. if (reschedule_periodic_timer(base))
  534. err = -EINVAL;
  535. }
  536. spin_unlock_irqrestore(&base->lock, irqflags);
  537. preempt_enable();
  538. return err;
  539. }
  540. static struct k_clock sgi_clock = {
  541. .res = 0,
  542. .clock_set = sgi_clock_set,
  543. .clock_get = sgi_clock_get,
  544. .timer_create = sgi_timer_create,
  545. .nsleep = do_posix_clock_nonanosleep,
  546. .timer_set = sgi_timer_set,
  547. .timer_del = sgi_timer_del,
  548. .timer_get = sgi_timer_get
  549. };
  550. /**
  551. * mmtimer_init - device initialization routine
  552. *
  553. * Does initial setup for the mmtimer device.
  554. */
  555. static int __init mmtimer_init(void)
  556. {
  557. unsigned i;
  558. cnodeid_t node, maxn = -1;
  559. if (!ia64_platform_is("sn2"))
  560. return 0;
  561. /*
  562. * Sanity check the cycles/sec variable
  563. */
  564. if (sn_rtc_cycles_per_second < 100000) {
  565. printk(KERN_ERR "%s: unable to determine clock frequency\n",
  566. MMTIMER_NAME);
  567. goto out1;
  568. }
  569. mmtimer_femtoperiod = ((unsigned long)1E15 + sn_rtc_cycles_per_second /
  570. 2) / sn_rtc_cycles_per_second;
  571. if (request_irq(SGI_MMTIMER_VECTOR, mmtimer_interrupt, IRQF_PERCPU, MMTIMER_NAME, NULL)) {
  572. printk(KERN_WARNING "%s: unable to allocate interrupt.",
  573. MMTIMER_NAME);
  574. goto out1;
  575. }
  576. if (misc_register(&mmtimer_miscdev)) {
  577. printk(KERN_ERR "%s: failed to register device\n",
  578. MMTIMER_NAME);
  579. goto out2;
  580. }
  581. /* Get max numbered node, calculate slots needed */
  582. for_each_online_node(node) {
  583. maxn = node;
  584. }
  585. maxn++;
  586. /* Allocate list of node ptrs to mmtimer_t's */
  587. timers = kmalloc(sizeof(mmtimer_t *)*maxn, GFP_KERNEL);
  588. if (timers == NULL) {
  589. printk(KERN_ERR "%s: failed to allocate memory for device\n",
  590. MMTIMER_NAME);
  591. goto out3;
  592. }
  593. memset(timers,0,(sizeof(mmtimer_t *)*maxn));
  594. /* Allocate mmtimer_t's for each online node */
  595. for_each_online_node(node) {
  596. timers[node] = kmalloc_node(sizeof(mmtimer_t)*NUM_COMPARATORS, GFP_KERNEL, node);
  597. if (timers[node] == NULL) {
  598. printk(KERN_ERR "%s: failed to allocate memory for device\n",
  599. MMTIMER_NAME);
  600. goto out4;
  601. }
  602. for (i=0; i< NUM_COMPARATORS; i++) {
  603. mmtimer_t * base = timers[node] + i;
  604. spin_lock_init(&base->lock);
  605. base->timer = NULL;
  606. base->cpu = 0;
  607. base->i = i;
  608. tasklet_init(&base->tasklet, mmtimer_tasklet,
  609. (unsigned long) (base));
  610. }
  611. }
  612. sgi_clock_period = sgi_clock.res = NSEC_PER_SEC / sn_rtc_cycles_per_second;
  613. register_posix_clock(CLOCK_SGI_CYCLE, &sgi_clock);
  614. printk(KERN_INFO "%s: v%s, %ld MHz\n", MMTIMER_DESC, MMTIMER_VERSION,
  615. sn_rtc_cycles_per_second/(unsigned long)1E6);
  616. return 0;
  617. out4:
  618. for_each_online_node(node) {
  619. kfree(timers[node]);
  620. }
  621. out3:
  622. misc_deregister(&mmtimer_miscdev);
  623. out2:
  624. free_irq(SGI_MMTIMER_VECTOR, NULL);
  625. out1:
  626. return -1;
  627. }
  628. module_init(mmtimer_init);