misc.S 2.3 KB

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  1. /*
  2. * This file contains miscellaneous low-level functions.
  3. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  4. *
  5. * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
  6. * and Paul Mackerras.
  7. *
  8. * A couple of functions stolen from arch/ppc/kernel/misc.S for UML
  9. * by Chris Emerson.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. *
  16. */
  17. #include <asm/processor.h>
  18. #include "ppc_asm.h"
  19. #if defined(CONFIG_4xx) || defined(CONFIG_8xx)
  20. #define CACHE_LINE_SIZE 16
  21. #define LG_CACHE_LINE_SIZE 4
  22. #define MAX_COPY_PREFETCH 1
  23. #else
  24. #define CACHE_LINE_SIZE 32
  25. #define LG_CACHE_LINE_SIZE 5
  26. #define MAX_COPY_PREFETCH 4
  27. #endif /* CONFIG_4xx || CONFIG_8xx */
  28. .text
  29. /*
  30. * Clear a page using the dcbz instruction, which doesn't cause any
  31. * memory traffic (except to write out any cache lines which get
  32. * displaced). This only works on cacheable memory.
  33. */
  34. _GLOBAL(clear_page)
  35. li r0,4096/CACHE_LINE_SIZE
  36. mtctr r0
  37. #ifdef CONFIG_8xx
  38. li r4, 0
  39. 1: stw r4, 0(r3)
  40. stw r4, 4(r3)
  41. stw r4, 8(r3)
  42. stw r4, 12(r3)
  43. #else
  44. 1: dcbz 0,r3
  45. #endif
  46. addi r3,r3,CACHE_LINE_SIZE
  47. bdnz 1b
  48. blr
  49. /*
  50. * Copy a whole page. We use the dcbz instruction on the destination
  51. * to reduce memory traffic (it eliminates the unnecessary reads of
  52. * the destination into cache). This requires that the destination
  53. * is cacheable.
  54. */
  55. #define COPY_16_BYTES \
  56. lwz r6,4(r4); \
  57. lwz r7,8(r4); \
  58. lwz r8,12(r4); \
  59. lwzu r9,16(r4); \
  60. stw r6,4(r3); \
  61. stw r7,8(r3); \
  62. stw r8,12(r3); \
  63. stwu r9,16(r3)
  64. _GLOBAL(copy_page)
  65. addi r3,r3,-4
  66. addi r4,r4,-4
  67. li r5,4
  68. #ifndef CONFIG_8xx
  69. #if MAX_COPY_PREFETCH > 1
  70. li r0,MAX_COPY_PREFETCH
  71. li r11,4
  72. mtctr r0
  73. 11: dcbt r11,r4
  74. addi r11,r11,CACHE_LINE_SIZE
  75. bdnz 11b
  76. #else /* MAX_COPY_PREFETCH == 1 */
  77. dcbt r5,r4
  78. li r11,CACHE_LINE_SIZE+4
  79. #endif /* MAX_COPY_PREFETCH */
  80. #endif /* CONFIG_8xx */
  81. li r0,4096/CACHE_LINE_SIZE
  82. mtctr r0
  83. 1:
  84. #ifndef CONFIG_8xx
  85. dcbt r11,r4
  86. dcbz r5,r3
  87. #endif
  88. COPY_16_BYTES
  89. #if CACHE_LINE_SIZE >= 32
  90. COPY_16_BYTES
  91. #if CACHE_LINE_SIZE >= 64
  92. COPY_16_BYTES
  93. COPY_16_BYTES
  94. #if CACHE_LINE_SIZE >= 128
  95. COPY_16_BYTES
  96. COPY_16_BYTES
  97. COPY_16_BYTES
  98. COPY_16_BYTES
  99. #endif
  100. #endif
  101. #endif
  102. bdnz 1b
  103. blr