entry64.S 30 KB

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  1. /*
  2. * arch/s390/kernel/entry64.S
  3. * S390 low-level entry points.
  4. *
  5. * Copyright (C) IBM Corp. 1999,2006
  6. * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
  7. * Hartmut Penner (hp@de.ibm.com),
  8. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
  9. * Heiko Carstens <heiko.carstens@de.ibm.com>
  10. */
  11. #include <linux/sys.h>
  12. #include <linux/linkage.h>
  13. #include <asm/cache.h>
  14. #include <asm/lowcore.h>
  15. #include <asm/errno.h>
  16. #include <asm/ptrace.h>
  17. #include <asm/thread_info.h>
  18. #include <asm/asm-offsets.h>
  19. #include <asm/unistd.h>
  20. #include <asm/page.h>
  21. /*
  22. * Stack layout for the system_call stack entry.
  23. * The first few entries are identical to the user_regs_struct.
  24. */
  25. SP_PTREGS = STACK_FRAME_OVERHEAD
  26. SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
  27. SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
  28. SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
  29. SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
  30. SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
  31. SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
  32. SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
  33. SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
  34. SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
  35. SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
  36. SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
  37. SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
  38. SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
  39. SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
  40. SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
  41. SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
  42. SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
  43. SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
  44. SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
  45. SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
  46. SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
  47. SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
  48. STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
  49. STACK_SIZE = 1 << STACK_SHIFT
  50. _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
  51. _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
  52. _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
  53. _TIF_MCCK_PENDING)
  54. #define BASED(name) name-system_call(%r13)
  55. #ifdef CONFIG_TRACE_IRQFLAGS
  56. .macro TRACE_IRQS_ON
  57. brasl %r14,trace_hardirqs_on
  58. .endm
  59. .macro TRACE_IRQS_OFF
  60. brasl %r14,trace_hardirqs_off
  61. .endm
  62. #else
  63. #define TRACE_IRQS_ON
  64. #define TRACE_IRQS_OFF
  65. #endif
  66. .macro STORE_TIMER lc_offset
  67. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  68. stpt \lc_offset
  69. #endif
  70. .endm
  71. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  72. .macro UPDATE_VTIME lc_from,lc_to,lc_sum
  73. lg %r10,\lc_from
  74. slg %r10,\lc_to
  75. alg %r10,\lc_sum
  76. stg %r10,\lc_sum
  77. .endm
  78. #endif
  79. /*
  80. * Register usage in interrupt handlers:
  81. * R9 - pointer to current task structure
  82. * R13 - pointer to literal pool
  83. * R14 - return register for function calls
  84. * R15 - kernel stack pointer
  85. */
  86. .macro SAVE_ALL_BASE savearea
  87. stmg %r12,%r15,\savearea
  88. larl %r13,system_call
  89. .endm
  90. .macro SAVE_ALL_SYNC psworg,savearea
  91. la %r12,\psworg
  92. tm \psworg+1,0x01 # test problem state bit
  93. jz 2f # skip stack setup save
  94. lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
  95. #ifdef CONFIG_CHECK_STACK
  96. j 3f
  97. 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
  98. jz stack_overflow
  99. 3:
  100. #endif
  101. 2:
  102. .endm
  103. .macro SAVE_ALL_ASYNC psworg,savearea
  104. la %r12,\psworg
  105. tm \psworg+1,0x01 # test problem state bit
  106. jnz 1f # from user -> load kernel stack
  107. clc \psworg+8(8),BASED(.Lcritical_end)
  108. jhe 0f
  109. clc \psworg+8(8),BASED(.Lcritical_start)
  110. jl 0f
  111. brasl %r14,cleanup_critical
  112. tm 1(%r12),0x01 # retest problem state after cleanup
  113. jnz 1f
  114. 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
  115. slgr %r14,%r15
  116. srag %r14,%r14,STACK_SHIFT
  117. jz 2f
  118. 1: lg %r15,__LC_ASYNC_STACK # load async stack
  119. #ifdef CONFIG_CHECK_STACK
  120. j 3f
  121. 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
  122. jz stack_overflow
  123. 3:
  124. #endif
  125. 2:
  126. .endm
  127. .macro CREATE_STACK_FRAME psworg,savearea
  128. aghi %r15,-SP_SIZE # make room for registers & psw
  129. mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
  130. la %r12,\psworg
  131. stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
  132. icm %r12,12,__LC_SVC_ILC
  133. stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
  134. st %r12,SP_ILC(%r15)
  135. mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
  136. la %r12,0
  137. stg %r12,__SF_BACKCHAIN(%r15)
  138. .endm
  139. .macro RESTORE_ALL psworg,sync
  140. mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
  141. .if !\sync
  142. ni \psworg+1,0xfd # clear wait state bit
  143. .endif
  144. lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
  145. STORE_TIMER __LC_EXIT_TIMER
  146. lpswe \psworg # back to caller
  147. .endm
  148. /*
  149. * Scheduler resume function, called by switch_to
  150. * gpr2 = (task_struct *) prev
  151. * gpr3 = (task_struct *) next
  152. * Returns:
  153. * gpr2 = prev
  154. */
  155. .globl __switch_to
  156. __switch_to:
  157. tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
  158. jz __switch_to_noper # if not we're fine
  159. stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
  160. clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
  161. je __switch_to_noper # we got away without bashing TLB's
  162. lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
  163. __switch_to_noper:
  164. lg %r4,__THREAD_info(%r2) # get thread_info of prev
  165. tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
  166. jz __switch_to_no_mcck
  167. ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
  168. lg %r4,__THREAD_info(%r3) # get thread_info of next
  169. oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
  170. __switch_to_no_mcck:
  171. stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
  172. stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
  173. lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
  174. lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
  175. stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
  176. lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
  177. lg %r3,__THREAD_info(%r3) # load thread_info from task struct
  178. stg %r3,__LC_THREAD_INFO
  179. aghi %r3,STACK_SIZE
  180. stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
  181. br %r14
  182. __critical_start:
  183. /*
  184. * SVC interrupt handler routine. System calls are synchronous events and
  185. * are executed with interrupts enabled.
  186. */
  187. .globl system_call
  188. system_call:
  189. STORE_TIMER __LC_SYNC_ENTER_TIMER
  190. sysc_saveall:
  191. SAVE_ALL_BASE __LC_SAVE_AREA
  192. SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
  193. CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
  194. llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
  195. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  196. sysc_vtime:
  197. tm SP_PSW+1(%r15),0x01 # interrupting from user ?
  198. jz sysc_do_svc
  199. UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
  200. sysc_stime:
  201. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  202. sysc_update:
  203. mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
  204. #endif
  205. sysc_do_svc:
  206. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  207. slag %r7,%r7,2 # *4 and test for svc 0
  208. jnz sysc_nr_ok
  209. # svc 0: system call number in %r1
  210. cl %r1,BASED(.Lnr_syscalls)
  211. jnl sysc_nr_ok
  212. lgfr %r7,%r1 # clear high word in r1
  213. slag %r7,%r7,2 # svc 0: system call number in %r1
  214. sysc_nr_ok:
  215. mvc SP_ARGS(8,%r15),SP_R7(%r15)
  216. sysc_do_restart:
  217. larl %r10,sys_call_table
  218. #ifdef CONFIG_COMPAT
  219. tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
  220. jno sysc_noemu
  221. larl %r10,sys_call_table_emu # use 31 bit emulation system calls
  222. sysc_noemu:
  223. #endif
  224. tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
  225. lgf %r8,0(%r7,%r10) # load address of system call routine
  226. jnz sysc_tracesys
  227. basr %r14,%r8 # call sys_xxxx
  228. stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
  229. # ATTENTION: check sys_execve_glue before
  230. # changing anything here !!
  231. sysc_return:
  232. tm SP_PSW+1(%r15),0x01 # returning to user ?
  233. jno sysc_leave
  234. tm __TI_flags+7(%r9),_TIF_WORK_SVC
  235. jnz sysc_work # there is work to do (signals etc.)
  236. sysc_leave:
  237. RESTORE_ALL __LC_RETURN_PSW,1
  238. #
  239. # recheck if there is more work to do
  240. #
  241. sysc_work_loop:
  242. tm __TI_flags+7(%r9),_TIF_WORK_SVC
  243. jz sysc_leave # there is no work to do
  244. #
  245. # One of the work bits is on. Find out which one.
  246. #
  247. sysc_work:
  248. tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
  249. jo sysc_mcck_pending
  250. tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
  251. jo sysc_reschedule
  252. tm __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
  253. jnz sysc_sigpending
  254. tm __TI_flags+7(%r9),_TIF_RESTART_SVC
  255. jo sysc_restart
  256. tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
  257. jo sysc_singlestep
  258. j sysc_leave
  259. #
  260. # _TIF_NEED_RESCHED is set, call schedule
  261. #
  262. sysc_reschedule:
  263. larl %r14,sysc_work_loop
  264. jg schedule # return point is sysc_return
  265. #
  266. # _TIF_MCCK_PENDING is set, call handler
  267. #
  268. sysc_mcck_pending:
  269. larl %r14,sysc_work_loop
  270. jg s390_handle_mcck # TIF bit will be cleared by handler
  271. #
  272. # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
  273. #
  274. sysc_sigpending:
  275. ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
  276. la %r2,SP_PTREGS(%r15) # load pt_regs
  277. brasl %r14,do_signal # call do_signal
  278. tm __TI_flags+7(%r9),_TIF_RESTART_SVC
  279. jo sysc_restart
  280. tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
  281. jo sysc_singlestep
  282. j sysc_work_loop
  283. #
  284. # _TIF_RESTART_SVC is set, set up registers and restart svc
  285. #
  286. sysc_restart:
  287. ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
  288. lg %r7,SP_R2(%r15) # load new svc number
  289. slag %r7,%r7,2 # *4
  290. mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
  291. lmg %r2,%r6,SP_R2(%r15) # load svc arguments
  292. j sysc_do_restart # restart svc
  293. #
  294. # _TIF_SINGLE_STEP is set, call do_single_step
  295. #
  296. sysc_singlestep:
  297. ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
  298. lhi %r0,__LC_PGM_OLD_PSW
  299. sth %r0,SP_TRAP(%r15) # set trap indication to pgm check
  300. la %r2,SP_PTREGS(%r15) # address of register-save area
  301. larl %r14,sysc_return # load adr. of system return
  302. jg do_single_step # branch to do_sigtrap
  303. #
  304. # call syscall_trace before and after system call
  305. # special linkage: %r12 contains the return address for trace_svc
  306. #
  307. sysc_tracesys:
  308. la %r2,SP_PTREGS(%r15) # load pt_regs
  309. la %r3,0
  310. srl %r7,2
  311. stg %r7,SP_R2(%r15)
  312. brasl %r14,syscall_trace
  313. lghi %r0,NR_syscalls
  314. clg %r0,SP_R2(%r15)
  315. jnh sysc_tracenogo
  316. lg %r7,SP_R2(%r15) # strace might have changed the
  317. sll %r7,2 # system call
  318. lgf %r8,0(%r7,%r10)
  319. sysc_tracego:
  320. lmg %r3,%r6,SP_R3(%r15)
  321. lg %r2,SP_ORIG_R2(%r15)
  322. basr %r14,%r8 # call sys_xxx
  323. stg %r2,SP_R2(%r15) # store return value
  324. sysc_tracenogo:
  325. tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
  326. jz sysc_return
  327. la %r2,SP_PTREGS(%r15) # load pt_regs
  328. la %r3,1
  329. larl %r14,sysc_return # return point is sysc_return
  330. jg syscall_trace
  331. #
  332. # a new process exits the kernel with ret_from_fork
  333. #
  334. .globl ret_from_fork
  335. ret_from_fork:
  336. lg %r13,__LC_SVC_NEW_PSW+8
  337. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  338. tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
  339. jo 0f
  340. stg %r15,SP_R15(%r15) # store stack pointer for new kthread
  341. 0: brasl %r14,schedule_tail
  342. TRACE_IRQS_ON
  343. stosm 24(%r15),0x03 # reenable interrupts
  344. j sysc_return
  345. #
  346. # clone, fork, vfork, exec and sigreturn need glue,
  347. # because they all expect pt_regs as parameter,
  348. # but are called with different parameter.
  349. # return-address is set up above
  350. #
  351. sys_clone_glue:
  352. la %r2,SP_PTREGS(%r15) # load pt_regs
  353. jg sys_clone # branch to sys_clone
  354. #ifdef CONFIG_COMPAT
  355. sys32_clone_glue:
  356. la %r2,SP_PTREGS(%r15) # load pt_regs
  357. jg sys32_clone # branch to sys32_clone
  358. #endif
  359. sys_fork_glue:
  360. la %r2,SP_PTREGS(%r15) # load pt_regs
  361. jg sys_fork # branch to sys_fork
  362. sys_vfork_glue:
  363. la %r2,SP_PTREGS(%r15) # load pt_regs
  364. jg sys_vfork # branch to sys_vfork
  365. sys_execve_glue:
  366. la %r2,SP_PTREGS(%r15) # load pt_regs
  367. lgr %r12,%r14 # save return address
  368. brasl %r14,sys_execve # call sys_execve
  369. ltgr %r2,%r2 # check if execve failed
  370. bnz 0(%r12) # it did fail -> store result in gpr2
  371. b 6(%r12) # SKIP STG 2,SP_R2(15) in
  372. # system_call/sysc_tracesys
  373. #ifdef CONFIG_COMPAT
  374. sys32_execve_glue:
  375. la %r2,SP_PTREGS(%r15) # load pt_regs
  376. lgr %r12,%r14 # save return address
  377. brasl %r14,sys32_execve # call sys32_execve
  378. ltgr %r2,%r2 # check if execve failed
  379. bnz 0(%r12) # it did fail -> store result in gpr2
  380. b 6(%r12) # SKIP STG 2,SP_R2(15) in
  381. # system_call/sysc_tracesys
  382. #endif
  383. sys_sigreturn_glue:
  384. la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
  385. jg sys_sigreturn # branch to sys_sigreturn
  386. #ifdef CONFIG_COMPAT
  387. sys32_sigreturn_glue:
  388. la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
  389. jg sys32_sigreturn # branch to sys32_sigreturn
  390. #endif
  391. sys_rt_sigreturn_glue:
  392. la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
  393. jg sys_rt_sigreturn # branch to sys_sigreturn
  394. #ifdef CONFIG_COMPAT
  395. sys32_rt_sigreturn_glue:
  396. la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
  397. jg sys32_rt_sigreturn # branch to sys32_sigreturn
  398. #endif
  399. sys_sigaltstack_glue:
  400. la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
  401. jg sys_sigaltstack # branch to sys_sigreturn
  402. #ifdef CONFIG_COMPAT
  403. sys32_sigaltstack_glue:
  404. la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
  405. jg sys32_sigaltstack_wrapper # branch to sys_sigreturn
  406. #endif
  407. /*
  408. * Program check handler routine
  409. */
  410. .globl pgm_check_handler
  411. pgm_check_handler:
  412. /*
  413. * First we need to check for a special case:
  414. * Single stepping an instruction that disables the PER event mask will
  415. * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
  416. * For a single stepped SVC the program check handler gets control after
  417. * the SVC new PSW has been loaded. But we want to execute the SVC first and
  418. * then handle the PER event. Therefore we update the SVC old PSW to point
  419. * to the pgm_check_handler and branch to the SVC handler after we checked
  420. * if we have to load the kernel stack register.
  421. * For every other possible cause for PER event without the PER mask set
  422. * we just ignore the PER event (FIXME: is there anything we have to do
  423. * for LPSW?).
  424. */
  425. STORE_TIMER __LC_SYNC_ENTER_TIMER
  426. SAVE_ALL_BASE __LC_SAVE_AREA
  427. tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
  428. jnz pgm_per # got per exception -> special case
  429. SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
  430. CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
  431. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  432. tm SP_PSW+1(%r15),0x01 # interrupting from user ?
  433. jz pgm_no_vtime
  434. UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
  435. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  436. mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
  437. pgm_no_vtime:
  438. #endif
  439. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  440. lgf %r3,__LC_PGM_ILC # load program interruption code
  441. lghi %r8,0x7f
  442. ngr %r8,%r3
  443. pgm_do_call:
  444. sll %r8,3
  445. larl %r1,pgm_check_table
  446. lg %r1,0(%r8,%r1) # load address of handler routine
  447. la %r2,SP_PTREGS(%r15) # address of register-save area
  448. larl %r14,sysc_return
  449. br %r1 # branch to interrupt-handler
  450. #
  451. # handle per exception
  452. #
  453. pgm_per:
  454. tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
  455. jnz pgm_per_std # ok, normal per event from user space
  456. # ok its one of the special cases, now we need to find out which one
  457. clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
  458. je pgm_svcper
  459. # no interesting special case, ignore PER event
  460. lmg %r12,%r15,__LC_SAVE_AREA
  461. lpswe __LC_PGM_OLD_PSW
  462. #
  463. # Normal per exception
  464. #
  465. pgm_per_std:
  466. SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
  467. CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
  468. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  469. tm SP_PSW+1(%r15),0x01 # interrupting from user ?
  470. jz pgm_no_vtime2
  471. UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
  472. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  473. mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
  474. pgm_no_vtime2:
  475. #endif
  476. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  477. lg %r1,__TI_task(%r9)
  478. tm SP_PSW+1(%r15),0x01 # kernel per event ?
  479. jz kernel_per
  480. mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
  481. mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
  482. mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
  483. oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
  484. lgf %r3,__LC_PGM_ILC # load program interruption code
  485. lghi %r8,0x7f
  486. ngr %r8,%r3 # clear per-event-bit and ilc
  487. je sysc_return
  488. j pgm_do_call
  489. #
  490. # it was a single stepped SVC that is causing all the trouble
  491. #
  492. pgm_svcper:
  493. SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
  494. CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
  495. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  496. tm SP_PSW+1(%r15),0x01 # interrupting from user ?
  497. jz pgm_no_vtime3
  498. UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
  499. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  500. mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
  501. pgm_no_vtime3:
  502. #endif
  503. llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
  504. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  505. lg %r1,__TI_task(%r9)
  506. mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
  507. mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
  508. mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
  509. oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
  510. TRACE_IRQS_ON
  511. stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
  512. j sysc_do_svc
  513. #
  514. # per was called from kernel, must be kprobes
  515. #
  516. kernel_per:
  517. lhi %r0,__LC_PGM_OLD_PSW
  518. sth %r0,SP_TRAP(%r15) # set trap indication to pgm check
  519. la %r2,SP_PTREGS(%r15) # address of register-save area
  520. larl %r14,sysc_leave # load adr. of system ret, no work
  521. jg do_single_step # branch to do_single_step
  522. /*
  523. * IO interrupt handler routine
  524. */
  525. .globl io_int_handler
  526. io_int_handler:
  527. STORE_TIMER __LC_ASYNC_ENTER_TIMER
  528. stck __LC_INT_CLOCK
  529. SAVE_ALL_BASE __LC_SAVE_AREA+32
  530. SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
  531. CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
  532. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  533. tm SP_PSW+1(%r15),0x01 # interrupting from user ?
  534. jz io_no_vtime
  535. UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
  536. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  537. mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
  538. io_no_vtime:
  539. #endif
  540. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  541. TRACE_IRQS_OFF
  542. la %r2,SP_PTREGS(%r15) # address of register-save area
  543. brasl %r14,do_IRQ # call standard irq handler
  544. TRACE_IRQS_ON
  545. io_return:
  546. tm SP_PSW+1(%r15),0x01 # returning to user ?
  547. #ifdef CONFIG_PREEMPT
  548. jno io_preempt # no -> check for preemptive scheduling
  549. #else
  550. jno io_leave # no-> skip resched & signal
  551. #endif
  552. tm __TI_flags+7(%r9),_TIF_WORK_INT
  553. jnz io_work # there is work to do (signals etc.)
  554. io_leave:
  555. RESTORE_ALL __LC_RETURN_PSW,0
  556. io_done:
  557. #ifdef CONFIG_PREEMPT
  558. io_preempt:
  559. icm %r0,15,__TI_precount(%r9)
  560. jnz io_leave
  561. # switch to kernel stack
  562. lg %r1,SP_R15(%r15)
  563. aghi %r1,-SP_SIZE
  564. mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
  565. xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
  566. lgr %r15,%r1
  567. io_resume_loop:
  568. tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
  569. jno io_leave
  570. larl %r1,.Lc_pactive
  571. mvc __TI_precount(4,%r9),0(%r1)
  572. stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
  573. brasl %r14,schedule # call schedule
  574. stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
  575. xc __TI_precount(4,%r9),__TI_precount(%r9)
  576. j io_resume_loop
  577. #endif
  578. #
  579. # switch to kernel stack, then check TIF bits
  580. #
  581. io_work:
  582. lg %r1,__LC_KERNEL_STACK
  583. aghi %r1,-SP_SIZE
  584. mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
  585. xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
  586. lgr %r15,%r1
  587. #
  588. # One of the work bits is on. Find out which one.
  589. # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED
  590. # and _TIF_MCCK_PENDING
  591. #
  592. io_work_loop:
  593. tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
  594. jo io_mcck_pending
  595. tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
  596. jo io_reschedule
  597. tm __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
  598. jnz io_sigpending
  599. j io_leave
  600. #
  601. # _TIF_MCCK_PENDING is set, call handler
  602. #
  603. io_mcck_pending:
  604. larl %r14,io_work_loop
  605. jg s390_handle_mcck # TIF bit will be cleared by handler
  606. #
  607. # _TIF_NEED_RESCHED is set, call schedule
  608. #
  609. io_reschedule:
  610. stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
  611. brasl %r14,schedule # call scheduler
  612. stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
  613. tm __TI_flags+7(%r9),_TIF_WORK_INT
  614. jz io_leave # there is no work to do
  615. j io_work_loop
  616. #
  617. # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
  618. #
  619. io_sigpending:
  620. stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
  621. la %r2,SP_PTREGS(%r15) # load pt_regs
  622. brasl %r14,do_signal # call do_signal
  623. stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
  624. j io_work_loop
  625. /*
  626. * External interrupt handler routine
  627. */
  628. .globl ext_int_handler
  629. ext_int_handler:
  630. STORE_TIMER __LC_ASYNC_ENTER_TIMER
  631. stck __LC_INT_CLOCK
  632. SAVE_ALL_BASE __LC_SAVE_AREA+32
  633. SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
  634. CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
  635. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  636. tm SP_PSW+1(%r15),0x01 # interrupting from user ?
  637. jz ext_no_vtime
  638. UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
  639. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  640. mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
  641. ext_no_vtime:
  642. #endif
  643. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  644. TRACE_IRQS_OFF
  645. la %r2,SP_PTREGS(%r15) # address of register-save area
  646. llgh %r3,__LC_EXT_INT_CODE # get interruption code
  647. brasl %r14,do_extint
  648. TRACE_IRQS_ON
  649. j io_return
  650. __critical_end:
  651. /*
  652. * Machine check handler routines
  653. */
  654. .globl mcck_int_handler
  655. mcck_int_handler:
  656. la %r1,4095 # revalidate r1
  657. spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
  658. lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
  659. SAVE_ALL_BASE __LC_SAVE_AREA+64
  660. la %r12,__LC_MCK_OLD_PSW
  661. tm __LC_MCCK_CODE,0x80 # system damage?
  662. jo mcck_int_main # yes -> rest of mcck code invalid
  663. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  664. la %r14,4095
  665. mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
  666. mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
  667. tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
  668. jo 1f
  669. la %r14,__LC_SYNC_ENTER_TIMER
  670. clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
  671. jl 0f
  672. la %r14,__LC_ASYNC_ENTER_TIMER
  673. 0: clc 0(8,%r14),__LC_EXIT_TIMER
  674. jl 0f
  675. la %r14,__LC_EXIT_TIMER
  676. 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
  677. jl 0f
  678. la %r14,__LC_LAST_UPDATE_TIMER
  679. 0: spt 0(%r14)
  680. mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
  681. 1:
  682. #endif
  683. tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
  684. jno mcck_int_main # no -> skip cleanup critical
  685. tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
  686. jnz mcck_int_main # from user -> load kernel stack
  687. clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
  688. jhe mcck_int_main
  689. clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
  690. jl mcck_int_main
  691. brasl %r14,cleanup_critical
  692. mcck_int_main:
  693. lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
  694. slgr %r14,%r15
  695. srag %r14,%r14,PAGE_SHIFT
  696. jz 0f
  697. lg %r15,__LC_PANIC_STACK # load panic stack
  698. 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
  699. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  700. tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
  701. jno mcck_no_vtime # no -> no timer update
  702. tm SP_PSW+1(%r15),0x01 # interrupting from user ?
  703. jz mcck_no_vtime
  704. UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
  705. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  706. mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
  707. mcck_no_vtime:
  708. #endif
  709. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  710. la %r2,SP_PTREGS(%r15) # load pt_regs
  711. brasl %r14,s390_do_machine_check
  712. tm SP_PSW+1(%r15),0x01 # returning to user ?
  713. jno mcck_return
  714. lg %r1,__LC_KERNEL_STACK # switch to kernel stack
  715. aghi %r1,-SP_SIZE
  716. mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
  717. xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
  718. lgr %r15,%r1
  719. stosm __SF_EMPTY(%r15),0x04 # turn dat on
  720. tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
  721. jno mcck_return
  722. TRACE_IRQS_OFF
  723. brasl %r14,s390_handle_mcck
  724. TRACE_IRQS_ON
  725. mcck_return:
  726. mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
  727. ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
  728. lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
  729. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  730. mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
  731. tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
  732. jno 0f
  733. stpt __LC_EXIT_TIMER
  734. 0:
  735. #endif
  736. lpswe __LC_RETURN_MCCK_PSW # back to caller
  737. #ifdef CONFIG_SMP
  738. /*
  739. * Restart interruption handler, kick starter for additional CPUs
  740. */
  741. .globl restart_int_handler
  742. restart_int_handler:
  743. lg %r15,__LC_SAVE_AREA+120 # load ksp
  744. lghi %r10,__LC_CREGS_SAVE_AREA
  745. lctlg %c0,%c15,0(%r10) # get new ctl regs
  746. lghi %r10,__LC_AREGS_SAVE_AREA
  747. lam %a0,%a15,0(%r10)
  748. lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
  749. stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
  750. jg start_secondary
  751. #else
  752. /*
  753. * If we do not run with SMP enabled, let the new CPU crash ...
  754. */
  755. .globl restart_int_handler
  756. restart_int_handler:
  757. basr %r1,0
  758. restart_base:
  759. lpswe restart_crash-restart_base(%r1)
  760. .align 8
  761. restart_crash:
  762. .long 0x000a0000,0x00000000,0x00000000,0x00000000
  763. restart_go:
  764. #endif
  765. #ifdef CONFIG_CHECK_STACK
  766. /*
  767. * The synchronous or the asynchronous stack overflowed. We are dead.
  768. * No need to properly save the registers, we are going to panic anyway.
  769. * Setup a pt_regs so that show_trace can provide a good call trace.
  770. */
  771. stack_overflow:
  772. lg %r15,__LC_PANIC_STACK # change to panic stack
  773. aghi %r15,-SP_SIZE
  774. mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
  775. stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
  776. la %r1,__LC_SAVE_AREA
  777. chi %r12,__LC_SVC_OLD_PSW
  778. je 0f
  779. chi %r12,__LC_PGM_OLD_PSW
  780. je 0f
  781. la %r1,__LC_SAVE_AREA+32
  782. 0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
  783. xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
  784. la %r2,SP_PTREGS(%r15) # load pt_regs
  785. jg kernel_stack_overflow
  786. #endif
  787. cleanup_table_system_call:
  788. .quad system_call, sysc_do_svc
  789. cleanup_table_sysc_return:
  790. .quad sysc_return, sysc_leave
  791. cleanup_table_sysc_leave:
  792. .quad sysc_leave, sysc_work_loop
  793. cleanup_table_sysc_work_loop:
  794. .quad sysc_work_loop, sysc_reschedule
  795. cleanup_table_io_return:
  796. .quad io_return, io_leave
  797. cleanup_table_io_leave:
  798. .quad io_leave, io_done
  799. cleanup_table_io_work_loop:
  800. .quad io_work_loop, io_mcck_pending
  801. cleanup_critical:
  802. clc 8(8,%r12),BASED(cleanup_table_system_call)
  803. jl 0f
  804. clc 8(8,%r12),BASED(cleanup_table_system_call+8)
  805. jl cleanup_system_call
  806. 0:
  807. clc 8(8,%r12),BASED(cleanup_table_sysc_return)
  808. jl 0f
  809. clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
  810. jl cleanup_sysc_return
  811. 0:
  812. clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
  813. jl 0f
  814. clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
  815. jl cleanup_sysc_leave
  816. 0:
  817. clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
  818. jl 0f
  819. clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
  820. jl cleanup_sysc_return
  821. 0:
  822. clc 8(8,%r12),BASED(cleanup_table_io_return)
  823. jl 0f
  824. clc 8(8,%r12),BASED(cleanup_table_io_return+8)
  825. jl cleanup_io_return
  826. 0:
  827. clc 8(8,%r12),BASED(cleanup_table_io_leave)
  828. jl 0f
  829. clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
  830. jl cleanup_io_leave
  831. 0:
  832. clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
  833. jl 0f
  834. clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
  835. jl cleanup_io_return
  836. 0:
  837. br %r14
  838. cleanup_system_call:
  839. mvc __LC_RETURN_PSW(16),0(%r12)
  840. cghi %r12,__LC_MCK_OLD_PSW
  841. je 0f
  842. la %r12,__LC_SAVE_AREA+32
  843. j 1f
  844. 0: la %r12,__LC_SAVE_AREA+64
  845. 1:
  846. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  847. clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
  848. jh 0f
  849. mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
  850. 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
  851. jhe cleanup_vtime
  852. #endif
  853. clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
  854. jh 0f
  855. mvc __LC_SAVE_AREA(32),0(%r12)
  856. 0: stg %r13,8(%r12)
  857. stg %r12,__LC_SAVE_AREA+96 # argh
  858. SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
  859. CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
  860. lg %r12,__LC_SAVE_AREA+96 # argh
  861. stg %r15,24(%r12)
  862. llgh %r7,__LC_SVC_INT_CODE
  863. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  864. cleanup_vtime:
  865. clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
  866. jhe cleanup_stime
  867. tm SP_PSW+1(%r15),0x01 # interrupting from user ?
  868. jz cleanup_novtime
  869. UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
  870. cleanup_stime:
  871. clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
  872. jh cleanup_update
  873. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  874. cleanup_update:
  875. mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
  876. cleanup_novtime:
  877. #endif
  878. mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
  879. la %r12,__LC_RETURN_PSW
  880. br %r14
  881. cleanup_system_call_insn:
  882. .quad sysc_saveall
  883. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  884. .quad system_call
  885. .quad sysc_vtime
  886. .quad sysc_stime
  887. .quad sysc_update
  888. #endif
  889. cleanup_sysc_return:
  890. mvc __LC_RETURN_PSW(8),0(%r12)
  891. mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
  892. la %r12,__LC_RETURN_PSW
  893. br %r14
  894. cleanup_sysc_leave:
  895. clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
  896. je 2f
  897. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  898. mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
  899. clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
  900. je 2f
  901. #endif
  902. mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
  903. cghi %r12,__LC_MCK_OLD_PSW
  904. jne 0f
  905. mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
  906. j 1f
  907. 0: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
  908. 1: lmg %r0,%r11,SP_R0(%r15)
  909. lg %r15,SP_R15(%r15)
  910. 2: la %r12,__LC_RETURN_PSW
  911. br %r14
  912. cleanup_sysc_leave_insn:
  913. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  914. .quad sysc_leave + 16
  915. #endif
  916. .quad sysc_leave + 12
  917. cleanup_io_return:
  918. mvc __LC_RETURN_PSW(8),0(%r12)
  919. mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
  920. la %r12,__LC_RETURN_PSW
  921. br %r14
  922. cleanup_io_leave:
  923. clc 8(8,%r12),BASED(cleanup_io_leave_insn)
  924. je 2f
  925. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  926. mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
  927. clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
  928. je 2f
  929. #endif
  930. mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
  931. cghi %r12,__LC_MCK_OLD_PSW
  932. jne 0f
  933. mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
  934. j 1f
  935. 0: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
  936. 1: lmg %r0,%r11,SP_R0(%r15)
  937. lg %r15,SP_R15(%r15)
  938. 2: la %r12,__LC_RETURN_PSW
  939. br %r14
  940. cleanup_io_leave_insn:
  941. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  942. .quad io_leave + 20
  943. #endif
  944. .quad io_leave + 16
  945. /*
  946. * Integer constants
  947. */
  948. .align 4
  949. .Lconst:
  950. .Lc_pactive: .long PREEMPT_ACTIVE
  951. .Lnr_syscalls: .long NR_syscalls
  952. .L0x0130: .short 0x130
  953. .L0x0140: .short 0x140
  954. .L0x0150: .short 0x150
  955. .L0x0160: .short 0x160
  956. .L0x0170: .short 0x170
  957. .Lcritical_start:
  958. .quad __critical_start
  959. .Lcritical_end:
  960. .quad __critical_end
  961. .section .rodata, "a"
  962. #define SYSCALL(esa,esame,emu) .long esame
  963. sys_call_table:
  964. #include "syscalls.S"
  965. #undef SYSCALL
  966. #ifdef CONFIG_COMPAT
  967. #define SYSCALL(esa,esame,emu) .long emu
  968. sys_call_table_emu:
  969. #include "syscalls.S"
  970. #undef SYSCALL
  971. #endif