copypage-v4wb.S 2.2 KB

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  1. /*
  2. * linux/arch/arm/lib/copypage.S
  3. *
  4. * Copyright (C) 1995-1999 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * ASM optimised string functions
  11. */
  12. #include <linux/linkage.h>
  13. #include <linux/init.h>
  14. #include <asm/asm-offsets.h>
  15. .text
  16. .align 5
  17. /*
  18. * ARMv4 optimised copy_user_page
  19. *
  20. * We flush the destination cache lines just before we write the data into the
  21. * corresponding address. Since the Dcache is read-allocate, this removes the
  22. * Dcache aliasing issue. The writes will be forwarded to the write buffer,
  23. * and merged as appropriate.
  24. *
  25. * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
  26. * instruction. If your processor does not supply this, you have to write your
  27. * own copy_user_page that does the right thing.
  28. */
  29. ENTRY(v4wb_copy_user_page)
  30. stmfd sp!, {r4, lr} @ 2
  31. mov r2, #PAGE_SZ/64 @ 1
  32. ldmia r1!, {r3, r4, ip, lr} @ 4
  33. 1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
  34. stmia r0!, {r3, r4, ip, lr} @ 4
  35. ldmia r1!, {r3, r4, ip, lr} @ 4+1
  36. stmia r0!, {r3, r4, ip, lr} @ 4
  37. ldmia r1!, {r3, r4, ip, lr} @ 4
  38. mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
  39. stmia r0!, {r3, r4, ip, lr} @ 4
  40. ldmia r1!, {r3, r4, ip, lr} @ 4
  41. subs r2, r2, #1 @ 1
  42. stmia r0!, {r3, r4, ip, lr} @ 4
  43. ldmneia r1!, {r3, r4, ip, lr} @ 4
  44. bne 1b @ 1
  45. mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB
  46. ldmfd sp!, {r4, pc} @ 3
  47. .align 5
  48. /*
  49. * ARMv4 optimised clear_user_page
  50. *
  51. * Same story as above.
  52. */
  53. ENTRY(v4wb_clear_user_page)
  54. str lr, [sp, #-4]!
  55. mov r1, #PAGE_SZ/64 @ 1
  56. mov r2, #0 @ 1
  57. mov r3, #0 @ 1
  58. mov ip, #0 @ 1
  59. mov lr, #0 @ 1
  60. 1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
  61. stmia r0!, {r2, r3, ip, lr} @ 4
  62. stmia r0!, {r2, r3, ip, lr} @ 4
  63. mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
  64. stmia r0!, {r2, r3, ip, lr} @ 4
  65. stmia r0!, {r2, r3, ip, lr} @ 4
  66. subs r1, r1, #1 @ 1
  67. bne 1b @ 1
  68. mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB
  69. ldr pc, [sp], #4
  70. __INITDATA
  71. .type v4wb_user_fns, #object
  72. ENTRY(v4wb_user_fns)
  73. .long v4wb_clear_user_page
  74. .long v4wb_copy_user_page
  75. .size v4wb_user_fns, . - v4wb_user_fns