versatile_pb.c 2.8 KB

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  1. /*
  2. * linux/arch/arm/mach-versatile/versatile_pb.c
  3. *
  4. * Copyright (C) 2004 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/init.h>
  22. #include <linux/device.h>
  23. #include <linux/sysdev.h>
  24. #include <linux/amba/bus.h>
  25. #include <asm/hardware.h>
  26. #include <asm/io.h>
  27. #include <asm/irq.h>
  28. #include <asm/mach-types.h>
  29. #include <asm/mach/arch.h>
  30. #include <asm/mach/mmc.h>
  31. #include "core.h"
  32. #if 1
  33. #define IRQ_MMCI1A IRQ_VICSOURCE23
  34. #else
  35. #define IRQ_MMCI1A IRQ_SIC_MMCI1A
  36. #endif
  37. static struct mmc_platform_data mmc1_plat_data = {
  38. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  39. .status = mmc_status,
  40. };
  41. #define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ }
  42. #define UART3_DMA { 0x86, 0x87 }
  43. #define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ }
  44. #define SCI1_DMA { 0x88, 0x89 }
  45. #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B }
  46. #define MMCI1_DMA { 0x85, 0 }
  47. /*
  48. * These devices are connected via the core APB bridge
  49. */
  50. #define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ }
  51. #define GPIO2_DMA { 0, 0 }
  52. #define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ }
  53. #define GPIO3_DMA { 0, 0 }
  54. /*
  55. * These devices are connected via the DMA APB bridge
  56. */
  57. /* FPGA Primecells */
  58. AMBA_DEVICE(uart3, "fpga:09", UART3, NULL);
  59. AMBA_DEVICE(sci1, "fpga:0a", SCI1, NULL);
  60. AMBA_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data);
  61. /* DevChip Primecells */
  62. AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
  63. AMBA_DEVICE(gpio3, "dev:e7", GPIO3, NULL);
  64. static struct amba_device *amba_devs[] __initdata = {
  65. &uart3_device,
  66. &gpio2_device,
  67. &gpio3_device,
  68. &sci1_device,
  69. &mmc1_device,
  70. };
  71. static void __init versatile_pb_init(void)
  72. {
  73. int i;
  74. versatile_init();
  75. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  76. struct amba_device *d = amba_devs[i];
  77. amba_device_register(d, &iomem_resource);
  78. }
  79. }
  80. MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
  81. /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
  82. .phys_io = 0x101f1000,
  83. .io_pg_offst = ((0xf11f1000) >> 18) & 0xfffc,
  84. .boot_params = 0x00000100,
  85. .map_io = versatile_map_io,
  86. .init_irq = versatile_init_irq,
  87. .timer = &versatile_timer,
  88. .init_machine = versatile_pb_init,
  89. MACHINE_END