dma-sysfs.c 6.4 KB

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  1. /* linux/arch/arm/mach-bast/dma-sysfs.c
  2. *
  3. * (c) 2005 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2440 DMA core sysfs interface
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/sched.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/sysdev.h>
  19. #include <linux/config.h>
  20. #include <asm/system.h>
  21. #include <asm/irq.h>
  22. #include <asm/hardware.h>
  23. #include <asm/io.h>
  24. #include <asm/dma.h>
  25. #include <asm/mach/dma.h>
  26. #include <asm/arch/map.h>
  27. extern struct sysdev_class dma_sysclass;
  28. extern s3c24xx_dma_chan_t s3c24xx_chans[S3C24XX_DMA_CHANNELS];
  29. #define dma_rdreg(chan, reg) readl((chan)->regs + (reg))
  30. static const char *s3c24xx_dma_decode_state(s3c24xx_dma_state_t state)
  31. {
  32. switch (state) {
  33. case S3C24XX_DMA_IDLE:
  34. return "Idle";
  35. case S3C24XX_DMA_RUNNING:
  36. return "Running";
  37. case S3C24XX_DMA_PAUSED:
  38. return "Paused";
  39. default:
  40. return "Invalid";
  41. }
  42. return NULL;
  43. }
  44. static const char *s3c24xx_dma_decode_loadstate(s3c24xx_dma_loadst_t state)
  45. {
  46. switch (state) {
  47. case S3C24XX_DMALOAD_NONE:
  48. return "Nothing Loaded";
  49. case S3C24XX_DMALOAD_1LOADED:
  50. return "1 Loaded";
  51. case S3C24XX_DMALOAD_1RUNNING:
  52. return "1 Running";
  53. case S3C24XX_DMALOAD_1LOADED_1RUNNING:
  54. return "1 Loaded, 1 Running";
  55. default:
  56. return "Invalid Load State";
  57. }
  58. return NULL;
  59. }
  60. static const char *s3c24xx_dma_decode_source(s3c24xx_dmasrc_t source)
  61. {
  62. switch (source) {
  63. case S3C24XX_DMASRC_HW:
  64. return "Hardware";
  65. case S3C24XX_DMASRC_MEM:
  66. return "Memory";
  67. default:
  68. return "Unknown Source";
  69. }
  70. return NULL;
  71. }
  72. struct outbuff {
  73. char *buff;
  74. int offset;
  75. int size;
  76. };
  77. static inline void outbuf_init(struct outbuff *ob, char *buf, int size)
  78. {
  79. ob->buff = buf;
  80. ob->offset = 0;
  81. ob->size = size;
  82. }
  83. static void outbuf_pf(struct outbuff *ob, const char *fmt, ...)
  84. {
  85. va_list va;
  86. va_start(va, fmt);
  87. ob->offset += vsnprintf(ob->buff + ob->offset,
  88. ob->size - ob->offset,
  89. fmt, va);
  90. va_end(va);
  91. }
  92. static void dma_sysfs_showregs(s3c24xx_dma_chan_t *chan, struct outbuff *buf)
  93. {
  94. outbuf_pf(buf, "Hardware Registers:\n\n");
  95. outbuf_pf(buf, " DISRC \t\t\t%08lx\n", readl(chan->regs + 0x00));
  96. outbuf_pf(buf, " DISRCC\t\t\t%08lx\n", readl(chan->regs + 0x04));
  97. outbuf_pf(buf, " DIDST \t\t\t%08lx\n", readl(chan->regs + 0x08));
  98. outbuf_pf(buf, " DIDSTC\t\t\t%08lx\n", readl(chan->regs + 0x0C));
  99. outbuf_pf(buf, " DCON \t\t\t%08lx\n", readl(chan->regs + 0x10));
  100. outbuf_pf(buf, " DSTAT \t\t\t%08lx\n", readl(chan->regs + 0x14));
  101. outbuf_pf(buf, " DCSRC \t\t\t%08lx\n", readl(chan->regs + 0x18));
  102. outbuf_pf(buf, " DCDST \t\t\t%08lx\n", readl(chan->regs + 0x1c));
  103. outbuf_pf(buf, " DMTRG \t\t\t%08lx\n", readl(chan->regs + 0x20));
  104. }
  105. static void dma_sysfs_showbuf(s3c24xx_dma_chan_t *chan,
  106. struct outbuff *buf,
  107. s3c24xx_dma_buf_t *ptr)
  108. {
  109. if (ptr == NULL)
  110. return;
  111. outbuf_pf(buf, " buff %p: data=%08x, size=%08x, id=%08x\n",
  112. ptr, ptr->data, ptr->size, ptr->id);
  113. }
  114. static void dma_sysfs_showbuffers(s3c24xx_dma_chan_t *chan, struct outbuff *buf)
  115. {
  116. s3c24xx_dma_buf_t *ptr = chan->next;
  117. unsigned long flags;
  118. local_irq_save(flags);
  119. outbuf_pf(buf, "Current Buffer:\n");
  120. dma_sysfs_showbuf(chan, buf, chan->curr);
  121. outbuf_pf(buf, "\nBuffer Queue: %p -> %p\n", chan->next, chan->end);
  122. for (; ptr != NULL; ptr = ptr->next)
  123. dma_sysfs_showbuf(chan, buf, ptr);
  124. local_irq_restore(flags);
  125. }
  126. static void dma_sysfs_showstate(s3c24xx_dma_chan_t *chan, struct outbuff *buf)
  127. {
  128. outbuf_pf(buf, "IRQ:\t\t\t\t%d\n", chan->irq);
  129. outbuf_pf(buf, "Register Base:\t\t\t0x%08x\n", chan->regs);
  130. outbuf_pf(buf, "Address Register:\t\t0x%08lx\n", chan->addr_reg);
  131. outbuf_pf(buf, "Hardware Register:\t\t0x%08lx\n", chan->dev_addr);
  132. outbuf_pf(buf, "Load Timeout:\t\t\t0x%08x\n", chan->load_timeout);
  133. outbuf_pf(buf, "Data Source:\t\t\t%s\n",
  134. s3c24xx_dma_decode_source(chan->source));
  135. outbuf_pf(buf, "Channel State:\t\t\t%s (%d)\n",
  136. s3c24xx_dma_decode_state(chan->state), chan->state);
  137. outbuf_pf(buf, "Load State:\t\t\t%s (%d)\n",
  138. s3c24xx_dma_decode_loadstate(chan->load_state),
  139. chan->load_state);
  140. if (chan->client != NULL) {
  141. outbuf_pf(buf, "Claimed by:\t\t\t%s\n",
  142. chan->client->name);
  143. } else {
  144. outbuf_pf(buf, "Claimed by:\t\t\tNo-one\n");
  145. }
  146. }
  147. static inline s3c24xx_dma_chan_t *dev_to_chan(struct sys_device *dev)
  148. {
  149. return &s3c24xx_chans[dev->id];
  150. }
  151. static ssize_t dma_sysfs_show_regs(struct sys_device *dev, char *buf)
  152. {
  153. s3c24xx_dma_chan_t *cp = dev_to_chan(dev);
  154. struct outbuff buff;
  155. outbuf_init(&buff, buf, PAGE_SIZE);
  156. dma_sysfs_showregs(cp, &buff);
  157. return buff.offset;
  158. }
  159. static ssize_t dma_sysfs_show_state(struct sys_device *dev, char *buf)
  160. {
  161. s3c24xx_dma_chan_t *cp = dev_to_chan(dev);
  162. struct outbuff buff;
  163. outbuf_init(&buff, buf, PAGE_SIZE);
  164. dma_sysfs_showstate(cp, &buff);
  165. return buff.offset;
  166. }
  167. static ssize_t dma_sysfs_show_buffers(struct sys_device *dev, char *buf)
  168. {
  169. s3c24xx_dma_chan_t *cp = dev_to_chan(dev);
  170. struct outbuff buff;
  171. outbuf_init(&buff, buf, PAGE_SIZE);
  172. dma_sysfs_showbuffers(cp, &buff);
  173. return buff.offset;
  174. }
  175. static ssize_t dma_sysfs_show_all(struct sys_device *dev, char *buf)
  176. {
  177. s3c24xx_dma_chan_t *cp = dev_to_chan(dev);
  178. struct outbuff buff;
  179. outbuf_init(&buff, buf, PAGE_SIZE);
  180. dma_sysfs_showstate(cp, &buff);
  181. dma_sysfs_showregs(cp, &buff);
  182. dma_sysfs_showbuffers(cp, &buff);
  183. return buff.offset;
  184. }
  185. static SYSDEV_ATTR(all, S_IRUGO, dma_sysfs_show_all, NULL);
  186. static SYSDEV_ATTR(regs, S_IRUGO, dma_sysfs_show_regs, NULL);
  187. static SYSDEV_ATTR(state, S_IRUGO, dma_sysfs_show_state, NULL);
  188. static SYSDEV_ATTR(buffers, S_IRUGO, dma_sysfs_show_buffers, NULL);
  189. static struct sysdev_attribute *attrs[] = {
  190. &attr_all,
  191. &attr_regs,
  192. &attr_state,
  193. &attr_buffers,
  194. };
  195. static int dma_sysfs_attach(struct sys_device *dev)
  196. {
  197. int i;
  198. for (i = 0; i < ARRAY_SIZE(attrs); i++)
  199. sysdev_create_file(dev, attrs[i]);
  200. return 0;
  201. }
  202. static int dma_sysfs_remove(struct sys_device *dev)
  203. {
  204. int i;
  205. for (i = 0; i < ARRAY_SIZE(attrs); i++)
  206. sysdev_create_file(dev, attrs[i]);
  207. return 0;
  208. }
  209. static struct sysdev_driver dma_sysfs_driver = {
  210. .add = dma_sysfs_attach,
  211. .remove = dma_sysfs_remove,
  212. };
  213. static int __init s3c24xx_init_dma_sysfs(void)
  214. {
  215. printk("S3C24XX DMA sysfs support, (c) 2005 Simtec Electronics\n");
  216. return sysdev_driver_register(&dma_sysclass, &dma_sysfs_driver);
  217. }
  218. __initcall(s3c24xx_init_dma_sysfs);