123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434 |
- /* linux/arch/arm/mach-s3c2416/mach-smdk2416.c
- *
- * Copyright (c) 2007 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * Ryu Euiyoul <ryu.real@gmail.com>
- *
- * http://www.fluff.org/ben/smdk2443/
- *
- * Thanks to Samsung for the loan of an SMDK2416
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
- #include <linux/kernel.h>
- #include <linux/types.h>
- #include <linux/interrupt.h>
- #include <linux/list.h>
- #include <linux/timer.h>
- #include <linux/init.h>
- #include <linux/serial_core.h>
- #include <linux/platform_device.h>
- #include <asm/mach/arch.h>
- #include <asm/mach/map.h>
- #include <asm/mach/irq.h>
- #include <asm/setup.h>
- #include <asm/hardware.h>
- #include <asm/io.h>
- #include <asm/irq.h>
- #include <asm/mach-types.h>
- #include <asm/arch/regs-serial.h>
- #include <asm/arch/regs-gpio.h>
- #include <asm/arch/regs-gpioj.h>
- #include <asm/arch/regs-lcd.h>
- #include <asm/arch/regs-mem.h>
- #include <asm/arch/idle.h>
- #include <asm/arch/fb.h>
- #include <asm/plat-s3c24xx/s3c2410.h>
- #include <asm/plat-s3c24xx/s3c2440.h>
- #include <asm/plat-s3c24xx/clock.h>
- #include <asm/plat-s3c24xx/devs.h>
- #include <asm/plat-s3c24xx/cpu.h>
- #include <asm/plat-s3c24xx/common-smdk.h>
- #include <asm/arch/nand.h>
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
- #include <asm/arch/hsmmc.h>
- static struct map_desc smdk2416_iodesc[] __initdata = {
- IODESC_ENT(CS8900),
- };
- #define UCON S3C2410_UCON_DEFAULT | S3C2440_UCON_FCLK
- #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
- #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
- static struct s3c24xx_uart_clksrc smdk2416_serial_clocks[] = {
- [0] = {
- .name = "pclk",
- .divisor = 1,
- .min_baud = 0,
- .max_baud = 0,
- },
- [1] = {
- .name = "esysclk",
- .divisor = 1,
- .min_baud = 0,
- .max_baud = 0,
- }
- };
- static struct s3c2410_uartcfg smdk2416_uartcfgs[] __initdata = {
- [0] = {
- .hwport = 0,
- .flags = 0,
- .ucon = 0x3c5,
- .ulcon = 0x03,
- .ufcon = 0x51,
- },
- [1] = {
- .hwport = 1,
- .flags = 0,
- /* Use PCLK */
- .ucon = 0x3c5,
- //.ucon = 0xfc5,
- .ulcon = 0x03,
- .ufcon = 0x51,
- #ifndef CONFIG_QISDA_BK060B00
- .clocks = smdk2416_serial_clocks,
- .clocks_size = ARRAY_SIZE(smdk2416_serial_clocks),
- #endif
- },
- /* IR port */
- [2] = {
- .hwport = 2,
- .flags = 0,
- .ucon = 0x3c5,
- // .ucon = 0xfc5,
- .ulcon = 0x03,
- // .ulcon = 0x43,
- .ufcon = 0x51,
- .clocks = smdk2416_serial_clocks,
- .clocks_size = ARRAY_SIZE(smdk2416_serial_clocks),
- }
- };
- static struct platform_device *smdk2416_devices[] __initdata = {
- &s3c_device_spi0,
- &s3c_device_spi1,
- &s3c_device_wdt,
- &s3c_device_i2c,
- &s3c_device_lcd,
- &s3c_device_rtc,
- &s3c_device_adc,
- &s3c_device_iis,
- &s3c_device_usbgadget,
- &s3c_device_usb,
- &s3c_device_hsmmc0,
- &s3c_device_hsmmc1,
- //Qisda Tony 090324, add keypad [
- &s3c_device_keypad_qisda,
- //Qisda Tony 090324, add keypad ]
- //Qisda Tony 090406, add Auo touch i2c driver [
- &s3c_device_ts_iic,
- //Qisda Tony 090406, add Auo touch i2c driver ]
- };
- static struct s3c24xx_board smdk2416_board __initdata = {
- .devices = smdk2416_devices,
- .devices_count = ARRAY_SIZE(smdk2416_devices)
- };
- static void __init smdk2416_map_io(void)
- {
- s3c24xx_init_io(smdk2416_iodesc, ARRAY_SIZE(smdk2416_iodesc));
- s3c24xx_init_clocks(12000000);
- s3c24xx_init_uarts(smdk2416_uartcfgs, ARRAY_SIZE(smdk2416_uartcfgs));
- s3c24xx_set_board(&smdk2416_board);
- }
- static void smdk2416_cs89x0_set(void)
- {
- u32 val;
- val = readl(S3C_BANK_CFG);
- val &= ~((1<<8)|(1<<9)|(1<<10));
- writel(val, S3C_BANK_CFG);
- /* Bank1 Idle cycle ctrl. */
- writel(0xf, S3C_SSMC_SMBIDCYR1);
- /* Bank1 Read Wait State cont. = 14 clk Tacc? */
- writel(12, S3C_SSMC_SMBWSTRDR1);
- /* Bank1 Write Wait State ctrl. */
- writel(12, S3C_SSMC_SMBWSTWRR1);
- /* Bank1 Output Enable Assertion Delay ctrl. Tcho? */
- writel(2, S3C_SSMC_SMBWSTOENR1);
- /* Bank1 Write Enable Assertion Delay ctrl. */
- writel(2, S3C_SSMC_SMBWSTWENR1);
- /* SMWAIT active High, Read Byte Lane Enabl WS1? */
- val = readl(S3C_SSMC_SMBCR1);
- val |= ((1<<15)|(1<<7));
- writel(val, S3C_SSMC_SMBCR1);
- val = readl(S3C_SSMC_SMBCR1);
- val |= ((1<<2)|(1<<0));
- writel(val, S3C_SSMC_SMBCR1);
- val = readl(S3C_SSMC_SMBCR1);
- val &= ~((3<<20)|(3<<12));
- writel(val, S3C_SSMC_SMBCR1);
- val = readl(S3C_SSMC_SMBCR1);
- val &= ~(3<<4);
- writel(val, S3C_SSMC_SMBCR1);
- val = readl(S3C_SSMC_SMBCR1);
- val |= (1<<4);
- writel(val, S3C_SSMC_SMBCR1);
- }
- /* Qisda Mark Tsai, 2010/01/13 { */
- static void smdk2416_power_off(void)
- {
- printk("[smdk2416_power_off]T-CON Off\n");
- if(is_Epaper_Write_Ready())
- {
- //AUO T-CON Standby
- msleep(100);
- Epaper_Enter_Standby_Mode(1);
- msleep(100);
-
- //AUO T-CON Sleep
- Epaper_Enter_Sleep_Mode(1);
- msleep(5);
- //Shutdown T-CON Power
- Epaper_Power(0);
- //Shutdown i80 of s3c
- EPaper_CloseLcdPort();
- //msleep(1000);
- //u32PowerState = EN_EPD_DEVICE_POWER_STATE_D3;
- }
- printk("[smdk2416_power_off]Power Off\n");
- writeb(0x0, 0xc8a30029);
- msleep(100);
- #ifdef CONFIG_QISDA_BK060B00
- s3c2410_gpio_cfgpin(S3C2410_GPD14, S3C2410_GPG14_OUTP);
- s3c2410_gpio_setpin(S3C2410_GPG14, 0);
- #else
- s3c2410_gpio_cfgpin(S3C2410_GPG0, S3C2410_GPG0_OUTP);
- s3c2410_gpio_setpin(S3C2410_GPG0, 0);
- #endif
- }
- /* Qisda Mark Tsai, 2010/01/13 } */
- static void __init smdk2416_machine_init(void)
- {
- /* SROM init for NFS */
- smdk2416_cs89x0_set();
- smdk_machine_init();
- /* Qisda Mark Tsai, 2010/01/13 { */
- pm_power_off = smdk2416_power_off;
- /* Qisda Mark Tsai, 2010/01/13 } */
- }
- static void __init smdk2416_fixup (struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
- {
- /*
- * Bank start addresses are not present in the information
- * passed in from the boot loader. We could potentially
- * detect them, but instead we hard-code them.
- */
- mi->bank[0].start = 0x30000000;
- #if defined(CONFIG_VIDEO_SAMSUNG)
- mi->bank[0].size = 49*1024*1024;
- #elif defined(CONFIG_PP_S3C2443)
- mi->bank[0].size = 60*1024*1024;
- #else
- /*Qisda Qube for 128MB*/
- #if defined(CONFIG_QISDA_E600_EVT2) || defined(CONFIG_QISDA_AS090B00_EVT1) || defined (CONFIG_QISDA_AS090B00_EVT1_1) || defined (CONFIG_QISDA_QD060N00_DVT1_1) ||defined (CONFIG_QISDA_L600) || defined (CONFIG_QISDA_QD090B00_EVT1)
- mi->bank[0].size = 128*1024*1024;
- #else
- mi->bank[0].size = 64*1024*1024;
- #endif
- /*Qisda Qube for 128MB*/
- #endif
- mi->bank[0].node = 0;
- mi->nr_banks = 1;
- }
- MACHINE_START(SMDK2416, "SMDK2416")
- /* Maintainer: Ben Dooks <ben@fluff.org> */
- .phys_io = S3C2410_PA_UART,
- .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
- .boot_params = S3C2410_SDRAM_PA + 0x100,
- .init_irq = s3c24xx_init_irq,
- .map_io = smdk2416_map_io,
- .fixup = smdk2416_fixup,
- .init_machine = smdk2416_machine_init,
- .timer = &s3c24xx_timer,
- MACHINE_END
- /*
- * HS-MMC GPIO Set function for S3C2416 SMDK board
- */
- void hsmmc_set_gpio (uint channel, uint width)
- {
- switch (channel) {
- /* can supports 1 and 4 bit bus */
- case 0:
- /* GPIO E : Command, Clock */
- s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2450_GPE5_SD0_CLK);
- s3c2410_gpio_cfgpin(S3C2410_GPE6, S3C2450_GPE6_SD0_CMD);
- if (width == 1) {
- /* GPIO E : MMC DATA0[0] */
- s3c2410_gpio_cfgpin(S3C2410_GPE7, S3C2450_GPE7_SD0_DAT0);
- }
- else if (width == 4) {
- /* GPIO E : MMC DATA0[0:3] */
- s3c2410_gpio_cfgpin(S3C2410_GPE7, S3C2450_GPE7_SD0_DAT0);
- s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2450_GPE8_SD0_DAT1);
- s3c2410_gpio_cfgpin(S3C2410_GPE9, S3C2450_GPE9_SD0_DAT2);
- s3c2410_gpio_cfgpin(S3C2410_GPE10, S3C2450_GPE10_SD0_DAT3);
- }
- break;
- /* can supports 1, 4, and 8 bit bus */
- case 1:
- /* GPIO L : Command, Clock */
- s3c2410_gpio_cfgpin(S3C2443_GPL8, S3C2450_GPL8_SD1CMD);
- s3c2410_gpio_cfgpin(S3C2443_GPL9, S3C2450_GPL9_SD1CLK);
- /* GPIO J : Chip detect, LED, Write Protect */
- s3c2410_gpio_cfgpin(S3C2443_GPJ13, S3C2450_GPJ13_SD1LED);
- s3c2410_gpio_cfgpin(S3C2443_GPJ14, S3C2450_GPJ14_nSD1CD);
- s3c2410_gpio_cfgpin(S3C2443_GPJ15, S3C2450_GPJ15_nSD1WP); /* write protect enable */
- s3c2410_gpio_setpin(S3C2443_GPJ15, 1);
- if (width == 1) {
- /* GPIO L : MMC DATA1[0] */
- s3c2410_gpio_cfgpin(S3C2443_GPL0, S3C2450_GPL0_SD1DAT0);
- }
- else if (width == 4) {
- /* GPIO L : MMC DATA1[0:3] */
- s3c2410_gpio_cfgpin(S3C2443_GPL0, S3C2450_GPL0_SD1DAT0);
- s3c2410_gpio_cfgpin(S3C2443_GPL1, S3C2450_GPL1_SD1DAT1);
- s3c2410_gpio_cfgpin(S3C2443_GPL2, S3C2450_GPL2_SD1DAT2);
- s3c2410_gpio_cfgpin(S3C2443_GPL3, S3C2450_GPL3_SD1DAT3);
- }
- else if (width == 8) {
- /* GPIO L : MMC DATA1[0:7] */
- s3c2410_gpio_cfgpin(S3C2443_GPL0, S3C2450_GPL0_SD1DAT0);
- s3c2410_gpio_cfgpin(S3C2443_GPL1, S3C2450_GPL1_SD1DAT1);
- s3c2410_gpio_cfgpin(S3C2443_GPL2, S3C2450_GPL2_SD1DAT2);
- s3c2410_gpio_cfgpin(S3C2443_GPL3, S3C2450_GPL3_SD1DAT3);
- s3c2410_gpio_cfgpin(S3C2443_GPL4, S3C2450_GPL4_SD1DAT4);
- s3c2410_gpio_cfgpin(S3C2443_GPL5, S3C2450_GPL5_SD1DAT5);
- s3c2410_gpio_cfgpin(S3C2443_GPL6, S3C2450_GPL6_SD1DAT6);
- s3c2410_gpio_cfgpin(S3C2443_GPL7, S3C2450_GPL7_SD1DAT7);
- }
- break;
- default:
- break;
- }
- }
- EXPORT_SYMBOL_GPL(hsmmc_set_gpio);
- #define HOST_CAPS (MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | \
- MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED)
- /* Channel 0 : added HS-MMC channel */
- struct s3c_hsmmc_cfg s3c_hsmmc0_platform = {
- .hwport = 0,
- .enabled = 1,
- /* BAN 20090608 update for wifi driver fail*/
- //.host_caps = HOST_CAPS,
- .host_caps = 0xF ,
- /* BAN 20090608 update for wifi driver fail*/
- .bus_width = 4,
- .highspeed = 0,
- /* ctrl for mmc */
- .fd_ctrl[MMC_MODE_MMC] = {
- .ctrl2 = 0xC0000100, /* ctrl2 for mmc */
- .ctrl3[SPEED_NORMAL] = 0, /* ctrl3 for low speed */
- .ctrl3[SPEED_HIGH] = 0, /* ctrl3 for high speed */
- .ctrl4 = 0x3,
- },
- /* ctrl for sd */
- .fd_ctrl[MMC_MODE_SD] = {
- .ctrl2 = 0xC0000100, /* ctrl2 for sd */
- .ctrl3[SPEED_NORMAL] = 0, /* ctrl3 for low speed */
- .ctrl3[SPEED_HIGH] = 0, /* ctrl3 for high speed */
- .ctrl4 = 0x3,
- },
- .clk_name[0] = "hsmmc", /* 1st clock source */
- .clk_name[1] = "esysclk", /* 2nd clock source hsmmc-epll by Ben Dooks */
- .clk_name[2] = "hsmmc-ext", /* 3rd clock source */
- };
- /* Channel 1 : default HS-MMC channel */
- struct s3c_hsmmc_cfg s3c_hsmmc1_platform = {
- .hwport = 1,
- .enabled = 1,
- /* BAN 20090608 update for wifi driver fail*/
- //.host_caps = HOST_CAPS , /* GeorgeKuo_modify| MMC_CAP_8_BIT_DATA,*/
- .host_caps = 0xF ,
- /* BAN 20090608 update for wifi driver fail*/
- .bus_width = 8,
- .highspeed = 0,
- /* ctrl for mmc */
- .fd_ctrl[MMC_MODE_MMC] = {
- .ctrl2 = 0xC0000100, /* ctrl2 for mmc */
- .ctrl3[SPEED_NORMAL] = 0, /* ctrl3 for low speed */
- .ctrl3[SPEED_HIGH] = 0, /* ctrl3 for high speed */
- .ctrl4 = 0x3,
- },
- /* ctrl for sd */
- .fd_ctrl[MMC_MODE_SD] = {
- .ctrl2 = 0xC0000100, /* ctrl2 for sd */
- .ctrl3[SPEED_NORMAL] = 0, /* ctrl3 for low speed */
- .ctrl3[SPEED_HIGH] = 0, /* ctrl3 for high speed */
- .ctrl4 = 0x3,
- },
- .clk_name[0] = "hsmmc", /* 1st clock source */
- .clk_name[1] = "esysclk", /* 2nd clock source hsmmc-epll by Ben Dooks */
- .clk_name[2] = "hsmmc-ext", /* 3rd clock source */
- };
|