irq.c 3.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133
  1. /* linux/arch/arm/mach-s3c2412/irq.c
  2. *
  3. * Copyright (c) 2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/ioport.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/sysdev.h>
  27. #include <asm/hardware.h>
  28. #include <asm/irq.h>
  29. #include <asm/io.h>
  30. #include <asm/mach/irq.h>
  31. #include <asm/arch/regs-irq.h>
  32. #include <asm/arch/regs-gpio.h>
  33. #include <asm/plat-s3c24xx/cpu.h>
  34. #include <asm/plat-s3c24xx/irq.h>
  35. #include <asm/plat-s3c24xx/pm.h>
  36. /* the s3c2412 changes the behaviour of IRQ_EINT0 through IRQ_EINT3 by
  37. * having them turn up in both the INT* and the EINT* registers. Whilst
  38. * both show the status, they both now need to be acked when the IRQs
  39. * go off.
  40. */
  41. static void
  42. s3c2412_irq_mask(unsigned int irqno)
  43. {
  44. unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
  45. unsigned long mask;
  46. mask = __raw_readl(S3C2410_INTMSK);
  47. __raw_writel(mask | bitval, S3C2410_INTMSK);
  48. mask = __raw_readl(S3C2412_EINTMASK);
  49. __raw_writel(mask | bitval, S3C2412_EINTMASK);
  50. }
  51. static inline void
  52. s3c2412_irq_ack(unsigned int irqno)
  53. {
  54. unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
  55. __raw_writel(bitval, S3C2412_EINTPEND);
  56. __raw_writel(bitval, S3C2410_SRCPND);
  57. __raw_writel(bitval, S3C2410_INTPND);
  58. }
  59. static inline void
  60. s3c2412_irq_maskack(unsigned int irqno)
  61. {
  62. unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
  63. unsigned long mask;
  64. mask = __raw_readl(S3C2410_INTMSK);
  65. __raw_writel(mask|bitval, S3C2410_INTMSK);
  66. mask = __raw_readl(S3C2412_EINTMASK);
  67. __raw_writel(mask | bitval, S3C2412_EINTMASK);
  68. __raw_writel(bitval, S3C2412_EINTPEND);
  69. __raw_writel(bitval, S3C2410_SRCPND);
  70. __raw_writel(bitval, S3C2410_INTPND);
  71. }
  72. static void
  73. s3c2412_irq_unmask(unsigned int irqno)
  74. {
  75. unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
  76. unsigned long mask;
  77. mask = __raw_readl(S3C2412_EINTMASK);
  78. __raw_writel(mask & ~bitval, S3C2412_EINTMASK);
  79. mask = __raw_readl(S3C2410_INTMSK);
  80. __raw_writel(mask & ~bitval, S3C2410_INTMSK);
  81. }
  82. static struct irq_chip s3c2412_irq_eint0t4 = {
  83. .ack = s3c2412_irq_ack,
  84. .mask = s3c2412_irq_mask,
  85. .unmask = s3c2412_irq_unmask,
  86. .set_wake = s3c_irq_wake,
  87. .set_type = s3c_irqext_type,
  88. };
  89. static int s3c2412_irq_add(struct sys_device *sysdev)
  90. {
  91. unsigned int irqno;
  92. for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) {
  93. set_irq_chip(irqno, &s3c2412_irq_eint0t4);
  94. set_irq_handler(irqno, handle_edge_irq);
  95. set_irq_flags(irqno, IRQF_VALID);
  96. }
  97. return 0;
  98. }
  99. static struct sysdev_driver s3c2412_irq_driver = {
  100. .add = s3c2412_irq_add,
  101. .suspend = s3c24xx_irq_suspend,
  102. .resume = s3c24xx_irq_resume,
  103. };
  104. static int s3c2412_irq_init(void)
  105. {
  106. return sysdev_driver_register(&s3c2412_sysclass, &s3c2412_irq_driver);
  107. }
  108. arch_initcall(s3c2412_irq_init);