sleep.S 2.1 KB

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  1. /* linux/arch/arm/mach-s3c2410/s3c2410-sleep.S
  2. *
  3. * Copyright (c) 2004 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2410 Power Manager (Suspend-To-RAM) support
  7. *
  8. * Based on PXA/SA1100 sleep code by:
  9. * Nicolas Pitre, (c) 2002 Monta Vista Software Inc
  10. * Cliff Brake, (c) 2001
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/linkage.h>
  27. #include <asm/assembler.h>
  28. #include <asm/hardware.h>
  29. #include <asm/arch/map.h>
  30. #include <asm/arch/regs-gpio.h>
  31. #include <asm/arch/regs-clock.h>
  32. #include <asm/arch/regs-mem.h>
  33. #include <asm/arch/regs-serial.h>
  34. /* s3c2410_cpu_suspend
  35. *
  36. * put the cpu into sleep mode
  37. */
  38. ENTRY(s3c2410_cpu_suspend)
  39. @@ prepare cpu to sleep
  40. ldr r4, =S3C2410_REFRESH
  41. ldr r5, =S3C24XX_MISCCR
  42. ldr r6, =S3C2410_CLKCON
  43. ldr r7, [ r4 ] @ get REFRESH (and ensure in TLB)
  44. ldr r8, [ r5 ] @ get MISCCR (and ensure in TLB)
  45. ldr r9, [ r6 ] @ get CLKCON (and ensure in TLB)
  46. orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command
  47. orr r8, r8, #S3C2410_MISCCR_SDSLEEP @ SDRAM power-down signals
  48. orr r9, r9, #S3C2410_CLKCON_POWER @ power down command
  49. teq pc, #0 @ first as a trial-run to load cache
  50. bl s3c2410_do_sleep
  51. teq r0, r0 @ now do it for real
  52. b s3c2410_do_sleep @
  53. @@ align next bit of code to cache line
  54. .align 5
  55. s3c2410_do_sleep:
  56. streq r7, [ r4 ] @ SDRAM sleep command
  57. streq r8, [ r5 ] @ SDRAM power-down config
  58. streq r9, [ r6 ] @ CPU sleep
  59. 1: beq 1b
  60. mov pc, r14