mach-vr1000.c 11 KB

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  1. /* linux/arch/arm/mach-s3c2410/mach-vr1000.c
  2. *
  3. * Copyright (c) 2003-2005 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Machine support for Thorcom VR1000 board. Designed for Thorcom by
  7. * Simtec Electronics, http://www.simtec.co.uk/
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/types.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/list.h>
  18. #include <linux/timer.h>
  19. #include <linux/init.h>
  20. #include <linux/dm9000.h>
  21. #include <linux/serial.h>
  22. #include <linux/tty.h>
  23. #include <linux/serial_8250.h>
  24. #include <linux/serial_reg.h>
  25. #include <asm/mach/arch.h>
  26. #include <asm/mach/map.h>
  27. #include <asm/mach/irq.h>
  28. #include <asm/arch/bast-map.h>
  29. #include <asm/arch/vr1000-map.h>
  30. #include <asm/arch/vr1000-irq.h>
  31. #include <asm/arch/vr1000-cpld.h>
  32. #include <asm/hardware.h>
  33. #include <asm/io.h>
  34. #include <asm/irq.h>
  35. #include <asm/mach-types.h>
  36. #include <asm/arch/regs-serial.h>
  37. #include <asm/arch/regs-gpio.h>
  38. #include <asm/arch/leds-gpio.h>
  39. #include <asm/plat-s3c24xx/clock.h>
  40. #include <asm/plat-s3c24xx/devs.h>
  41. #include <asm/plat-s3c24xx/cpu.h>
  42. #include "usb-simtec.h"
  43. /* macros for virtual address mods for the io space entries */
  44. #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
  45. #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
  46. #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
  47. #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
  48. /* macros to modify the physical addresses for io space */
  49. #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
  50. #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
  51. #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
  52. #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
  53. static struct map_desc vr1000_iodesc[] __initdata = {
  54. /* ISA IO areas */
  55. {
  56. .virtual = (u32)S3C24XX_VA_ISA_BYTE,
  57. .pfn = PA_CS2(BAST_PA_ISAIO),
  58. .length = SZ_16M,
  59. .type = MT_DEVICE,
  60. }, {
  61. .virtual = (u32)S3C24XX_VA_ISA_WORD,
  62. .pfn = PA_CS3(BAST_PA_ISAIO),
  63. .length = SZ_16M,
  64. .type = MT_DEVICE,
  65. },
  66. /* CPLD control registers, and external interrupt controls */
  67. {
  68. .virtual = (u32)VR1000_VA_CTRL1,
  69. .pfn = __phys_to_pfn(VR1000_PA_CTRL1),
  70. .length = SZ_1M,
  71. .type = MT_DEVICE,
  72. }, {
  73. .virtual = (u32)VR1000_VA_CTRL2,
  74. .pfn = __phys_to_pfn(VR1000_PA_CTRL2),
  75. .length = SZ_1M,
  76. .type = MT_DEVICE,
  77. }, {
  78. .virtual = (u32)VR1000_VA_CTRL3,
  79. .pfn = __phys_to_pfn(VR1000_PA_CTRL3),
  80. .length = SZ_1M,
  81. .type = MT_DEVICE,
  82. }, {
  83. .virtual = (u32)VR1000_VA_CTRL4,
  84. .pfn = __phys_to_pfn(VR1000_PA_CTRL4),
  85. .length = SZ_1M,
  86. .type = MT_DEVICE,
  87. },
  88. /* peripheral space... one for each of fast/slow/byte/16bit */
  89. /* note, ide is only decoded in word space, even though some registers
  90. * are only 8bit */
  91. /* slow, byte */
  92. { VA_C2(VR1000_VA_IDEPRI), PA_CS3(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE },
  93. { VA_C2(VR1000_VA_IDESEC), PA_CS3(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE },
  94. { VA_C2(VR1000_VA_IDEPRIAUX), PA_CS3(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
  95. { VA_C2(VR1000_VA_IDESECAUX), PA_CS3(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
  96. /* slow, word */
  97. { VA_C3(VR1000_VA_IDEPRI), PA_CS3(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE },
  98. { VA_C3(VR1000_VA_IDESEC), PA_CS3(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE },
  99. { VA_C3(VR1000_VA_IDEPRIAUX), PA_CS3(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
  100. { VA_C3(VR1000_VA_IDESECAUX), PA_CS3(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
  101. /* fast, byte */
  102. { VA_C4(VR1000_VA_IDEPRI), PA_CS5(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE },
  103. { VA_C4(VR1000_VA_IDESEC), PA_CS5(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE },
  104. { VA_C4(VR1000_VA_IDEPRIAUX), PA_CS5(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
  105. { VA_C4(VR1000_VA_IDESECAUX), PA_CS5(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
  106. /* fast, word */
  107. { VA_C5(VR1000_VA_IDEPRI), PA_CS5(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE },
  108. { VA_C5(VR1000_VA_IDESEC), PA_CS5(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE },
  109. { VA_C5(VR1000_VA_IDEPRIAUX), PA_CS5(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
  110. { VA_C5(VR1000_VA_IDESECAUX), PA_CS5(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
  111. };
  112. #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  113. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  114. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  115. /* uart clock source(s) */
  116. static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
  117. [0] = {
  118. .name = "uclk",
  119. .divisor = 1,
  120. .min_baud = 0,
  121. .max_baud = 0,
  122. },
  123. [1] = {
  124. .name = "pclk",
  125. .divisor = 1,
  126. .min_baud = 0,
  127. .max_baud = 0.
  128. }
  129. };
  130. static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
  131. [0] = {
  132. .hwport = 0,
  133. .flags = 0,
  134. .ucon = UCON,
  135. .ulcon = ULCON,
  136. .ufcon = UFCON,
  137. .clocks = vr1000_serial_clocks,
  138. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  139. },
  140. [1] = {
  141. .hwport = 1,
  142. .flags = 0,
  143. .ucon = UCON,
  144. .ulcon = ULCON,
  145. .ufcon = UFCON,
  146. .clocks = vr1000_serial_clocks,
  147. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  148. },
  149. /* port 2 is not actually used */
  150. [2] = {
  151. .hwport = 2,
  152. .flags = 0,
  153. .ucon = UCON,
  154. .ulcon = ULCON,
  155. .ufcon = UFCON,
  156. .clocks = vr1000_serial_clocks,
  157. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  158. }
  159. };
  160. /* definitions for the vr1000 extra 16550 serial ports */
  161. #define VR1000_BAUDBASE (3692307)
  162. #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
  163. static struct plat_serial8250_port serial_platform_data[] = {
  164. [0] = {
  165. .mapbase = VR1000_SERIAL_MAPBASE(0),
  166. .irq = IRQ_VR1000_SERIAL + 0,
  167. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  168. .iotype = UPIO_MEM,
  169. .regshift = 0,
  170. .uartclk = VR1000_BAUDBASE,
  171. },
  172. [1] = {
  173. .mapbase = VR1000_SERIAL_MAPBASE(1),
  174. .irq = IRQ_VR1000_SERIAL + 1,
  175. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  176. .iotype = UPIO_MEM,
  177. .regshift = 0,
  178. .uartclk = VR1000_BAUDBASE,
  179. },
  180. [2] = {
  181. .mapbase = VR1000_SERIAL_MAPBASE(2),
  182. .irq = IRQ_VR1000_SERIAL + 2,
  183. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  184. .iotype = UPIO_MEM,
  185. .regshift = 0,
  186. .uartclk = VR1000_BAUDBASE,
  187. },
  188. [3] = {
  189. .mapbase = VR1000_SERIAL_MAPBASE(3),
  190. .irq = IRQ_VR1000_SERIAL + 3,
  191. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  192. .iotype = UPIO_MEM,
  193. .regshift = 0,
  194. .uartclk = VR1000_BAUDBASE,
  195. },
  196. { },
  197. };
  198. static struct platform_device serial_device = {
  199. .name = "serial8250",
  200. .id = PLAT8250_DEV_PLATFORM,
  201. .dev = {
  202. .platform_data = serial_platform_data,
  203. },
  204. };
  205. /* MTD NOR Flash */
  206. static struct resource vr1000_nor_resource[] = {
  207. [0] = {
  208. .start = S3C2410_CS1 + 0x4000000,
  209. .end = S3C2410_CS1 + 0x4000000 + SZ_16M - 1,
  210. .flags = IORESOURCE_MEM,
  211. }
  212. };
  213. static struct platform_device vr1000_nor = {
  214. .name = "bast-nor",
  215. .id = -1,
  216. .num_resources = ARRAY_SIZE(vr1000_nor_resource),
  217. .resource = vr1000_nor_resource,
  218. };
  219. /* DM9000 ethernet devices */
  220. static struct resource vr1000_dm9k0_resource[] = {
  221. [0] = {
  222. .start = S3C2410_CS5 + VR1000_PA_DM9000,
  223. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
  224. .flags = IORESOURCE_MEM
  225. },
  226. [1] = {
  227. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
  228. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
  229. .flags = IORESOURCE_MEM
  230. },
  231. [2] = {
  232. .start = IRQ_VR1000_DM9000A,
  233. .end = IRQ_VR1000_DM9000A,
  234. .flags = IORESOURCE_IRQ
  235. }
  236. };
  237. static struct resource vr1000_dm9k1_resource[] = {
  238. [0] = {
  239. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
  240. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
  241. .flags = IORESOURCE_MEM
  242. },
  243. [1] = {
  244. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
  245. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
  246. .flags = IORESOURCE_MEM
  247. },
  248. [2] = {
  249. .start = IRQ_VR1000_DM9000N,
  250. .end = IRQ_VR1000_DM9000N,
  251. .flags = IORESOURCE_IRQ
  252. }
  253. };
  254. /* for the moment we limit ourselves to 16bit IO until some
  255. * better IO routines can be written and tested
  256. */
  257. static struct dm9000_plat_data vr1000_dm9k_platdata = {
  258. .flags = DM9000_PLATF_16BITONLY,
  259. };
  260. static struct platform_device vr1000_dm9k0 = {
  261. .name = "dm9000",
  262. .id = 0,
  263. .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
  264. .resource = vr1000_dm9k0_resource,
  265. .dev = {
  266. .platform_data = &vr1000_dm9k_platdata,
  267. }
  268. };
  269. static struct platform_device vr1000_dm9k1 = {
  270. .name = "dm9000",
  271. .id = 1,
  272. .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
  273. .resource = vr1000_dm9k1_resource,
  274. .dev = {
  275. .platform_data = &vr1000_dm9k_platdata,
  276. }
  277. };
  278. /* LEDS */
  279. static struct s3c24xx_led_platdata vr1000_led1_pdata = {
  280. .name = "led1",
  281. .gpio = S3C2410_GPB0,
  282. .def_trigger = "",
  283. };
  284. static struct s3c24xx_led_platdata vr1000_led2_pdata = {
  285. .name = "led2",
  286. .gpio = S3C2410_GPB1,
  287. .def_trigger = "",
  288. };
  289. static struct s3c24xx_led_platdata vr1000_led3_pdata = {
  290. .name = "led3",
  291. .gpio = S3C2410_GPB2,
  292. .def_trigger = "",
  293. };
  294. static struct platform_device vr1000_led1 = {
  295. .name = "s3c24xx_led",
  296. .id = 1,
  297. .dev = {
  298. .platform_data = &vr1000_led1_pdata,
  299. },
  300. };
  301. static struct platform_device vr1000_led2 = {
  302. .name = "s3c24xx_led",
  303. .id = 2,
  304. .dev = {
  305. .platform_data = &vr1000_led2_pdata,
  306. },
  307. };
  308. static struct platform_device vr1000_led3 = {
  309. .name = "s3c24xx_led",
  310. .id = 3,
  311. .dev = {
  312. .platform_data = &vr1000_led3_pdata,
  313. },
  314. };
  315. /* devices for this board */
  316. static struct platform_device *vr1000_devices[] __initdata = {
  317. &s3c_device_usb,
  318. &s3c_device_lcd,
  319. &s3c_device_wdt,
  320. &s3c_device_i2c,
  321. &s3c_device_iis,
  322. &s3c_device_adc,
  323. &serial_device,
  324. &vr1000_nor,
  325. &vr1000_dm9k0,
  326. &vr1000_dm9k1,
  327. &vr1000_led1,
  328. &vr1000_led2,
  329. &vr1000_led3,
  330. };
  331. static struct clk *vr1000_clocks[] = {
  332. &s3c24xx_dclk0,
  333. &s3c24xx_dclk1,
  334. &s3c24xx_clkout0,
  335. &s3c24xx_clkout1,
  336. &s3c24xx_uclk,
  337. };
  338. static struct s3c24xx_board vr1000_board __initdata = {
  339. .devices = vr1000_devices,
  340. .devices_count = ARRAY_SIZE(vr1000_devices),
  341. .clocks = vr1000_clocks,
  342. .clocks_count = ARRAY_SIZE(vr1000_clocks),
  343. };
  344. static void vr1000_power_off(void)
  345. {
  346. s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPB9_OUTP);
  347. s3c2410_gpio_setpin(S3C2410_GPB9, 1);
  348. }
  349. static void __init vr1000_map_io(void)
  350. {
  351. /* initialise clock sources */
  352. s3c24xx_dclk0.parent = NULL;
  353. s3c24xx_dclk0.rate = 12*1000*1000;
  354. s3c24xx_dclk1.parent = NULL;
  355. s3c24xx_dclk1.rate = 3692307;
  356. s3c24xx_clkout0.parent = &s3c24xx_dclk0;
  357. s3c24xx_clkout1.parent = &s3c24xx_dclk1;
  358. s3c24xx_uclk.parent = &s3c24xx_clkout1;
  359. pm_power_off = vr1000_power_off;
  360. s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
  361. s3c24xx_init_clocks(0);
  362. s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
  363. s3c24xx_set_board(&vr1000_board);
  364. usb_simtec_init();
  365. }
  366. MACHINE_START(VR1000, "Thorcom-VR1000")
  367. /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
  368. .phys_io = S3C2410_PA_UART,
  369. .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
  370. .boot_params = S3C2410_SDRAM_PA + 0x100,
  371. .map_io = vr1000_map_io,
  372. .init_irq = s3c24xx_init_irq,
  373. .timer = &s3c24xx_timer,
  374. MACHINE_END