mach-qt2410.c 9.4 KB

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  1. /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
  2. *
  3. * Copyright (C) 2006 by OpenMoko, Inc.
  4. * Author: Harald Welte <laforge@openmoko.org>
  5. * All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/kernel.h>
  24. #include <linux/types.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/list.h>
  27. #include <linux/timer.h>
  28. #include <linux/init.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/serial_core.h>
  31. #include <linux/mmc/protocol.h>
  32. #include <linux/spi/spi.h>
  33. #include <linux/spi/spi_bitbang.h>
  34. #include <linux/mtd/mtd.h>
  35. #include <linux/mtd/nand.h>
  36. #include <linux/mtd/nand_ecc.h>
  37. #include <linux/mtd/partitions.h>
  38. #include <asm/mach/arch.h>
  39. #include <asm/mach/map.h>
  40. #include <asm/mach/irq.h>
  41. #include <asm/hardware.h>
  42. #include <asm/io.h>
  43. #include <asm/irq.h>
  44. #include <asm/mach-types.h>
  45. #include <asm/arch/regs-gpio.h>
  46. #include <asm/arch/leds-gpio.h>
  47. #include <asm/arch/regs-serial.h>
  48. #include <asm/arch/fb.h>
  49. #include <asm/arch/nand.h>
  50. #include <asm/arch/udc.h>
  51. #include <asm/arch/spi.h>
  52. #include <asm/arch/spi-gpio.h>
  53. #include <asm/plat-s3c24xx/common-smdk.h>
  54. #include <asm/plat-s3c24xx/devs.h>
  55. #include <asm/plat-s3c24xx/cpu.h>
  56. #include <asm/plat-s3c24xx/pm.h>
  57. static struct map_desc qt2410_iodesc[] __initdata = {
  58. { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
  59. };
  60. #define UCON S3C2410_UCON_DEFAULT
  61. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  62. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  63. static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
  64. [0] = {
  65. .hwport = 0,
  66. .flags = 0,
  67. .ucon = UCON,
  68. .ulcon = ULCON,
  69. .ufcon = UFCON,
  70. },
  71. [1] = {
  72. .hwport = 1,
  73. .flags = 0,
  74. .ucon = UCON,
  75. .ulcon = ULCON,
  76. .ufcon = UFCON,
  77. },
  78. [2] = {
  79. .hwport = 2,
  80. .flags = 0,
  81. .ucon = UCON,
  82. .ulcon = ULCON,
  83. .ufcon = UFCON,
  84. }
  85. };
  86. /* LCD driver info */
  87. /* Configuration for 640x480 SHARP LQ080V3DG01 */
  88. static struct s3c2410fb_mach_info qt2410_biglcd_cfg __initdata = {
  89. .regs = {
  90. .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
  91. S3C2410_LCDCON1_TFT |
  92. S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
  93. .lcdcon2 = S3C2410_LCDCON2_VBPD(18) | /* 19 */
  94. S3C2410_LCDCON2_LINEVAL(479) |
  95. S3C2410_LCDCON2_VFPD(10) | /* 11 */
  96. S3C2410_LCDCON2_VSPW(14), /* 15 */
  97. .lcdcon3 = S3C2410_LCDCON3_HBPD(43) | /* 44 */
  98. S3C2410_LCDCON3_HOZVAL(639) | /* 640 */
  99. S3C2410_LCDCON3_HFPD(115), /* 116 */
  100. .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
  101. S3C2410_LCDCON4_HSPW(95), /* 96 */
  102. .lcdcon5 = S3C2410_LCDCON5_FRM565 |
  103. S3C2410_LCDCON5_INVVLINE |
  104. S3C2410_LCDCON5_INVVFRAME |
  105. S3C2410_LCDCON5_PWREN |
  106. S3C2410_LCDCON5_HWSWP,
  107. },
  108. .lpcsel = ((0xCE6) & ~7) | 1<<4,
  109. .width = 640,
  110. .height = 480,
  111. .xres = {
  112. .min = 640,
  113. .max = 640,
  114. .defval = 640,
  115. },
  116. .yres = {
  117. .min = 480,
  118. .max = 480,
  119. .defval = 480,
  120. },
  121. .bpp = {
  122. .min = 16,
  123. .max = 16,
  124. .defval = 16,
  125. },
  126. };
  127. /* Configuration for 480x640 toppoly TD028TTEC1 */
  128. static struct s3c2410fb_mach_info qt2410_prodlcd_cfg __initdata = {
  129. .regs = {
  130. .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
  131. S3C2410_LCDCON1_TFT |
  132. S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
  133. .lcdcon2 = S3C2410_LCDCON2_VBPD(1) | /* 2 */
  134. S3C2410_LCDCON2_LINEVAL(639) |/* 640 */
  135. S3C2410_LCDCON2_VFPD(3) | /* 4 */
  136. S3C2410_LCDCON2_VSPW(1), /* 2 */
  137. .lcdcon3 = S3C2410_LCDCON3_HBPD(7) | /* 8 */
  138. S3C2410_LCDCON3_HOZVAL(479) | /* 479 */
  139. S3C2410_LCDCON3_HFPD(23), /* 24 */
  140. .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
  141. S3C2410_LCDCON4_HSPW(7), /* 8 */
  142. .lcdcon5 = S3C2410_LCDCON5_FRM565 |
  143. S3C2410_LCDCON5_INVVLINE |
  144. S3C2410_LCDCON5_INVVFRAME |
  145. S3C2410_LCDCON5_PWREN |
  146. S3C2410_LCDCON5_HWSWP,
  147. },
  148. .lpcsel = ((0xCE6) & ~7) | 1<<4,
  149. .width = 480,
  150. .height = 640,
  151. .xres = {
  152. .min = 480,
  153. .max = 480,
  154. .defval = 480,
  155. },
  156. .yres = {
  157. .min = 640,
  158. .max = 640,
  159. .defval = 640,
  160. },
  161. .bpp = {
  162. .min = 16,
  163. .max = 16,
  164. .defval = 16,
  165. },
  166. };
  167. /* Config for 240x320 LCD */
  168. static struct s3c2410fb_mach_info qt2410_lcd_cfg __initdata = {
  169. .regs = {
  170. .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
  171. S3C2410_LCDCON1_TFT |
  172. S3C2410_LCDCON1_CLKVAL(0x04),
  173. .lcdcon2 = S3C2410_LCDCON2_VBPD(1) |
  174. S3C2410_LCDCON2_LINEVAL(319) |
  175. S3C2410_LCDCON2_VFPD(6) |
  176. S3C2410_LCDCON2_VSPW(3),
  177. .lcdcon3 = S3C2410_LCDCON3_HBPD(12) |
  178. S3C2410_LCDCON3_HOZVAL(239) |
  179. S3C2410_LCDCON3_HFPD(7),
  180. .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
  181. S3C2410_LCDCON4_HSPW(3),
  182. .lcdcon5 = S3C2410_LCDCON5_FRM565 |
  183. S3C2410_LCDCON5_INVVLINE |
  184. S3C2410_LCDCON5_INVVFRAME |
  185. S3C2410_LCDCON5_PWREN |
  186. S3C2410_LCDCON5_HWSWP,
  187. },
  188. .lpcsel = ((0xCE6) & ~7) | 1<<4,
  189. .width = 240,
  190. .height = 320,
  191. .xres = {
  192. .min = 240,
  193. .max = 240,
  194. .defval = 240,
  195. },
  196. .yres = {
  197. .min = 320,
  198. .max = 320,
  199. .defval = 320,
  200. },
  201. .bpp = {
  202. .min = 16,
  203. .max = 16,
  204. .defval = 16,
  205. },
  206. };
  207. /* CS8900 */
  208. static struct resource qt2410_cs89x0_resources[] = {
  209. [0] = {
  210. .start = 0x19000000,
  211. .end = 0x19000000 + 16,
  212. .flags = IORESOURCE_MEM,
  213. },
  214. [1] = {
  215. .start = IRQ_EINT9,
  216. .end = IRQ_EINT9,
  217. .flags = IORESOURCE_IRQ,
  218. },
  219. };
  220. static struct platform_device qt2410_cs89x0 = {
  221. .name = "cirrus-cs89x0",
  222. .num_resources = ARRAY_SIZE(qt2410_cs89x0_resources),
  223. .resource = qt2410_cs89x0_resources,
  224. };
  225. /* LED */
  226. static struct s3c24xx_led_platdata qt2410_pdata_led = {
  227. .gpio = S3C2410_GPB0,
  228. .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
  229. .name = "led",
  230. .def_trigger = "timer",
  231. };
  232. static struct platform_device qt2410_led = {
  233. .name = "s3c24xx_led",
  234. .id = 0,
  235. .dev = {
  236. .platform_data = &qt2410_pdata_led,
  237. },
  238. };
  239. /* SPI */
  240. static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs)
  241. {
  242. switch (cs) {
  243. case BITBANG_CS_ACTIVE:
  244. s3c2410_gpio_setpin(S3C2410_GPB5, 0);
  245. break;
  246. case BITBANG_CS_INACTIVE:
  247. s3c2410_gpio_setpin(S3C2410_GPB5, 1);
  248. break;
  249. }
  250. }
  251. static struct s3c2410_spigpio_info spi_gpio_cfg = {
  252. .pin_clk = S3C2410_GPG7,
  253. .pin_mosi = S3C2410_GPG6,
  254. .pin_miso = S3C2410_GPG5,
  255. .chip_select = &spi_gpio_cs,
  256. };
  257. static struct platform_device qt2410_spi = {
  258. .name = "s3c24xx-spi-gpio",
  259. .id = 1,
  260. .dev = {
  261. .platform_data = &spi_gpio_cfg,
  262. },
  263. };
  264. /* Board devices */
  265. static struct platform_device *qt2410_devices[] __initdata = {
  266. &s3c_device_usb,
  267. &s3c_device_lcd,
  268. &s3c_device_wdt,
  269. &s3c_device_i2c,
  270. &s3c_device_iis,
  271. &s3c_device_sdi,
  272. &s3c_device_usbgadget,
  273. &qt2410_spi,
  274. &qt2410_cs89x0,
  275. &qt2410_led,
  276. };
  277. static struct s3c24xx_board qt2410_board __initdata = {
  278. .devices = qt2410_devices,
  279. .devices_count = ARRAY_SIZE(qt2410_devices)
  280. };
  281. static struct mtd_partition qt2410_nand_part[] = {
  282. [0] = {
  283. .name = "U-Boot",
  284. .size = 0x30000,
  285. .offset = 0,
  286. },
  287. [1] = {
  288. .name = "U-Boot environment",
  289. .offset = 0x30000,
  290. .size = 0x4000,
  291. },
  292. [2] = {
  293. .name = "kernel",
  294. .offset = 0x34000,
  295. .size = SZ_2M,
  296. },
  297. [3] = {
  298. .name = "initrd",
  299. .offset = 0x234000,
  300. .size = SZ_4M,
  301. },
  302. [4] = {
  303. .name = "jffs2",
  304. .offset = 0x634000,
  305. .size = 0x39cc000,
  306. },
  307. };
  308. static struct s3c2410_nand_set qt2410_nand_sets[] = {
  309. [0] = {
  310. .name = "NAND",
  311. .nr_chips = 1,
  312. .nr_partitions = ARRAY_SIZE(qt2410_nand_part),
  313. .partitions = qt2410_nand_part,
  314. },
  315. };
  316. /* choose a set of timings which should suit most 512Mbit
  317. * chips and beyond.
  318. */
  319. static struct s3c2410_platform_nand qt2410_nand_info = {
  320. .tacls = 20,
  321. .twrph0 = 60,
  322. .twrph1 = 20,
  323. .nr_sets = ARRAY_SIZE(qt2410_nand_sets),
  324. .sets = qt2410_nand_sets,
  325. };
  326. /* UDC */
  327. static struct s3c2410_udc_mach_info qt2410_udc_cfg = {
  328. };
  329. static char tft_type = 's';
  330. static int __init qt2410_tft_setup(char *str)
  331. {
  332. tft_type = str[0];
  333. return 1;
  334. }
  335. __setup("tft=", qt2410_tft_setup);
  336. static void __init qt2410_map_io(void)
  337. {
  338. s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
  339. s3c24xx_init_clocks(12*1000*1000);
  340. s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
  341. s3c24xx_set_board(&qt2410_board);
  342. }
  343. static void __init qt2410_machine_init(void)
  344. {
  345. s3c_device_nand.dev.platform_data = &qt2410_nand_info;
  346. switch (tft_type) {
  347. case 'p': /* production */
  348. s3c24xx_fb_set_platdata(&qt2410_prodlcd_cfg);
  349. break;
  350. case 'b': /* big */
  351. s3c24xx_fb_set_platdata(&qt2410_biglcd_cfg);
  352. break;
  353. case 's': /* small */
  354. default:
  355. s3c24xx_fb_set_platdata(&qt2410_lcd_cfg);
  356. break;
  357. }
  358. s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPIO_OUTPUT);
  359. s3c2410_gpio_setpin(S3C2410_GPB0, 1);
  360. s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
  361. s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPIO_OUTPUT);
  362. s3c2410_pm_init();
  363. }
  364. MACHINE_START(QT2410, "QT2410")
  365. .phys_io = S3C2410_PA_UART,
  366. .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
  367. .boot_params = S3C2410_SDRAM_PA + 0x100,
  368. .map_io = qt2410_map_io,
  369. .init_irq = s3c24xx_init_irq,
  370. .init_machine = qt2410_machine_init,
  371. .timer = &s3c24xx_timer,
  372. MACHINE_END