platsmp.c 4.9 KB

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  1. /*
  2. * linux/arch/arm/mach-realview/platsmp.c
  3. *
  4. * Copyright (C) 2002 ARM Ltd.
  5. * All Rights Reserved
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/errno.h>
  13. #include <linux/delay.h>
  14. #include <linux/device.h>
  15. #include <linux/smp.h>
  16. #include <asm/cacheflush.h>
  17. #include <asm/hardware/arm_scu.h>
  18. #include <asm/hardware.h>
  19. #include <asm/io.h>
  20. extern void realview_secondary_startup(void);
  21. /*
  22. * control for which core is the next to come out of the secondary
  23. * boot "holding pen"
  24. */
  25. volatile int __cpuinitdata pen_release = -1;
  26. static unsigned int __init get_core_count(void)
  27. {
  28. unsigned int ncores;
  29. ncores = __raw_readl(__io_address(REALVIEW_MPCORE_SCU_BASE) + SCU_CONFIG);
  30. return (ncores & 0x03) + 1;
  31. }
  32. static DEFINE_SPINLOCK(boot_lock);
  33. void __cpuinit platform_secondary_init(unsigned int cpu)
  34. {
  35. /*
  36. * the primary core may have used a "cross call" soft interrupt
  37. * to get this processor out of WFI in the BootMonitor - make
  38. * sure that we are no longer being sent this soft interrupt
  39. */
  40. smp_cross_call_done(cpumask_of_cpu(cpu));
  41. /*
  42. * if any interrupts are already enabled for the primary
  43. * core (e.g. timer irq), then they will not have been enabled
  44. * for us: do so
  45. */
  46. gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
  47. /*
  48. * let the primary processor know we're out of the
  49. * pen, then head off into the C entry point
  50. */
  51. pen_release = -1;
  52. smp_wmb();
  53. /*
  54. * Synchronise with the boot thread.
  55. */
  56. spin_lock(&boot_lock);
  57. spin_unlock(&boot_lock);
  58. }
  59. int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
  60. {
  61. unsigned long timeout;
  62. /*
  63. * set synchronisation state between this boot processor
  64. * and the secondary one
  65. */
  66. spin_lock(&boot_lock);
  67. /*
  68. * The secondary processor is waiting to be released from
  69. * the holding pen - release it, then wait for it to flag
  70. * that it has been released by resetting pen_release.
  71. *
  72. * Note that "pen_release" is the hardware CPU ID, whereas
  73. * "cpu" is Linux's internal ID.
  74. */
  75. pen_release = cpu;
  76. flush_cache_all();
  77. /*
  78. * XXX
  79. *
  80. * This is a later addition to the booting protocol: the
  81. * bootMonitor now puts secondary cores into WFI, so
  82. * poke_milo() no longer gets the cores moving; we need
  83. * to send a soft interrupt to wake the secondary core.
  84. * Use smp_cross_call() for this, since there's little
  85. * point duplicating the code here
  86. */
  87. smp_cross_call(cpumask_of_cpu(cpu));
  88. timeout = jiffies + (1 * HZ);
  89. while (time_before(jiffies, timeout)) {
  90. smp_rmb();
  91. if (pen_release == -1)
  92. break;
  93. udelay(10);
  94. }
  95. /*
  96. * now the secondary core is starting up let it run its
  97. * calibrations, then wait for it to finish
  98. */
  99. spin_unlock(&boot_lock);
  100. return pen_release != -1 ? -ENOSYS : 0;
  101. }
  102. static void __init poke_milo(void)
  103. {
  104. extern void secondary_startup(void);
  105. /* nobody is to be released from the pen yet */
  106. pen_release = -1;
  107. /*
  108. * write the address of secondary startup into the system-wide
  109. * flags register, then clear the bottom two bits, which is what
  110. * BootMonitor is waiting for
  111. */
  112. #if 1
  113. #define REALVIEW_SYS_FLAGSS_OFFSET 0x30
  114. __raw_writel(virt_to_phys(realview_secondary_startup),
  115. __io_address(REALVIEW_SYS_BASE) +
  116. REALVIEW_SYS_FLAGSS_OFFSET);
  117. #define REALVIEW_SYS_FLAGSC_OFFSET 0x34
  118. __raw_writel(3,
  119. __io_address(REALVIEW_SYS_BASE) +
  120. REALVIEW_SYS_FLAGSC_OFFSET);
  121. #endif
  122. mb();
  123. }
  124. /*
  125. * Initialise the CPU possible map early - this describes the CPUs
  126. * which may be present or become present in the system.
  127. */
  128. void __init smp_init_cpus(void)
  129. {
  130. unsigned int i, ncores = get_core_count();
  131. for (i = 0; i < ncores; i++)
  132. cpu_set(i, cpu_possible_map);
  133. }
  134. void __init smp_prepare_cpus(unsigned int max_cpus)
  135. {
  136. unsigned int ncores = get_core_count();
  137. unsigned int cpu = smp_processor_id();
  138. int i;
  139. /* sanity check */
  140. if (ncores == 0) {
  141. printk(KERN_ERR
  142. "Realview: strange CM count of 0? Default to 1\n");
  143. ncores = 1;
  144. }
  145. if (ncores > NR_CPUS) {
  146. printk(KERN_WARNING
  147. "Realview: no. of cores (%d) greater than configured "
  148. "maximum of %d - clipping\n",
  149. ncores, NR_CPUS);
  150. ncores = NR_CPUS;
  151. }
  152. smp_store_cpu_info(cpu);
  153. /*
  154. * are we trying to boot more cores than exist?
  155. */
  156. if (max_cpus > ncores)
  157. max_cpus = ncores;
  158. /*
  159. * Enable the local timer for primary CPU
  160. */
  161. local_timer_setup(cpu);
  162. /*
  163. * Initialise the present map, which describes the set of CPUs
  164. * actually populated at the present time.
  165. */
  166. for (i = 0; i < max_cpus; i++)
  167. cpu_set(i, cpu_present_map);
  168. /*
  169. * Do we need any more CPUs? If so, then let them know where
  170. * to start. Note that, on modern versions of MILO, the "poke"
  171. * doesn't actually do anything until each individual core is
  172. * sent a soft interrupt to get it out of WFI
  173. */
  174. if (max_cpus > 1)
  175. poke_milo();
  176. }