core.h 3.5 KB

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  1. /*
  2. * linux/arch/arm/mach-realview/core.h
  3. *
  4. * Copyright (C) 2004 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #ifndef __ASM_ARCH_REALVIEW_H
  22. #define __ASM_ARCH_REALVIEW_H
  23. #include <linux/amba/bus.h>
  24. #include <asm/leds.h>
  25. #include <asm/io.h>
  26. extern struct sys_timer realview_timer;
  27. #define AMBA_DEVICE(name,busid,base,plat) \
  28. static struct amba_device name##_device = { \
  29. .dev = { \
  30. .coherent_dma_mask = ~0, \
  31. .bus_id = busid, \
  32. .platform_data = plat, \
  33. }, \
  34. .res = { \
  35. .start = REALVIEW_##base##_BASE, \
  36. .end = (REALVIEW_##base##_BASE) + SZ_4K - 1,\
  37. .flags = IORESOURCE_MEM, \
  38. }, \
  39. .dma_mask = ~0, \
  40. .irq = base##_IRQ, \
  41. /* .dma = base##_DMA,*/ \
  42. }
  43. /*
  44. * These devices are connected via the core APB bridge
  45. */
  46. #define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ }
  47. #define GPIO2_DMA { 0, 0 }
  48. #define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ }
  49. #define GPIO3_DMA { 0, 0 }
  50. #define AACI_IRQ { IRQ_AACI, NO_IRQ }
  51. #define AACI_DMA { 0x80, 0x81 }
  52. #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_MMCI0B }
  53. #define MMCI0_DMA { 0x84, 0 }
  54. #define KMI0_IRQ { IRQ_KMI0, NO_IRQ }
  55. #define KMI0_DMA { 0, 0 }
  56. #define KMI1_IRQ { IRQ_KMI1, NO_IRQ }
  57. #define KMI1_DMA { 0, 0 }
  58. /*
  59. * These devices are connected directly to the multi-layer AHB switch
  60. */
  61. #define SMC_IRQ { NO_IRQ, NO_IRQ }
  62. #define SMC_DMA { 0, 0 }
  63. #define MPMC_IRQ { NO_IRQ, NO_IRQ }
  64. #define MPMC_DMA { 0, 0 }
  65. #define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ }
  66. #define CLCD_DMA { 0, 0 }
  67. #define DMAC_IRQ { IRQ_DMAINT, NO_IRQ }
  68. #define DMAC_DMA { 0, 0 }
  69. /*
  70. * These devices are connected via the core APB bridge
  71. */
  72. #define SCTL_IRQ { NO_IRQ, NO_IRQ }
  73. #define SCTL_DMA { 0, 0 }
  74. #define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ }
  75. #define WATCHDOG_DMA { 0, 0 }
  76. #define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ }
  77. #define GPIO0_DMA { 0, 0 }
  78. #define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ }
  79. #define GPIO1_DMA { 0, 0 }
  80. #define RTC_IRQ { IRQ_RTCINT, NO_IRQ }
  81. #define RTC_DMA { 0, 0 }
  82. /*
  83. * These devices are connected via the DMA APB bridge
  84. */
  85. #define SCI_IRQ { IRQ_SCIINT, NO_IRQ }
  86. #define SCI_DMA { 7, 6 }
  87. #define UART0_IRQ { IRQ_UARTINT0, NO_IRQ }
  88. #define UART0_DMA { 15, 14 }
  89. #define UART1_IRQ { IRQ_UARTINT1, NO_IRQ }
  90. #define UART1_DMA { 13, 12 }
  91. #define UART2_IRQ { IRQ_UARTINT2, NO_IRQ }
  92. #define UART2_DMA { 11, 10 }
  93. #define UART3_IRQ { IRQ_UART3, NO_IRQ }
  94. #define UART3_DMA { 0x86, 0x87 }
  95. #define SSP_IRQ { IRQ_SSPINT, NO_IRQ }
  96. #define SSP_DMA { 9, 8 }
  97. extern struct platform_device realview_flash_device;
  98. extern struct platform_device realview_smc91x_device;
  99. extern struct platform_device realview_i2c_device;
  100. extern struct mmc_platform_data realview_mmc0_plat_data;
  101. extern struct mmc_platform_data realview_mmc1_plat_data;
  102. extern struct clk realview_clcd_clk;
  103. extern struct clcd_board clcd_plat_data;
  104. extern void realview_leds_event(led_event_t ledevt);
  105. #endif