core.c 6.2 KB

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  1. /*
  2. * arch/arm/mach-pnx4008/core.c
  3. *
  4. * PNX4008 core startup code
  5. *
  6. * Authors: Vitaly Wool, Dmitry Chigirev,
  7. * Grigory Tolstolytkin, Dmitry Pervushin <source@mvista.com>
  8. *
  9. * Based on reference code received from Philips:
  10. * Copyright (C) 2003 Philips Semiconductors
  11. *
  12. * 2005 (c) MontaVista Software, Inc. This file is licensed under
  13. * the terms of the GNU General Public License version 2. This program
  14. * is licensed "as is" without any warranty of any kind, whether express
  15. * or implied.
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/types.h>
  19. #include <linux/mm.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/list.h>
  22. #include <linux/init.h>
  23. #include <linux/ioport.h>
  24. #include <linux/serial_8250.h>
  25. #include <linux/device.h>
  26. #include <linux/spi/spi.h>
  27. #include <asm/hardware.h>
  28. #include <asm/io.h>
  29. #include <asm/setup.h>
  30. #include <asm/mach-types.h>
  31. #include <asm/pgtable.h>
  32. #include <asm/page.h>
  33. #include <asm/system.h>
  34. #include <asm/mach/arch.h>
  35. #include <asm/mach/map.h>
  36. #include <asm/mach/time.h>
  37. #include <asm/arch/irq.h>
  38. #include <asm/arch/clock.h>
  39. #include <asm/arch/dma.h>
  40. struct resource spipnx_0_resources[] = {
  41. {
  42. .start = PNX4008_SPI1_BASE,
  43. .end = PNX4008_SPI1_BASE + SZ_4K,
  44. .flags = IORESOURCE_MEM,
  45. }, {
  46. .start = PER_SPI1_REC_XMIT,
  47. .flags = IORESOURCE_DMA,
  48. }, {
  49. .start = SPI1_INT,
  50. .flags = IORESOURCE_IRQ,
  51. }, {
  52. .flags = 0,
  53. },
  54. };
  55. struct resource spipnx_1_resources[] = {
  56. {
  57. .start = PNX4008_SPI2_BASE,
  58. .end = PNX4008_SPI2_BASE + SZ_4K,
  59. .flags = IORESOURCE_MEM,
  60. }, {
  61. .start = PER_SPI2_REC_XMIT,
  62. .flags = IORESOURCE_DMA,
  63. }, {
  64. .start = SPI2_INT,
  65. .flags = IORESOURCE_IRQ,
  66. }, {
  67. .flags = 0,
  68. }
  69. };
  70. static struct spi_board_info spi_board_info[] __initdata = {
  71. {
  72. .modalias = "m25p80",
  73. .max_speed_hz = 1000000,
  74. .bus_num = 1,
  75. .chip_select = 0,
  76. },
  77. };
  78. static struct platform_device spipnx_1 = {
  79. .name = "spipnx",
  80. .id = 1,
  81. .num_resources = ARRAY_SIZE(spipnx_0_resources),
  82. .resource = spipnx_0_resources,
  83. .dev = {
  84. .coherent_dma_mask = 0xFFFFFFFF,
  85. },
  86. };
  87. static struct platform_device spipnx_2 = {
  88. .name = "spipnx",
  89. .id = 2,
  90. .num_resources = ARRAY_SIZE(spipnx_1_resources),
  91. .resource = spipnx_1_resources,
  92. .dev = {
  93. .coherent_dma_mask = 0xFFFFFFFF,
  94. },
  95. };
  96. static struct plat_serial8250_port platform_serial_ports[] = {
  97. {
  98. .membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART5_BASE)),
  99. .mapbase = (unsigned long)PNX4008_UART5_BASE,
  100. .irq = IIR5_INT,
  101. .uartclk = PNX4008_UART_CLK,
  102. .regshift = 2,
  103. .iotype = UPIO_MEM,
  104. .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | UPF_SKIP_TEST,
  105. },
  106. {
  107. .membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART3_BASE)),
  108. .mapbase = (unsigned long)PNX4008_UART3_BASE,
  109. .irq = IIR3_INT,
  110. .uartclk = PNX4008_UART_CLK,
  111. .regshift = 2,
  112. .iotype = UPIO_MEM,
  113. .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | UPF_SKIP_TEST,
  114. },
  115. {}
  116. };
  117. static struct platform_device serial_device = {
  118. .name = "serial8250",
  119. .id = PLAT8250_DEV_PLATFORM,
  120. .dev = {
  121. .platform_data = &platform_serial_ports,
  122. },
  123. };
  124. static struct platform_device nand_flash_device = {
  125. .name = "pnx4008-flash",
  126. .id = -1,
  127. .dev = {
  128. .coherent_dma_mask = 0xFFFFFFFF,
  129. },
  130. };
  131. /* The dmamask must be set for OHCI to work */
  132. static u64 ohci_dmamask = ~(u32) 0;
  133. static struct resource ohci_resources[] = {
  134. {
  135. .start = IO_ADDRESS(PNX4008_USB_CONFIG_BASE),
  136. .end = IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0x100),
  137. .flags = IORESOURCE_MEM,
  138. }, {
  139. .start = USB_HOST_INT,
  140. .flags = IORESOURCE_IRQ,
  141. },
  142. };
  143. static struct platform_device ohci_device = {
  144. .name = "pnx4008-usb-ohci",
  145. .id = -1,
  146. .dev = {
  147. .dma_mask = &ohci_dmamask,
  148. .coherent_dma_mask = 0xffffffff,
  149. },
  150. .num_resources = ARRAY_SIZE(ohci_resources),
  151. .resource = ohci_resources,
  152. };
  153. static struct platform_device sdum_device = {
  154. .name = "pnx4008-sdum",
  155. .id = 0,
  156. .dev = {
  157. .coherent_dma_mask = 0xffffffff,
  158. },
  159. };
  160. static struct platform_device rgbfb_device = {
  161. .name = "pnx4008-rgbfb",
  162. .id = 0,
  163. .dev = {
  164. .coherent_dma_mask = 0xffffffff,
  165. }
  166. };
  167. struct resource watchdog_resources[] = {
  168. {
  169. .start = PNX4008_WDOG_BASE,
  170. .end = PNX4008_WDOG_BASE + SZ_4K - 1,
  171. .flags = IORESOURCE_MEM,
  172. },
  173. };
  174. static struct platform_device watchdog_device = {
  175. .name = "pnx4008-watchdog",
  176. .id = -1,
  177. .num_resources = ARRAY_SIZE(watchdog_resources),
  178. .resource = watchdog_resources,
  179. };
  180. static struct platform_device *devices[] __initdata = {
  181. &spipnx_1,
  182. &spipnx_2,
  183. &serial_device,
  184. &ohci_device,
  185. &nand_flash_device,
  186. &sdum_device,
  187. &rgbfb_device,
  188. &watchdog_device,
  189. };
  190. extern void pnx4008_uart_init(void);
  191. static void __init pnx4008_init(void)
  192. {
  193. /*disable all START interrupt sources,
  194. and clear all START interrupt flags */
  195. __raw_writel(0, START_INT_ER_REG(SE_PIN_BASE_INT));
  196. __raw_writel(0, START_INT_ER_REG(SE_INT_BASE_INT));
  197. __raw_writel(0xffffffff, START_INT_RSR_REG(SE_PIN_BASE_INT));
  198. __raw_writel(0xffffffff, START_INT_RSR_REG(SE_INT_BASE_INT));
  199. platform_add_devices(devices, ARRAY_SIZE(devices));
  200. spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
  201. /* Switch on the UART clocks */
  202. pnx4008_uart_init();
  203. }
  204. static struct map_desc pnx4008_io_desc[] __initdata = {
  205. {
  206. .virtual = IO_ADDRESS(PNX4008_IRAM_BASE),
  207. .pfn = __phys_to_pfn(PNX4008_IRAM_BASE),
  208. .length = SZ_64K,
  209. .type = MT_DEVICE,
  210. }, {
  211. .virtual = IO_ADDRESS(PNX4008_NDF_FLASH_BASE),
  212. .pfn = __phys_to_pfn(PNX4008_NDF_FLASH_BASE),
  213. .length = SZ_1M - SZ_128K,
  214. .type = MT_DEVICE,
  215. }, {
  216. .virtual = IO_ADDRESS(PNX4008_JPEG_CONFIG_BASE),
  217. .pfn = __phys_to_pfn(PNX4008_JPEG_CONFIG_BASE),
  218. .length = SZ_128K * 3,
  219. .type = MT_DEVICE,
  220. }, {
  221. .virtual = IO_ADDRESS(PNX4008_DMA_CONFIG_BASE),
  222. .pfn = __phys_to_pfn(PNX4008_DMA_CONFIG_BASE),
  223. .length = SZ_1M,
  224. .type = MT_DEVICE,
  225. }, {
  226. .virtual = IO_ADDRESS(PNX4008_AHB2FAB_BASE),
  227. .pfn = __phys_to_pfn(PNX4008_AHB2FAB_BASE),
  228. .length = SZ_1M,
  229. .type = MT_DEVICE,
  230. },
  231. };
  232. void __init pnx4008_map_io(void)
  233. {
  234. iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc));
  235. }
  236. extern struct sys_timer pnx4008_timer;
  237. MACHINE_START(PNX4008, "Philips PNX4008")
  238. /* Maintainer: MontaVista Software Inc. */
  239. .phys_io = 0x40090000,
  240. .io_pg_offst = (0xf4090000 >> 18) & 0xfffc,
  241. .boot_params = 0x80000100,
  242. .map_io = pnx4008_map_io,
  243. .init_irq = pnx4008_init_irq,
  244. .init_machine = pnx4008_init,
  245. .timer = &pnx4008_timer,
  246. MACHINE_END