ixdp2800.c 7.3 KB

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  1. /*
  2. * arch/arm/mach-ixp2000/ixdp2800.c
  3. *
  4. * IXDP2800 platform support
  5. *
  6. * Original Author: Jeffrey Daly <jeffrey.daly@intel.com>
  7. * Maintainer: Deepak Saxena <dsaxena@plexity.net>
  8. *
  9. * Copyright (C) 2002 Intel Corp.
  10. * Copyright (C) 2003-2004 MontaVista Software, Inc.
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/mm.h>
  20. #include <linux/sched.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/device.h>
  23. #include <linux/bitops.h>
  24. #include <linux/pci.h>
  25. #include <linux/ioport.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <asm/io.h>
  29. #include <asm/irq.h>
  30. #include <asm/pgtable.h>
  31. #include <asm/page.h>
  32. #include <asm/system.h>
  33. #include <asm/hardware.h>
  34. #include <asm/mach-types.h>
  35. #include <asm/mach/pci.h>
  36. #include <asm/mach/map.h>
  37. #include <asm/mach/irq.h>
  38. #include <asm/mach/time.h>
  39. #include <asm/mach/flash.h>
  40. #include <asm/mach/arch.h>
  41. /*************************************************************************
  42. * IXDP2800 timer tick
  43. *************************************************************************/
  44. static void __init ixdp2800_timer_init(void)
  45. {
  46. ixp2000_init_time(50000000);
  47. }
  48. static struct sys_timer ixdp2800_timer = {
  49. .init = ixdp2800_timer_init,
  50. .offset = ixp2000_gettimeoffset,
  51. };
  52. /*************************************************************************
  53. * IXDP2800 PCI
  54. *************************************************************************/
  55. static void __init ixdp2800_slave_disable_pci_master(void)
  56. {
  57. *IXP2000_PCI_CMDSTAT &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
  58. }
  59. static void __init ixdp2800_master_wait_for_slave(void)
  60. {
  61. volatile u32 *addr;
  62. printk(KERN_INFO "IXDP2800: waiting for slave NPU to configure "
  63. "its BAR sizes\n");
  64. addr = ixp2000_pci_config_addr(0, IXDP2X00_SLAVE_NPU_DEVFN,
  65. PCI_BASE_ADDRESS_1);
  66. do {
  67. *addr = 0xffffffff;
  68. cpu_relax();
  69. } while (*addr != 0xfe000008);
  70. addr = ixp2000_pci_config_addr(0, IXDP2X00_SLAVE_NPU_DEVFN,
  71. PCI_BASE_ADDRESS_2);
  72. do {
  73. *addr = 0xffffffff;
  74. cpu_relax();
  75. } while (*addr != 0xc0000008);
  76. /*
  77. * Configure the slave's SDRAM BAR by hand.
  78. */
  79. *addr = 0x40000008;
  80. }
  81. static void __init ixdp2800_slave_wait_for_master_enable(void)
  82. {
  83. printk(KERN_INFO "IXDP2800: waiting for master NPU to enable us\n");
  84. while ((*IXP2000_PCI_CMDSTAT & PCI_COMMAND_MASTER) == 0)
  85. cpu_relax();
  86. }
  87. void __init ixdp2800_pci_preinit(void)
  88. {
  89. printk("ixdp2x00_pci_preinit called\n");
  90. *IXP2000_PCI_ADDR_EXT = 0x0001e000;
  91. if (!ixdp2x00_master_npu())
  92. ixdp2800_slave_disable_pci_master();
  93. *IXP2000_PCI_SRAM_BASE_ADDR_MASK = (0x2000000 - 1) & ~0x3ffff;
  94. *IXP2000_PCI_DRAM_BASE_ADDR_MASK = (0x40000000 - 1) & ~0xfffff;
  95. ixp2000_pci_preinit();
  96. if (ixdp2x00_master_npu()) {
  97. /*
  98. * Wait until the slave set its SRAM/SDRAM BAR sizes
  99. * correctly before we proceed to scan and enumerate
  100. * the bus.
  101. */
  102. ixdp2800_master_wait_for_slave();
  103. /*
  104. * We configure the SDRAM BARs by hand because they
  105. * are 1G and fall outside of the regular allocated
  106. * PCI address space.
  107. */
  108. *IXP2000_PCI_SDRAM_BAR = 0x00000008;
  109. } else {
  110. /*
  111. * Wait for the master to complete scanning the bus
  112. * and assigning resources before we proceed to scan
  113. * the bus ourselves. Set pci=firmware to honor the
  114. * master's resource assignment.
  115. */
  116. ixdp2800_slave_wait_for_master_enable();
  117. pcibios_setup("firmware");
  118. }
  119. }
  120. /*
  121. * We assign the SDRAM BARs for the two IXP2800 CPUs by hand, outside
  122. * of the regular PCI window, because there's only 512M of outbound PCI
  123. * memory window on each IXP, while we need 1G for each of the BARs.
  124. */
  125. static void __devinit ixp2800_pci_fixup(struct pci_dev *dev)
  126. {
  127. if (machine_is_ixdp2800()) {
  128. dev->resource[2].start = 0;
  129. dev->resource[2].end = 0;
  130. dev->resource[2].flags = 0;
  131. }
  132. }
  133. DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP2800, ixp2800_pci_fixup);
  134. static int __init ixdp2800_pci_setup(int nr, struct pci_sys_data *sys)
  135. {
  136. sys->mem_offset = 0x00000000;
  137. ixp2000_pci_setup(nr, sys);
  138. return 1;
  139. }
  140. static int __init ixdp2800_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
  141. {
  142. if (ixdp2x00_master_npu()) {
  143. /*
  144. * Root bus devices. Slave NPU is only one with interrupt.
  145. * Everything else, we just return -1 which is invalid.
  146. */
  147. if(!dev->bus->self) {
  148. if(dev->devfn == IXDP2X00_SLAVE_NPU_DEVFN )
  149. return IRQ_IXDP2800_INGRESS_NPU;
  150. return -1;
  151. }
  152. /*
  153. * Bridge behind the PMC slot.
  154. */
  155. if(dev->bus->self->devfn == IXDP2X00_PMC_DEVFN &&
  156. dev->bus->parent->self->devfn == IXDP2X00_P2P_DEVFN &&
  157. !dev->bus->parent->self->bus->parent)
  158. return IRQ_IXDP2800_PMC;
  159. /*
  160. * Device behind the first bridge
  161. */
  162. if(dev->bus->self->devfn == IXDP2X00_P2P_DEVFN) {
  163. switch(dev->devfn) {
  164. case IXDP2X00_PMC_DEVFN:
  165. return IRQ_IXDP2800_PMC;
  166. case IXDP2800_MASTER_ENET_DEVFN:
  167. return IRQ_IXDP2800_EGRESS_ENET;
  168. case IXDP2800_SWITCH_FABRIC_DEVFN:
  169. return IRQ_IXDP2800_FABRIC;
  170. }
  171. }
  172. return -1;
  173. } else return IRQ_IXP2000_PCIB; /* Slave NIC interrupt */
  174. }
  175. static void __init ixdp2800_master_enable_slave(void)
  176. {
  177. volatile u32 *addr;
  178. printk(KERN_INFO "IXDP2800: enabling slave NPU\n");
  179. addr = (volatile u32 *)ixp2000_pci_config_addr(0,
  180. IXDP2X00_SLAVE_NPU_DEVFN,
  181. PCI_COMMAND);
  182. *addr |= PCI_COMMAND_MASTER;
  183. }
  184. static void __init ixdp2800_master_wait_for_slave_bus_scan(void)
  185. {
  186. volatile u32 *addr;
  187. printk(KERN_INFO "IXDP2800: waiting for slave to finish bus scan\n");
  188. addr = (volatile u32 *)ixp2000_pci_config_addr(0,
  189. IXDP2X00_SLAVE_NPU_DEVFN,
  190. PCI_COMMAND);
  191. while ((*addr & PCI_COMMAND_MEMORY) == 0)
  192. cpu_relax();
  193. }
  194. static void __init ixdp2800_slave_signal_bus_scan_completion(void)
  195. {
  196. printk(KERN_INFO "IXDP2800: bus scan done, signaling master\n");
  197. *IXP2000_PCI_CMDSTAT |= PCI_COMMAND_MEMORY;
  198. }
  199. static void __init ixdp2800_pci_postinit(void)
  200. {
  201. if (!ixdp2x00_master_npu()) {
  202. ixdp2x00_slave_pci_postinit();
  203. ixdp2800_slave_signal_bus_scan_completion();
  204. }
  205. }
  206. struct __initdata hw_pci ixdp2800_pci __initdata = {
  207. .nr_controllers = 1,
  208. .setup = ixdp2800_pci_setup,
  209. .preinit = ixdp2800_pci_preinit,
  210. .postinit = ixdp2800_pci_postinit,
  211. .scan = ixp2000_pci_scan_bus,
  212. .map_irq = ixdp2800_pci_map_irq,
  213. };
  214. int __init ixdp2800_pci_init(void)
  215. {
  216. if (machine_is_ixdp2800()) {
  217. struct pci_dev *dev;
  218. pci_common_init(&ixdp2800_pci);
  219. if (ixdp2x00_master_npu()) {
  220. dev = pci_get_bus_and_slot(1, IXDP2800_SLAVE_ENET_DEVFN);
  221. pci_remove_bus_device(dev);
  222. pci_dev_put(dev);
  223. ixdp2800_master_enable_slave();
  224. ixdp2800_master_wait_for_slave_bus_scan();
  225. } else {
  226. dev = pci_get_bus_and_slot(1, IXDP2800_MASTER_ENET_DEVFN);
  227. pci_remove_bus_device(dev);
  228. pci_dev_put(dev);
  229. }
  230. }
  231. return 0;
  232. }
  233. subsys_initcall(ixdp2800_pci_init);
  234. void ixdp2800_init_irq(void)
  235. {
  236. ixdp2x00_init_irq(IXDP2800_CPLD_INT_STAT, IXDP2800_CPLD_INT_MASK, IXDP2800_NR_IRQS);
  237. }
  238. MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform")
  239. /* Maintainer: MontaVista Software, Inc. */
  240. .phys_io = IXP2000_UART_PHYS_BASE,
  241. .io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc,
  242. .boot_params = 0x00000100,
  243. .map_io = ixdp2x00_map_io,
  244. .init_irq = ixdp2800_init_irq,
  245. .timer = &ixdp2800_timer,
  246. .init_machine = ixdp2x00_init_machine,
  247. MACHINE_END