netwinder-hw.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662
  1. /*
  2. * linux/arch/arm/mach-footbridge/netwinder-hw.c
  3. *
  4. * Netwinder machine fixup
  5. *
  6. * Copyright (C) 1998, 1999 Russell King, Phil Blundell
  7. */
  8. #include <linux/module.h>
  9. #include <linux/ioport.h>
  10. #include <linux/kernel.h>
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <asm/hardware/dec21285.h>
  14. #include <asm/io.h>
  15. #include <asm/leds.h>
  16. #include <asm/mach-types.h>
  17. #include <asm/setup.h>
  18. #include <asm/mach/arch.h>
  19. #include "common.h"
  20. #define IRDA_IO_BASE 0x180
  21. #define GP1_IO_BASE 0x338
  22. #define GP2_IO_BASE 0x33a
  23. #ifdef CONFIG_LEDS
  24. #define DEFAULT_LEDS 0
  25. #else
  26. #define DEFAULT_LEDS GPIO_GREEN_LED
  27. #endif
  28. /*
  29. * Winbond WB83977F accessibility stuff
  30. */
  31. static inline void wb977_open(void)
  32. {
  33. outb(0x87, 0x370);
  34. outb(0x87, 0x370);
  35. }
  36. static inline void wb977_close(void)
  37. {
  38. outb(0xaa, 0x370);
  39. }
  40. static inline void wb977_wb(int reg, int val)
  41. {
  42. outb(reg, 0x370);
  43. outb(val, 0x371);
  44. }
  45. static inline void wb977_ww(int reg, int val)
  46. {
  47. outb(reg, 0x370);
  48. outb(val >> 8, 0x371);
  49. outb(reg + 1, 0x370);
  50. outb(val & 255, 0x371);
  51. }
  52. #define wb977_device_select(dev) wb977_wb(0x07, dev)
  53. #define wb977_device_disable() wb977_wb(0x30, 0x00)
  54. #define wb977_device_enable() wb977_wb(0x30, 0x01)
  55. /*
  56. * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE
  57. */
  58. DEFINE_SPINLOCK(gpio_lock);
  59. static unsigned int current_gpio_op;
  60. static unsigned int current_gpio_io;
  61. static unsigned int current_cpld;
  62. void gpio_modify_op(int mask, int set)
  63. {
  64. unsigned int new_gpio, changed;
  65. new_gpio = (current_gpio_op & ~mask) | set;
  66. changed = new_gpio ^ current_gpio_op;
  67. current_gpio_op = new_gpio;
  68. if (changed & 0xff)
  69. outb(new_gpio, GP1_IO_BASE);
  70. if (changed & 0xff00)
  71. outb(new_gpio >> 8, GP2_IO_BASE);
  72. }
  73. static inline void __gpio_modify_io(int mask, int in)
  74. {
  75. unsigned int new_gpio, changed;
  76. int port;
  77. new_gpio = (current_gpio_io & ~mask) | in;
  78. changed = new_gpio ^ current_gpio_io;
  79. current_gpio_io = new_gpio;
  80. changed >>= 1;
  81. new_gpio >>= 1;
  82. wb977_device_select(7);
  83. for (port = 0xe1; changed && port < 0xe8; changed >>= 1) {
  84. wb977_wb(port, new_gpio & 1);
  85. port += 1;
  86. new_gpio >>= 1;
  87. }
  88. wb977_device_select(8);
  89. for (port = 0xe8; changed && port < 0xec; changed >>= 1) {
  90. wb977_wb(port, new_gpio & 1);
  91. port += 1;
  92. new_gpio >>= 1;
  93. }
  94. }
  95. void gpio_modify_io(int mask, int in)
  96. {
  97. /* Open up the SuperIO chip */
  98. wb977_open();
  99. __gpio_modify_io(mask, in);
  100. /* Close up the EFER gate */
  101. wb977_close();
  102. }
  103. int gpio_read(void)
  104. {
  105. return inb(GP1_IO_BASE) | inb(GP2_IO_BASE) << 8;
  106. }
  107. /*
  108. * Initialise the Winbond W83977F global registers
  109. */
  110. static inline void wb977_init_global(void)
  111. {
  112. /*
  113. * Enable R/W config registers
  114. */
  115. wb977_wb(0x26, 0x40);
  116. /*
  117. * Power down FDC (not used)
  118. */
  119. wb977_wb(0x22, 0xfe);
  120. /*
  121. * GP12, GP11, CIRRX, IRRXH, GP10
  122. */
  123. wb977_wb(0x2a, 0xc1);
  124. /*
  125. * GP23, GP22, GP21, GP20, GP13
  126. */
  127. wb977_wb(0x2b, 0x6b);
  128. /*
  129. * GP17, GP16, GP15, GP14
  130. */
  131. wb977_wb(0x2c, 0x55);
  132. }
  133. /*
  134. * Initialise the Winbond W83977F printer port
  135. */
  136. static inline void wb977_init_printer(void)
  137. {
  138. wb977_device_select(1);
  139. /*
  140. * mode 1 == EPP
  141. */
  142. wb977_wb(0xf0, 0x01);
  143. }
  144. /*
  145. * Initialise the Winbond W83977F keyboard controller
  146. */
  147. static inline void wb977_init_keyboard(void)
  148. {
  149. wb977_device_select(5);
  150. /*
  151. * Keyboard controller address
  152. */
  153. wb977_ww(0x60, 0x0060);
  154. wb977_ww(0x62, 0x0064);
  155. /*
  156. * Keyboard IRQ 1, active high, edge trigger
  157. */
  158. wb977_wb(0x70, 1);
  159. wb977_wb(0x71, 0x02);
  160. /*
  161. * Mouse IRQ 5, active high, edge trigger
  162. */
  163. wb977_wb(0x72, 5);
  164. wb977_wb(0x73, 0x02);
  165. /*
  166. * KBC 8MHz
  167. */
  168. wb977_wb(0xf0, 0x40);
  169. /*
  170. * Enable device
  171. */
  172. wb977_device_enable();
  173. }
  174. /*
  175. * Initialise the Winbond W83977F Infra-Red device
  176. */
  177. static inline void wb977_init_irda(void)
  178. {
  179. wb977_device_select(6);
  180. /*
  181. * IR base address
  182. */
  183. wb977_ww(0x60, IRDA_IO_BASE);
  184. /*
  185. * IRDA IRQ 6, active high, edge trigger
  186. */
  187. wb977_wb(0x70, 6);
  188. wb977_wb(0x71, 0x02);
  189. /*
  190. * RX DMA - ISA DMA 0
  191. */
  192. wb977_wb(0x74, 0x00);
  193. /*
  194. * TX DMA - Disable Tx DMA
  195. */
  196. wb977_wb(0x75, 0x04);
  197. /*
  198. * Append CRC, Enable bank selection
  199. */
  200. wb977_wb(0xf0, 0x03);
  201. /*
  202. * Enable device
  203. */
  204. wb977_device_enable();
  205. }
  206. /*
  207. * Initialise Winbond W83977F general purpose IO
  208. */
  209. static inline void wb977_init_gpio(void)
  210. {
  211. unsigned long flags;
  212. /*
  213. * Set up initial I/O definitions
  214. */
  215. current_gpio_io = -1;
  216. __gpio_modify_io(-1, GPIO_DONE | GPIO_WDTIMER);
  217. wb977_device_select(7);
  218. /*
  219. * Group1 base address
  220. */
  221. wb977_ww(0x60, GP1_IO_BASE);
  222. wb977_ww(0x62, 0);
  223. wb977_ww(0x64, 0);
  224. /*
  225. * GP10 (Orage button) IRQ 10, active high, edge trigger
  226. */
  227. wb977_wb(0x70, 10);
  228. wb977_wb(0x71, 0x02);
  229. /*
  230. * GP10: Debounce filter enabled, IRQ, input
  231. */
  232. wb977_wb(0xe0, 0x19);
  233. /*
  234. * Enable Group1
  235. */
  236. wb977_device_enable();
  237. wb977_device_select(8);
  238. /*
  239. * Group2 base address
  240. */
  241. wb977_ww(0x60, GP2_IO_BASE);
  242. /*
  243. * Clear watchdog timer regs
  244. * - timer disable
  245. */
  246. wb977_wb(0xf2, 0x00);
  247. /*
  248. * - disable LED, no mouse nor keyboard IRQ
  249. */
  250. wb977_wb(0xf3, 0x00);
  251. /*
  252. * - timer counting, disable power LED, disable timeouot
  253. */
  254. wb977_wb(0xf4, 0x00);
  255. /*
  256. * Enable group2
  257. */
  258. wb977_device_enable();
  259. /*
  260. * Set Group1/Group2 outputs
  261. */
  262. spin_lock_irqsave(&gpio_lock, flags);
  263. gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN);
  264. spin_unlock_irqrestore(&gpio_lock, flags);
  265. }
  266. /*
  267. * Initialise the Winbond W83977F chip.
  268. */
  269. static void __init wb977_init(void)
  270. {
  271. request_region(0x370, 2, "W83977AF configuration");
  272. /*
  273. * Open up the SuperIO chip
  274. */
  275. wb977_open();
  276. /*
  277. * Initialise the global registers
  278. */
  279. wb977_init_global();
  280. /*
  281. * Initialise the various devices in
  282. * the multi-IO chip.
  283. */
  284. wb977_init_printer();
  285. wb977_init_keyboard();
  286. wb977_init_irda();
  287. wb977_init_gpio();
  288. /*
  289. * Close up the EFER gate
  290. */
  291. wb977_close();
  292. }
  293. void cpld_modify(int mask, int set)
  294. {
  295. int msk;
  296. current_cpld = (current_cpld & ~mask) | set;
  297. gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0);
  298. gpio_modify_op(GPIO_IOLOAD, 0);
  299. for (msk = 8; msk; msk >>= 1) {
  300. int bit = current_cpld & msk;
  301. gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0);
  302. gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK);
  303. }
  304. gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0);
  305. gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK);
  306. gpio_modify_op(GPIO_IOLOAD, 0);
  307. }
  308. static void __init cpld_init(void)
  309. {
  310. unsigned long flags;
  311. spin_lock_irqsave(&gpio_lock, flags);
  312. cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE);
  313. spin_unlock_irqrestore(&gpio_lock, flags);
  314. }
  315. static unsigned char rwa_unlock[] __initdata =
  316. { 0x00, 0x00, 0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b,
  317. 0x0d, 0x86, 0xc3, 0x61, 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45, 0xa2, 0xd1, 0xe8, 0x74,
  318. 0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39 };
  319. #ifndef DEBUG
  320. #define dprintk(x...)
  321. #else
  322. #define dprintk(x...) printk(x)
  323. #endif
  324. #define WRITE_RWA(r,v) do { outb((r), 0x279); udelay(10); outb((v), 0xa79); } while (0)
  325. static inline void rwa010_unlock(void)
  326. {
  327. int i;
  328. WRITE_RWA(2, 2);
  329. mdelay(10);
  330. for (i = 0; i < sizeof(rwa_unlock); i++) {
  331. outb(rwa_unlock[i], 0x279);
  332. udelay(10);
  333. }
  334. }
  335. static inline void rwa010_read_ident(void)
  336. {
  337. unsigned char si[9];
  338. int i, j;
  339. WRITE_RWA(3, 0);
  340. WRITE_RWA(0, 128);
  341. outb(1, 0x279);
  342. mdelay(1);
  343. dprintk("Identifier: ");
  344. for (i = 0; i < 9; i++) {
  345. si[i] = 0;
  346. for (j = 0; j < 8; j++) {
  347. int bit;
  348. udelay(250);
  349. inb(0x203);
  350. udelay(250);
  351. bit = inb(0x203);
  352. dprintk("%02X ", bit);
  353. bit = (bit == 0xaa) ? 1 : 0;
  354. si[i] |= bit << j;
  355. }
  356. dprintk("(%02X) ", si[i]);
  357. }
  358. dprintk("\n");
  359. }
  360. static inline void rwa010_global_init(void)
  361. {
  362. WRITE_RWA(6, 2); // Assign a card no = 2
  363. dprintk("Card no = %d\n", inb(0x203));
  364. /* disable the modem section of the chip */
  365. WRITE_RWA(7, 3);
  366. WRITE_RWA(0x30, 0);
  367. /* disable the cdrom section of the chip */
  368. WRITE_RWA(7, 4);
  369. WRITE_RWA(0x30, 0);
  370. /* disable the MPU-401 section of the chip */
  371. WRITE_RWA(7, 2);
  372. WRITE_RWA(0x30, 0);
  373. }
  374. static inline void rwa010_game_port_init(void)
  375. {
  376. int i;
  377. WRITE_RWA(7, 5);
  378. dprintk("Slider base: ");
  379. WRITE_RWA(0x61, 1);
  380. i = inb(0x203);
  381. WRITE_RWA(0x60, 2);
  382. dprintk("%02X%02X (201)\n", inb(0x203), i);
  383. WRITE_RWA(0x30, 1);
  384. }
  385. static inline void rwa010_waveartist_init(int base, int irq, int dma)
  386. {
  387. int i;
  388. WRITE_RWA(7, 0);
  389. dprintk("WaveArtist base: ");
  390. WRITE_RWA(0x61, base & 255);
  391. i = inb(0x203);
  392. WRITE_RWA(0x60, base >> 8);
  393. dprintk("%02X%02X (%X),", inb(0x203), i, base);
  394. WRITE_RWA(0x70, irq);
  395. dprintk(" irq: %d (%d),", inb(0x203), irq);
  396. WRITE_RWA(0x74, dma);
  397. dprintk(" dma: %d (%d)\n", inb(0x203), dma);
  398. WRITE_RWA(0x30, 1);
  399. }
  400. static inline void rwa010_soundblaster_init(int sb_base, int al_base, int irq, int dma)
  401. {
  402. int i;
  403. WRITE_RWA(7, 1);
  404. dprintk("SoundBlaster base: ");
  405. WRITE_RWA(0x61, sb_base & 255);
  406. i = inb(0x203);
  407. WRITE_RWA(0x60, sb_base >> 8);
  408. dprintk("%02X%02X (%X),", inb(0x203), i, sb_base);
  409. dprintk(" irq: ");
  410. WRITE_RWA(0x70, irq);
  411. dprintk("%d (%d),", inb(0x203), irq);
  412. dprintk(" 8-bit DMA: ");
  413. WRITE_RWA(0x74, dma);
  414. dprintk("%d (%d)\n", inb(0x203), dma);
  415. dprintk("AdLib base: ");
  416. WRITE_RWA(0x63, al_base & 255);
  417. i = inb(0x203);
  418. WRITE_RWA(0x62, al_base >> 8);
  419. dprintk("%02X%02X (%X)\n", inb(0x203), i, al_base);
  420. WRITE_RWA(0x30, 1);
  421. }
  422. static void rwa010_soundblaster_reset(void)
  423. {
  424. int i;
  425. outb(1, 0x226);
  426. udelay(3);
  427. outb(0, 0x226);
  428. for (i = 0; i < 5; i++) {
  429. if (inb(0x22e) & 0x80)
  430. break;
  431. mdelay(1);
  432. }
  433. if (i == 5)
  434. printk("SoundBlaster: DSP reset failed\n");
  435. dprintk("SoundBlaster DSP reset: %02X (AA)\n", inb(0x22a));
  436. for (i = 0; i < 5; i++) {
  437. if ((inb(0x22c) & 0x80) == 0)
  438. break;
  439. mdelay(1);
  440. }
  441. if (i == 5)
  442. printk("SoundBlaster: DSP not ready\n");
  443. else {
  444. outb(0xe1, 0x22c);
  445. dprintk("SoundBlaster DSP id: ");
  446. i = inb(0x22a);
  447. udelay(1);
  448. i |= inb(0x22a) << 8;
  449. dprintk("%04X\n", i);
  450. for (i = 0; i < 5; i++) {
  451. if ((inb(0x22c) & 0x80) == 0)
  452. break;
  453. mdelay(1);
  454. }
  455. if (i == 5)
  456. printk("SoundBlaster: could not turn speaker off\n");
  457. outb(0xd3, 0x22c);
  458. }
  459. /* turn on OPL3 */
  460. outb(5, 0x38a);
  461. outb(1, 0x38b);
  462. }
  463. static void __init rwa010_init(void)
  464. {
  465. rwa010_unlock();
  466. rwa010_read_ident();
  467. rwa010_global_init();
  468. rwa010_game_port_init();
  469. rwa010_waveartist_init(0x250, 3, 7);
  470. rwa010_soundblaster_init(0x220, 0x388, 3, 1);
  471. rwa010_soundblaster_reset();
  472. }
  473. EXPORT_SYMBOL(gpio_lock);
  474. EXPORT_SYMBOL(gpio_modify_op);
  475. EXPORT_SYMBOL(gpio_modify_io);
  476. EXPORT_SYMBOL(cpld_modify);
  477. EXPORT_SYMBOL(gpio_read);
  478. /*
  479. * Initialise any other hardware after we've got the PCI bus
  480. * initialised. We may need the PCI bus to talk to this other
  481. * hardware.
  482. */
  483. static int __init nw_hw_init(void)
  484. {
  485. if (machine_is_netwinder()) {
  486. unsigned long flags;
  487. wb977_init();
  488. cpld_init();
  489. rwa010_init();
  490. spin_lock_irqsave(&gpio_lock, flags);
  491. gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS);
  492. spin_unlock_irqrestore(&gpio_lock, flags);
  493. }
  494. return 0;
  495. }
  496. __initcall(nw_hw_init);
  497. /*
  498. * Older NeTTroms either do not provide a parameters
  499. * page, or they don't supply correct information in
  500. * the parameter page.
  501. */
  502. static void __init
  503. fixup_netwinder(struct machine_desc *desc, struct tag *tags,
  504. char **cmdline, struct meminfo *mi)
  505. {
  506. #ifdef CONFIG_ISAPNP
  507. extern int isapnp_disable;
  508. /*
  509. * We must not use the kernels ISAPnP code
  510. * on the NetWinder - it will reset the settings
  511. * for the WaveArtist chip and render it inoperable.
  512. */
  513. isapnp_disable = 1;
  514. #endif
  515. }
  516. MACHINE_START(NETWINDER, "Rebel-NetWinder")
  517. /* Maintainer: Russell King/Rebel.com */
  518. .phys_io = DC21285_ARMCSR_BASE,
  519. .io_pg_offst = ((0xfe000000) >> 18) & 0xfffc,
  520. .boot_params = 0x00000100,
  521. .video_start = 0x000a0000,
  522. .video_end = 0x000bffff,
  523. .reserve_lp0 = 1,
  524. .reserve_lp2 = 1,
  525. .fixup = fixup_netwinder,
  526. .map_io = footbridge_map_io,
  527. .init_irq = footbridge_init_irq,
  528. .timer = &isa_timer,
  529. MACHINE_END