common.c 5.6 KB

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  1. /*
  2. * linux/arch/arm/mach-footbridge/common.c
  3. *
  4. * Copyright (C) 1998-2000 Russell King, Dave Gilbert.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/types.h>
  12. #include <linux/mm.h>
  13. #include <linux/ioport.h>
  14. #include <linux/list.h>
  15. #include <linux/init.h>
  16. #include <asm/pgtable.h>
  17. #include <asm/page.h>
  18. #include <asm/irq.h>
  19. #include <asm/io.h>
  20. #include <asm/mach-types.h>
  21. #include <asm/setup.h>
  22. #include <asm/hardware/dec21285.h>
  23. #include <asm/mach/irq.h>
  24. #include <asm/mach/map.h>
  25. #include "common.h"
  26. extern void __init isa_init_irq(unsigned int irq);
  27. unsigned int mem_fclk_21285 = 50000000;
  28. EXPORT_SYMBOL(mem_fclk_21285);
  29. static int __init parse_tag_memclk(const struct tag *tag)
  30. {
  31. mem_fclk_21285 = tag->u.memclk.fmemclk;
  32. return 0;
  33. }
  34. __tagtable(ATAG_MEMCLK, parse_tag_memclk);
  35. /*
  36. * Footbridge IRQ translation table
  37. * Converts from our IRQ numbers into FootBridge masks
  38. */
  39. static const int fb_irq_mask[] = {
  40. IRQ_MASK_UART_RX, /* 0 */
  41. IRQ_MASK_UART_TX, /* 1 */
  42. IRQ_MASK_TIMER1, /* 2 */
  43. IRQ_MASK_TIMER2, /* 3 */
  44. IRQ_MASK_TIMER3, /* 4 */
  45. IRQ_MASK_IN0, /* 5 */
  46. IRQ_MASK_IN1, /* 6 */
  47. IRQ_MASK_IN2, /* 7 */
  48. IRQ_MASK_IN3, /* 8 */
  49. IRQ_MASK_DOORBELLHOST, /* 9 */
  50. IRQ_MASK_DMA1, /* 10 */
  51. IRQ_MASK_DMA2, /* 11 */
  52. IRQ_MASK_PCI, /* 12 */
  53. IRQ_MASK_SDRAMPARITY, /* 13 */
  54. IRQ_MASK_I2OINPOST, /* 14 */
  55. IRQ_MASK_PCI_ABORT, /* 15 */
  56. IRQ_MASK_PCI_SERR, /* 16 */
  57. IRQ_MASK_DISCARD_TIMER, /* 17 */
  58. IRQ_MASK_PCI_DPERR, /* 18 */
  59. IRQ_MASK_PCI_PERR, /* 19 */
  60. };
  61. static void fb_mask_irq(unsigned int irq)
  62. {
  63. *CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(irq)];
  64. }
  65. static void fb_unmask_irq(unsigned int irq)
  66. {
  67. *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)];
  68. }
  69. static struct irq_chip fb_chip = {
  70. .ack = fb_mask_irq,
  71. .mask = fb_mask_irq,
  72. .unmask = fb_unmask_irq,
  73. };
  74. static void __init __fb_init_irq(void)
  75. {
  76. unsigned int irq;
  77. /*
  78. * setup DC21285 IRQs
  79. */
  80. *CSR_IRQ_DISABLE = -1;
  81. *CSR_FIQ_DISABLE = -1;
  82. for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) {
  83. set_irq_chip(irq, &fb_chip);
  84. set_irq_handler(irq, handle_level_irq);
  85. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  86. }
  87. }
  88. void __init footbridge_init_irq(void)
  89. {
  90. __fb_init_irq();
  91. if (!footbridge_cfn_mode())
  92. return;
  93. if (machine_is_ebsa285())
  94. /* The following is dependent on which slot
  95. * you plug the Southbridge card into. We
  96. * currently assume that you plug it into
  97. * the right-hand most slot.
  98. */
  99. isa_init_irq(IRQ_PCI);
  100. if (machine_is_cats())
  101. isa_init_irq(IRQ_IN2);
  102. if (machine_is_netwinder())
  103. isa_init_irq(IRQ_IN3);
  104. }
  105. /*
  106. * Common mapping for all systems. Note that the outbound write flush is
  107. * commented out since there is a "No Fix" problem with it. Not mapping
  108. * it means that we have extra bullet protection on our feet.
  109. */
  110. static struct map_desc fb_common_io_desc[] __initdata = {
  111. {
  112. .virtual = ARMCSR_BASE,
  113. .pfn = __phys_to_pfn(DC21285_ARMCSR_BASE),
  114. .length = ARMCSR_SIZE,
  115. .type = MT_DEVICE,
  116. }, {
  117. .virtual = XBUS_BASE,
  118. .pfn = __phys_to_pfn(0x40000000),
  119. .length = XBUS_SIZE,
  120. .type = MT_DEVICE,
  121. }
  122. };
  123. /*
  124. * The mapping when the footbridge is in host mode. We don't map any of
  125. * this when we are in add-in mode.
  126. */
  127. static struct map_desc ebsa285_host_io_desc[] __initdata = {
  128. #if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST)
  129. {
  130. .virtual = PCIMEM_BASE,
  131. .pfn = __phys_to_pfn(DC21285_PCI_MEM),
  132. .length = PCIMEM_SIZE,
  133. .type = MT_DEVICE,
  134. }, {
  135. .virtual = PCICFG0_BASE,
  136. .pfn = __phys_to_pfn(DC21285_PCI_TYPE_0_CONFIG),
  137. .length = PCICFG0_SIZE,
  138. .type = MT_DEVICE,
  139. }, {
  140. .virtual = PCICFG1_BASE,
  141. .pfn = __phys_to_pfn(DC21285_PCI_TYPE_1_CONFIG),
  142. .length = PCICFG1_SIZE,
  143. .type = MT_DEVICE,
  144. }, {
  145. .virtual = PCIIACK_BASE,
  146. .pfn = __phys_to_pfn(DC21285_PCI_IACK),
  147. .length = PCIIACK_SIZE,
  148. .type = MT_DEVICE,
  149. }, {
  150. .virtual = PCIO_BASE,
  151. .pfn = __phys_to_pfn(DC21285_PCI_IO),
  152. .length = PCIO_SIZE,
  153. .type = MT_DEVICE,
  154. },
  155. #endif
  156. };
  157. /*
  158. * The CO-ebsa285 mapping.
  159. */
  160. static struct map_desc co285_io_desc[] __initdata = {
  161. #ifdef CONFIG_ARCH_CO285
  162. {
  163. .virtual = PCIO_BASE,
  164. .pfn = __phys_to_pfn(DC21285_PCI_IO),
  165. .length = PCIO_SIZE,
  166. .type = MT_DEVICE,
  167. }, {
  168. .virtual = PCIMEM_BASE,
  169. .pfn = __phys_to_pfn(DC21285_PCI_MEM),
  170. .length = PCIMEM_SIZE,
  171. .type = MT_DEVICE,
  172. },
  173. #endif
  174. };
  175. void __init footbridge_map_io(void)
  176. {
  177. /*
  178. * Set up the common mapping first; we need this to
  179. * determine whether we're in host mode or not.
  180. */
  181. iotable_init(fb_common_io_desc, ARRAY_SIZE(fb_common_io_desc));
  182. /*
  183. * Now, work out what we've got to map in addition on this
  184. * platform.
  185. */
  186. if (machine_is_co285())
  187. iotable_init(co285_io_desc, ARRAY_SIZE(co285_io_desc));
  188. if (footbridge_cfn_mode())
  189. iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
  190. }
  191. #ifdef CONFIG_FOOTBRIDGE_ADDIN
  192. /*
  193. * These two functions convert virtual addresses to PCI addresses and PCI
  194. * addresses to virtual addresses. Note that it is only legal to use these
  195. * on memory obtained via get_zeroed_page or kmalloc.
  196. */
  197. unsigned long __virt_to_bus(unsigned long res)
  198. {
  199. WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
  200. return (res - PAGE_OFFSET) + (*CSR_PCISDRAMBASE & 0xfffffff0);
  201. }
  202. EXPORT_SYMBOL(__virt_to_bus);
  203. unsigned long __bus_to_virt(unsigned long res)
  204. {
  205. res -= (*CSR_PCISDRAMBASE & 0xfffffff0);
  206. res += PAGE_OFFSET;
  207. WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
  208. return res;
  209. }
  210. EXPORT_SYMBOL(__bus_to_virt);
  211. #endif