xscale-cp0.c 3.9 KB

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  1. /*
  2. * linux/arch/arm/kernel/xscale-cp0.c
  3. *
  4. * XScale DSP and iWMMXt coprocessor context switching and handling
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/types.h>
  12. #include <linux/kernel.h>
  13. #include <linux/signal.h>
  14. #include <linux/sched.h>
  15. #include <linux/init.h>
  16. #include <asm/thread_notify.h>
  17. #include <asm/io.h>
  18. static inline void dsp_save_state(u32 *state)
  19. {
  20. __asm__ __volatile__ (
  21. "mrrc p0, 0, %0, %1, c0\n"
  22. : "=r" (state[0]), "=r" (state[1]));
  23. }
  24. static inline void dsp_load_state(u32 *state)
  25. {
  26. __asm__ __volatile__ (
  27. "mcrr p0, 0, %0, %1, c0\n"
  28. : : "r" (state[0]), "r" (state[1]));
  29. }
  30. static int dsp_do(struct notifier_block *self, unsigned long cmd, void *t)
  31. {
  32. struct thread_info *thread = t;
  33. switch (cmd) {
  34. case THREAD_NOTIFY_FLUSH:
  35. thread->cpu_context.extra[0] = 0;
  36. thread->cpu_context.extra[1] = 0;
  37. break;
  38. case THREAD_NOTIFY_SWITCH:
  39. dsp_save_state(current_thread_info()->cpu_context.extra);
  40. dsp_load_state(thread->cpu_context.extra);
  41. break;
  42. }
  43. return NOTIFY_DONE;
  44. }
  45. static struct notifier_block dsp_notifier_block = {
  46. .notifier_call = dsp_do,
  47. };
  48. #ifdef CONFIG_IWMMXT
  49. static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
  50. {
  51. struct thread_info *thread = t;
  52. switch (cmd) {
  53. case THREAD_NOTIFY_FLUSH:
  54. /*
  55. * flush_thread() zeroes thread->fpstate, so no need
  56. * to do anything here.
  57. *
  58. * FALLTHROUGH: Ensure we don't try to overwrite our newly
  59. * initialised state information on the first fault.
  60. */
  61. case THREAD_NOTIFY_RELEASE:
  62. iwmmxt_task_release(thread);
  63. break;
  64. case THREAD_NOTIFY_SWITCH:
  65. iwmmxt_task_switch(thread);
  66. break;
  67. }
  68. return NOTIFY_DONE;
  69. }
  70. static struct notifier_block iwmmxt_notifier_block = {
  71. .notifier_call = iwmmxt_do,
  72. };
  73. #endif
  74. static u32 __init xscale_cp_access_read(void)
  75. {
  76. u32 value;
  77. __asm__ __volatile__ (
  78. "mrc p15, 0, %0, c15, c1, 0\n\t"
  79. : "=r" (value));
  80. return value;
  81. }
  82. static void __init xscale_cp_access_write(u32 value)
  83. {
  84. u32 temp;
  85. __asm__ __volatile__ (
  86. "mcr p15, 0, %1, c15, c1, 0\n\t"
  87. "mrc p15, 0, %0, c15, c1, 0\n\t"
  88. "mov %0, %0\n\t"
  89. "sub pc, pc, #4\n\t"
  90. : "=r" (temp) : "r" (value));
  91. }
  92. /*
  93. * Detect whether we have a MAC coprocessor (40 bit register) or an
  94. * iWMMXt coprocessor (64 bit registers) by loading 00000100:00000000
  95. * into a coprocessor register and reading it back, and checking
  96. * whether the upper word survived intact.
  97. */
  98. static int __init cpu_has_iwmmxt(void)
  99. {
  100. u32 lo;
  101. u32 hi;
  102. /*
  103. * This sequence is interpreted by the DSP coprocessor as:
  104. * mar acc0, %2, %3
  105. * mra %0, %1, acc0
  106. *
  107. * And by the iWMMXt coprocessor as:
  108. * tmcrr wR0, %2, %3
  109. * tmrrc %0, %1, wR0
  110. */
  111. __asm__ __volatile__ (
  112. "mcrr p0, 0, %2, %3, c0\n"
  113. "mrrc p0, 0, %0, %1, c0\n"
  114. : "=r" (lo), "=r" (hi)
  115. : "r" (0), "r" (0x100));
  116. return !!hi;
  117. }
  118. /*
  119. * If we detect that the CPU has iWMMXt (and CONFIG_IWMMXT=y), we
  120. * disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy
  121. * switch code handle iWMMXt context switching. If on the other
  122. * hand the CPU has a DSP coprocessor, we keep access to CP0 enabled
  123. * all the time, and save/restore acc0 on context switch in non-lazy
  124. * fashion.
  125. */
  126. static int __init xscale_cp0_init(void)
  127. {
  128. u32 cp_access;
  129. cp_access = xscale_cp_access_read() & ~3;
  130. xscale_cp_access_write(cp_access | 1);
  131. if (cpu_has_iwmmxt()) {
  132. #ifndef CONFIG_IWMMXT
  133. printk(KERN_WARNING "CAUTION: XScale iWMMXt coprocessor "
  134. "detected, but kernel support is missing.\n");
  135. #else
  136. printk(KERN_INFO "XScale iWMMXt coprocessor detected.\n");
  137. elf_hwcap |= HWCAP_IWMMXT;
  138. thread_register_notifier(&iwmmxt_notifier_block);
  139. #endif
  140. } else {
  141. printk(KERN_INFO "XScale DSP coprocessor detected.\n");
  142. thread_register_notifier(&dsp_notifier_block);
  143. cp_access |= 1;
  144. }
  145. xscale_cp_access_write(cp_access);
  146. return 0;
  147. }
  148. late_initcall(xscale_cp0_init);