ptrace.c 19 KB

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  1. /*
  2. * linux/arch/arm/kernel/ptrace.c
  3. *
  4. * By Ross Biro 1/23/92
  5. * edited by Linus Torvalds
  6. * ARM modifications Copyright (C) 2000 Russell King
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/sched.h>
  14. #include <linux/mm.h>
  15. #include <linux/smp.h>
  16. #include <linux/smp_lock.h>
  17. #include <linux/ptrace.h>
  18. #include <linux/user.h>
  19. #include <linux/security.h>
  20. #include <linux/init.h>
  21. #include <linux/signal.h>
  22. #include <asm/uaccess.h>
  23. #include <asm/pgtable.h>
  24. #include <asm/system.h>
  25. #include <asm/traps.h>
  26. #include "ptrace.h"
  27. #define REG_PC 15
  28. #define REG_PSR 16
  29. /*
  30. * does not yet catch signals sent when the child dies.
  31. * in exit.c or in signal.c.
  32. */
  33. #if 0
  34. /*
  35. * Breakpoint SWI instruction: SWI &9F0001
  36. */
  37. #define BREAKINST_ARM 0xef9f0001
  38. #define BREAKINST_THUMB 0xdf00 /* fill this in later */
  39. #else
  40. /*
  41. * New breakpoints - use an undefined instruction. The ARM architecture
  42. * reference manual guarantees that the following instruction space
  43. * will produce an undefined instruction exception on all CPUs:
  44. *
  45. * ARM: xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx
  46. * Thumb: 1101 1110 xxxx xxxx
  47. */
  48. #define BREAKINST_ARM 0xe7f001f0
  49. #define BREAKINST_THUMB 0xde01
  50. #endif
  51. /*
  52. * this routine will get a word off of the processes privileged stack.
  53. * the offset is how far from the base addr as stored in the THREAD.
  54. * this routine assumes that all the privileged stacks are in our
  55. * data space.
  56. */
  57. static inline long get_user_reg(struct task_struct *task, int offset)
  58. {
  59. return task_pt_regs(task)->uregs[offset];
  60. }
  61. /*
  62. * this routine will put a word on the processes privileged stack.
  63. * the offset is how far from the base addr as stored in the THREAD.
  64. * this routine assumes that all the privileged stacks are in our
  65. * data space.
  66. */
  67. static inline int
  68. put_user_reg(struct task_struct *task, int offset, long data)
  69. {
  70. struct pt_regs newregs, *regs = task_pt_regs(task);
  71. int ret = -EINVAL;
  72. newregs = *regs;
  73. newregs.uregs[offset] = data;
  74. if (valid_user_regs(&newregs)) {
  75. regs->uregs[offset] = data;
  76. ret = 0;
  77. }
  78. return ret;
  79. }
  80. static inline int
  81. read_u32(struct task_struct *task, unsigned long addr, u32 *res)
  82. {
  83. int ret;
  84. ret = access_process_vm(task, addr, res, sizeof(*res), 0);
  85. return ret == sizeof(*res) ? 0 : -EIO;
  86. }
  87. static inline int
  88. read_instr(struct task_struct *task, unsigned long addr, u32 *res)
  89. {
  90. int ret;
  91. if (addr & 1) {
  92. u16 val;
  93. ret = access_process_vm(task, addr & ~1, &val, sizeof(val), 0);
  94. ret = ret == sizeof(val) ? 0 : -EIO;
  95. *res = val;
  96. } else {
  97. u32 val;
  98. ret = access_process_vm(task, addr & ~3, &val, sizeof(val), 0);
  99. ret = ret == sizeof(val) ? 0 : -EIO;
  100. *res = val;
  101. }
  102. return ret;
  103. }
  104. /*
  105. * Get value of register `rn' (in the instruction)
  106. */
  107. static unsigned long
  108. ptrace_getrn(struct task_struct *child, unsigned long insn)
  109. {
  110. unsigned int reg = (insn >> 16) & 15;
  111. unsigned long val;
  112. val = get_user_reg(child, reg);
  113. if (reg == 15)
  114. val = pc_pointer(val + 8);
  115. return val;
  116. }
  117. /*
  118. * Get value of operand 2 (in an ALU instruction)
  119. */
  120. static unsigned long
  121. ptrace_getaluop2(struct task_struct *child, unsigned long insn)
  122. {
  123. unsigned long val;
  124. int shift;
  125. int type;
  126. if (insn & 1 << 25) {
  127. val = insn & 255;
  128. shift = (insn >> 8) & 15;
  129. type = 3;
  130. } else {
  131. val = get_user_reg (child, insn & 15);
  132. if (insn & (1 << 4))
  133. shift = (int)get_user_reg (child, (insn >> 8) & 15);
  134. else
  135. shift = (insn >> 7) & 31;
  136. type = (insn >> 5) & 3;
  137. }
  138. switch (type) {
  139. case 0: val <<= shift; break;
  140. case 1: val >>= shift; break;
  141. case 2:
  142. val = (((signed long)val) >> shift);
  143. break;
  144. case 3:
  145. val = (val >> shift) | (val << (32 - shift));
  146. break;
  147. }
  148. return val;
  149. }
  150. /*
  151. * Get value of operand 2 (in a LDR instruction)
  152. */
  153. static unsigned long
  154. ptrace_getldrop2(struct task_struct *child, unsigned long insn)
  155. {
  156. unsigned long val;
  157. int shift;
  158. int type;
  159. val = get_user_reg(child, insn & 15);
  160. shift = (insn >> 7) & 31;
  161. type = (insn >> 5) & 3;
  162. switch (type) {
  163. case 0: val <<= shift; break;
  164. case 1: val >>= shift; break;
  165. case 2:
  166. val = (((signed long)val) >> shift);
  167. break;
  168. case 3:
  169. val = (val >> shift) | (val << (32 - shift));
  170. break;
  171. }
  172. return val;
  173. }
  174. #define OP_MASK 0x01e00000
  175. #define OP_AND 0x00000000
  176. #define OP_EOR 0x00200000
  177. #define OP_SUB 0x00400000
  178. #define OP_RSB 0x00600000
  179. #define OP_ADD 0x00800000
  180. #define OP_ADC 0x00a00000
  181. #define OP_SBC 0x00c00000
  182. #define OP_RSC 0x00e00000
  183. #define OP_ORR 0x01800000
  184. #define OP_MOV 0x01a00000
  185. #define OP_BIC 0x01c00000
  186. #define OP_MVN 0x01e00000
  187. static unsigned long
  188. get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn)
  189. {
  190. u32 alt = 0;
  191. switch (insn & 0x0e000000) {
  192. case 0x00000000:
  193. case 0x02000000: {
  194. /*
  195. * data processing
  196. */
  197. long aluop1, aluop2, ccbit;
  198. if ((insn & 0x0fffffd0) == 0x012fff10) {
  199. /*
  200. * bx or blx
  201. */
  202. alt = get_user_reg(child, insn & 15);
  203. break;
  204. }
  205. if ((insn & 0xf000) != 0xf000)
  206. break;
  207. aluop1 = ptrace_getrn(child, insn);
  208. aluop2 = ptrace_getaluop2(child, insn);
  209. ccbit = get_user_reg(child, REG_PSR) & PSR_C_BIT ? 1 : 0;
  210. switch (insn & OP_MASK) {
  211. case OP_AND: alt = aluop1 & aluop2; break;
  212. case OP_EOR: alt = aluop1 ^ aluop2; break;
  213. case OP_SUB: alt = aluop1 - aluop2; break;
  214. case OP_RSB: alt = aluop2 - aluop1; break;
  215. case OP_ADD: alt = aluop1 + aluop2; break;
  216. case OP_ADC: alt = aluop1 + aluop2 + ccbit; break;
  217. case OP_SBC: alt = aluop1 - aluop2 + ccbit; break;
  218. case OP_RSC: alt = aluop2 - aluop1 + ccbit; break;
  219. case OP_ORR: alt = aluop1 | aluop2; break;
  220. case OP_MOV: alt = aluop2; break;
  221. case OP_BIC: alt = aluop1 & ~aluop2; break;
  222. case OP_MVN: alt = ~aluop2; break;
  223. }
  224. break;
  225. }
  226. case 0x04000000:
  227. case 0x06000000:
  228. /*
  229. * ldr
  230. */
  231. if ((insn & 0x0010f000) == 0x0010f000) {
  232. unsigned long base;
  233. base = ptrace_getrn(child, insn);
  234. if (insn & 1 << 24) {
  235. long aluop2;
  236. if (insn & 0x02000000)
  237. aluop2 = ptrace_getldrop2(child, insn);
  238. else
  239. aluop2 = insn & 0xfff;
  240. if (insn & 1 << 23)
  241. base += aluop2;
  242. else
  243. base -= aluop2;
  244. }
  245. if (read_u32(child, base, &alt) == 0)
  246. alt = pc_pointer(alt);
  247. }
  248. break;
  249. case 0x08000000:
  250. /*
  251. * ldm
  252. */
  253. if ((insn & 0x00108000) == 0x00108000) {
  254. unsigned long base;
  255. unsigned int nr_regs;
  256. if (insn & (1 << 23)) {
  257. nr_regs = hweight16(insn & 65535) << 2;
  258. if (!(insn & (1 << 24)))
  259. nr_regs -= 4;
  260. } else {
  261. if (insn & (1 << 24))
  262. nr_regs = -4;
  263. else
  264. nr_regs = 0;
  265. }
  266. base = ptrace_getrn(child, insn);
  267. if (read_u32(child, base + nr_regs, &alt) == 0)
  268. alt = pc_pointer(alt);
  269. break;
  270. }
  271. break;
  272. case 0x0a000000: {
  273. /*
  274. * bl or b
  275. */
  276. signed long displ;
  277. /* It's a branch/branch link: instead of trying to
  278. * figure out whether the branch will be taken or not,
  279. * we'll put a breakpoint at both locations. This is
  280. * simpler, more reliable, and probably not a whole lot
  281. * slower than the alternative approach of emulating the
  282. * branch.
  283. */
  284. displ = (insn & 0x00ffffff) << 8;
  285. displ = (displ >> 6) + 8;
  286. if (displ != 0 && displ != 4)
  287. alt = pc + displ;
  288. }
  289. break;
  290. }
  291. return alt;
  292. }
  293. static int
  294. swap_insn(struct task_struct *task, unsigned long addr,
  295. void *old_insn, void *new_insn, int size)
  296. {
  297. int ret;
  298. ret = access_process_vm(task, addr, old_insn, size, 0);
  299. if (ret == size)
  300. ret = access_process_vm(task, addr, new_insn, size, 1);
  301. return ret;
  302. }
  303. static void
  304. add_breakpoint(struct task_struct *task, struct debug_info *dbg, unsigned long addr)
  305. {
  306. int nr = dbg->nsaved;
  307. if (nr < 2) {
  308. u32 new_insn = BREAKINST_ARM;
  309. int res;
  310. res = swap_insn(task, addr, &dbg->bp[nr].insn, &new_insn, 4);
  311. if (res == 4) {
  312. dbg->bp[nr].address = addr;
  313. dbg->nsaved += 1;
  314. }
  315. } else
  316. printk(KERN_ERR "ptrace: too many breakpoints\n");
  317. }
  318. /*
  319. * Clear one breakpoint in the user program. We copy what the hardware
  320. * does and use bit 0 of the address to indicate whether this is a Thumb
  321. * breakpoint or an ARM breakpoint.
  322. */
  323. static void clear_breakpoint(struct task_struct *task, struct debug_entry *bp)
  324. {
  325. unsigned long addr = bp->address;
  326. union debug_insn old_insn;
  327. int ret;
  328. if (addr & 1) {
  329. ret = swap_insn(task, addr & ~1, &old_insn.thumb,
  330. &bp->insn.thumb, 2);
  331. if (ret != 2 || old_insn.thumb != BREAKINST_THUMB)
  332. printk(KERN_ERR "%s:%d: corrupted Thumb breakpoint at "
  333. "0x%08lx (0x%04x)\n", task->comm, task->pid,
  334. addr, old_insn.thumb);
  335. } else {
  336. ret = swap_insn(task, addr & ~3, &old_insn.arm,
  337. &bp->insn.arm, 4);
  338. if (ret != 4 || old_insn.arm != BREAKINST_ARM)
  339. printk(KERN_ERR "%s:%d: corrupted ARM breakpoint at "
  340. "0x%08lx (0x%08x)\n", task->comm, task->pid,
  341. addr, old_insn.arm);
  342. }
  343. }
  344. void ptrace_set_bpt(struct task_struct *child)
  345. {
  346. struct pt_regs *regs;
  347. unsigned long pc;
  348. u32 insn;
  349. int res;
  350. regs = task_pt_regs(child);
  351. pc = instruction_pointer(regs);
  352. if (thumb_mode(regs)) {
  353. printk(KERN_WARNING "ptrace: can't handle thumb mode\n");
  354. return;
  355. }
  356. res = read_instr(child, pc, &insn);
  357. if (!res) {
  358. struct debug_info *dbg = &child->thread.debug;
  359. unsigned long alt;
  360. dbg->nsaved = 0;
  361. alt = get_branch_address(child, pc, insn);
  362. if (alt)
  363. add_breakpoint(child, dbg, alt);
  364. /*
  365. * Note that we ignore the result of setting the above
  366. * breakpoint since it may fail. When it does, this is
  367. * not so much an error, but a forewarning that we may
  368. * be receiving a prefetch abort shortly.
  369. *
  370. * If we don't set this breakpoint here, then we can
  371. * lose control of the thread during single stepping.
  372. */
  373. if (!alt || predicate(insn) != PREDICATE_ALWAYS)
  374. add_breakpoint(child, dbg, pc + 4);
  375. }
  376. }
  377. /*
  378. * Ensure no single-step breakpoint is pending. Returns non-zero
  379. * value if child was being single-stepped.
  380. */
  381. void ptrace_cancel_bpt(struct task_struct *child)
  382. {
  383. int i, nsaved = child->thread.debug.nsaved;
  384. child->thread.debug.nsaved = 0;
  385. if (nsaved > 2) {
  386. printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved);
  387. nsaved = 2;
  388. }
  389. for (i = 0; i < nsaved; i++)
  390. clear_breakpoint(child, &child->thread.debug.bp[i]);
  391. }
  392. /*
  393. * Called by kernel/ptrace.c when detaching..
  394. *
  395. * Make sure the single step bit is not set.
  396. */
  397. void ptrace_disable(struct task_struct *child)
  398. {
  399. child->ptrace &= ~PT_SINGLESTEP;
  400. ptrace_cancel_bpt(child);
  401. }
  402. /*
  403. * Handle hitting a breakpoint.
  404. */
  405. void ptrace_break(struct task_struct *tsk, struct pt_regs *regs)
  406. {
  407. siginfo_t info;
  408. ptrace_cancel_bpt(tsk);
  409. info.si_signo = SIGTRAP;
  410. info.si_errno = 0;
  411. info.si_code = TRAP_BRKPT;
  412. info.si_addr = (void __user *)instruction_pointer(regs);
  413. force_sig_info(SIGTRAP, &info, tsk);
  414. }
  415. static int break_trap(struct pt_regs *regs, unsigned int instr)
  416. {
  417. ptrace_break(current, regs);
  418. return 0;
  419. }
  420. static struct undef_hook arm_break_hook = {
  421. .instr_mask = 0x0fffffff,
  422. .instr_val = 0x07f001f0,
  423. .cpsr_mask = PSR_T_BIT,
  424. .cpsr_val = 0,
  425. .fn = break_trap,
  426. };
  427. static struct undef_hook thumb_break_hook = {
  428. .instr_mask = 0xffff,
  429. .instr_val = 0xde01,
  430. .cpsr_mask = PSR_T_BIT,
  431. .cpsr_val = PSR_T_BIT,
  432. .fn = break_trap,
  433. };
  434. static int __init ptrace_break_init(void)
  435. {
  436. register_undef_hook(&arm_break_hook);
  437. register_undef_hook(&thumb_break_hook);
  438. return 0;
  439. }
  440. core_initcall(ptrace_break_init);
  441. /*
  442. * Read the word at offset "off" into the "struct user". We
  443. * actually access the pt_regs stored on the kernel stack.
  444. */
  445. static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
  446. unsigned long __user *ret)
  447. {
  448. unsigned long tmp;
  449. if (off & 3 || off >= sizeof(struct user))
  450. return -EIO;
  451. tmp = 0;
  452. if (off < sizeof(struct pt_regs))
  453. tmp = get_user_reg(tsk, off >> 2);
  454. return put_user(tmp, ret);
  455. }
  456. /*
  457. * Write the word at offset "off" into "struct user". We
  458. * actually access the pt_regs stored on the kernel stack.
  459. */
  460. static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
  461. unsigned long val)
  462. {
  463. if (off & 3 || off >= sizeof(struct user))
  464. return -EIO;
  465. if (off >= sizeof(struct pt_regs))
  466. return 0;
  467. return put_user_reg(tsk, off >> 2, val);
  468. }
  469. /*
  470. * Get all user integer registers.
  471. */
  472. static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
  473. {
  474. struct pt_regs *regs = task_pt_regs(tsk);
  475. return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
  476. }
  477. /*
  478. * Set all user integer registers.
  479. */
  480. static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
  481. {
  482. struct pt_regs newregs;
  483. int ret;
  484. ret = -EFAULT;
  485. if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
  486. struct pt_regs *regs = task_pt_regs(tsk);
  487. ret = -EINVAL;
  488. if (valid_user_regs(&newregs)) {
  489. *regs = newregs;
  490. ret = 0;
  491. }
  492. }
  493. return ret;
  494. }
  495. /*
  496. * Get the child FPU state.
  497. */
  498. static int ptrace_getfpregs(struct task_struct *tsk, void __user *ufp)
  499. {
  500. return copy_to_user(ufp, &task_thread_info(tsk)->fpstate,
  501. sizeof(struct user_fp)) ? -EFAULT : 0;
  502. }
  503. /*
  504. * Set the child FPU state.
  505. */
  506. static int ptrace_setfpregs(struct task_struct *tsk, void __user *ufp)
  507. {
  508. struct thread_info *thread = task_thread_info(tsk);
  509. thread->used_cp[1] = thread->used_cp[2] = 1;
  510. return copy_from_user(&thread->fpstate, ufp,
  511. sizeof(struct user_fp)) ? -EFAULT : 0;
  512. }
  513. #ifdef CONFIG_IWMMXT
  514. /*
  515. * Get the child iWMMXt state.
  516. */
  517. static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp)
  518. {
  519. struct thread_info *thread = task_thread_info(tsk);
  520. if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
  521. return -ENODATA;
  522. iwmmxt_task_disable(thread); /* force it to ram */
  523. return copy_to_user(ufp, &thread->fpstate.iwmmxt, IWMMXT_SIZE)
  524. ? -EFAULT : 0;
  525. }
  526. /*
  527. * Set the child iWMMXt state.
  528. */
  529. static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp)
  530. {
  531. struct thread_info *thread = task_thread_info(tsk);
  532. if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
  533. return -EACCES;
  534. iwmmxt_task_release(thread); /* force a reload */
  535. return copy_from_user(&thread->fpstate.iwmmxt, ufp, IWMMXT_SIZE)
  536. ? -EFAULT : 0;
  537. }
  538. #endif
  539. #ifdef CONFIG_CRUNCH
  540. /*
  541. * Get the child Crunch state.
  542. */
  543. static int ptrace_getcrunchregs(struct task_struct *tsk, void __user *ufp)
  544. {
  545. struct thread_info *thread = task_thread_info(tsk);
  546. crunch_task_disable(thread); /* force it to ram */
  547. return copy_to_user(ufp, &thread->crunchstate, CRUNCH_SIZE)
  548. ? -EFAULT : 0;
  549. }
  550. /*
  551. * Set the child Crunch state.
  552. */
  553. static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp)
  554. {
  555. struct thread_info *thread = task_thread_info(tsk);
  556. crunch_task_release(thread); /* force a reload */
  557. return copy_from_user(&thread->crunchstate, ufp, CRUNCH_SIZE)
  558. ? -EFAULT : 0;
  559. }
  560. #endif
  561. long arch_ptrace(struct task_struct *child, long request, long addr, long data)
  562. {
  563. unsigned long tmp;
  564. int ret;
  565. switch (request) {
  566. /*
  567. * read word at location "addr" in the child process.
  568. */
  569. case PTRACE_PEEKTEXT:
  570. case PTRACE_PEEKDATA:
  571. ret = access_process_vm(child, addr, &tmp,
  572. sizeof(unsigned long), 0);
  573. if (ret == sizeof(unsigned long))
  574. ret = put_user(tmp, (unsigned long __user *) data);
  575. else
  576. ret = -EIO;
  577. break;
  578. case PTRACE_PEEKUSR:
  579. ret = ptrace_read_user(child, addr, (unsigned long __user *)data);
  580. break;
  581. /*
  582. * write the word at location addr.
  583. */
  584. case PTRACE_POKETEXT:
  585. case PTRACE_POKEDATA:
  586. ret = access_process_vm(child, addr, &data,
  587. sizeof(unsigned long), 1);
  588. if (ret == sizeof(unsigned long))
  589. ret = 0;
  590. else
  591. ret = -EIO;
  592. break;
  593. case PTRACE_POKEUSR:
  594. ret = ptrace_write_user(child, addr, data);
  595. break;
  596. /*
  597. * continue/restart and stop at next (return from) syscall
  598. */
  599. case PTRACE_SYSCALL:
  600. case PTRACE_CONT:
  601. ret = -EIO;
  602. if (!valid_signal(data))
  603. break;
  604. if (request == PTRACE_SYSCALL)
  605. set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  606. else
  607. clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  608. child->exit_code = data;
  609. /* make sure single-step breakpoint is gone. */
  610. child->ptrace &= ~PT_SINGLESTEP;
  611. ptrace_cancel_bpt(child);
  612. wake_up_process(child);
  613. ret = 0;
  614. break;
  615. /*
  616. * make the child exit. Best I can do is send it a sigkill.
  617. * perhaps it should be put in the status that it wants to
  618. * exit.
  619. */
  620. case PTRACE_KILL:
  621. /* make sure single-step breakpoint is gone. */
  622. child->ptrace &= ~PT_SINGLESTEP;
  623. ptrace_cancel_bpt(child);
  624. if (child->exit_state != EXIT_ZOMBIE) {
  625. child->exit_code = SIGKILL;
  626. wake_up_process(child);
  627. }
  628. ret = 0;
  629. break;
  630. /*
  631. * execute single instruction.
  632. */
  633. case PTRACE_SINGLESTEP:
  634. ret = -EIO;
  635. if (!valid_signal(data))
  636. break;
  637. child->ptrace |= PT_SINGLESTEP;
  638. clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  639. child->exit_code = data;
  640. /* give it a chance to run. */
  641. wake_up_process(child);
  642. ret = 0;
  643. break;
  644. case PTRACE_DETACH:
  645. ret = ptrace_detach(child, data);
  646. break;
  647. case PTRACE_GETREGS:
  648. ret = ptrace_getregs(child, (void __user *)data);
  649. break;
  650. case PTRACE_SETREGS:
  651. ret = ptrace_setregs(child, (void __user *)data);
  652. break;
  653. case PTRACE_GETFPREGS:
  654. ret = ptrace_getfpregs(child, (void __user *)data);
  655. break;
  656. case PTRACE_SETFPREGS:
  657. ret = ptrace_setfpregs(child, (void __user *)data);
  658. break;
  659. #ifdef CONFIG_IWMMXT
  660. case PTRACE_GETWMMXREGS:
  661. ret = ptrace_getwmmxregs(child, (void __user *)data);
  662. break;
  663. case PTRACE_SETWMMXREGS:
  664. ret = ptrace_setwmmxregs(child, (void __user *)data);
  665. break;
  666. #endif
  667. case PTRACE_GET_THREAD_AREA:
  668. ret = put_user(task_thread_info(child)->tp_value,
  669. (unsigned long __user *) data);
  670. break;
  671. case PTRACE_SET_SYSCALL:
  672. ret = 0;
  673. child->ptrace_message = data;
  674. break;
  675. #ifdef CONFIG_CRUNCH
  676. case PTRACE_GETCRUNCHREGS:
  677. ret = ptrace_getcrunchregs(child, (void __user *)data);
  678. break;
  679. case PTRACE_SETCRUNCHREGS:
  680. ret = ptrace_setcrunchregs(child, (void __user *)data);
  681. break;
  682. #endif
  683. default:
  684. ret = ptrace_request(child, request, addr, data);
  685. break;
  686. }
  687. return ret;
  688. }
  689. asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
  690. {
  691. unsigned long ip;
  692. if (!test_thread_flag(TIF_SYSCALL_TRACE))
  693. return scno;
  694. if (!(current->ptrace & PT_PTRACED))
  695. return scno;
  696. /*
  697. * Save IP. IP is used to denote syscall entry/exit:
  698. * IP = 0 -> entry, = 1 -> exit
  699. */
  700. ip = regs->ARM_ip;
  701. regs->ARM_ip = why;
  702. current->ptrace_message = scno;
  703. /* the 0x80 provides a way for the tracing parent to distinguish
  704. between a syscall stop and SIGTRAP delivery */
  705. ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
  706. ? 0x80 : 0));
  707. /*
  708. * this isn't the same as continuing with a signal, but it will do
  709. * for normal use. strace only continues with a signal if the
  710. * stopping signal is not SIGTRAP. -brl
  711. */
  712. if (current->exit_code) {
  713. send_sig(current->exit_code, current, 1);
  714. current->exit_code = 0;
  715. }
  716. regs->ARM_ip = ip;
  717. return current->ptrace_message;
  718. }