time.README 5.6 KB

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  1. README for MIPS time services
  2. Jun Sun
  3. jsun@mvista.com or jsun@junsun.net
  4. ABOUT
  5. -----
  6. This file describes the new arch/mips/kernel/time.c, related files and the
  7. services they provide.
  8. If you are short in patience and just want to know how to use time.c for a
  9. new board or convert an existing board, go to the last section.
  10. FILES, COMPATABILITY AND CONFIGS
  11. ---------------------------------
  12. The old arch/mips/kernel/time.c is renamed to old-time.c.
  13. A new time.c is put there, together with include/asm-mips/time.h.
  14. Two configs variables are introduced, CONFIG_OLD_TIME_C and CONFIG_NEW_TIME_C.
  15. So we allow boards using
  16. 1) old time.c (CONFIG_OLD_TIME_C)
  17. 2) new time.c (CONFIG_NEW_TIME_C)
  18. 3) neither (their own private time.c)
  19. However, it is expected every board will move to the new time.c in the near
  20. future.
  21. WHAT THE NEW CODE PROVIDES?
  22. ---------------------------
  23. The new time code provide the following services:
  24. a) Implements functions required by Linux common code:
  25. time_init
  26. b) provides an abstraction of RTC and null RTC implementation as default.
  27. extern unsigned long (*rtc_get_time)(void);
  28. extern int (*rtc_set_time)(unsigned long);
  29. c) high-level and low-level timer interrupt routines where the timer
  30. interrupt source may or may not be the CPU timer. The high-level
  31. routine is dispatched through do_IRQ() while the low-level is
  32. dispatched in assemably code (usually int-handler.S)
  33. WHAT THE NEW CODE REQUIRES?
  34. ---------------------------
  35. For the new code to work properly, each board implementation needs to supply
  36. the following functions or values:
  37. a) board_time_init - a function pointer. Invoked at the beginnig of
  38. time_init(). It is optional.
  39. 1. (optional) set up RTC routines
  40. 2. (optional) calibrate and set the mips_hpt_frequency
  41. b) plat_timer_setup - a function pointer. Invoked at the end of time_init()
  42. 1. (optional) over-ride any decisions made in time_init()
  43. 2. set up the irqaction for timer interrupt.
  44. 3. enable the timer interrupt
  45. c) (optional) board-specific RTC routines.
  46. d) (optional) mips_hpt_frequency - It must be definied if the board
  47. is using CPU counter for timer interrupt.
  48. PORTING GUIDE
  49. -------------
  50. Step 1: decide how you like to implement the time services.
  51. a) does this board have a RTC? If yes, implement the two RTC funcs.
  52. b) does the CPU have counter/compare registers?
  53. If the answer is no, you need a timer to provide the timer interrupt
  54. at 100 HZ speed.
  55. c) The following sub steps assume your CPU has counter register.
  56. Do you plan to use the CPU counter register as the timer interrupt
  57. or use an exnternal timer?
  58. In order to use CPU counter register as the timer interrupt source, you
  59. must know the counter speed (mips_hpt_frequency). It is usually the
  60. same as the CPU speed or an integral divisor of it.
  61. d) decide on whether you want to use high-level or low-level timer
  62. interrupt routines. The low-level one is presumably faster, but should
  63. not make too mcuh difference.
  64. Step 2: the machine setup() function
  65. If you supply board_time_init(), set the function poointer.
  66. Step 3: implement rtc routines, board_time_init() and plat_timer_setup()
  67. if needed.
  68. board_time_init() -
  69. a) (optional) set up RTC routines,
  70. b) (optional) calibrate and set the mips_hpt_frequency
  71. (only needed if you intended to use cpu counter as timer interrupt
  72. source)
  73. plat_timer_setup() -
  74. a) (optional) over-write any choices made above by time_init().
  75. b) machine specific code should setup the timer irqaction.
  76. c) enable the timer interrupt
  77. If the RTC chip is a common chip, I suggest the routines are put under
  78. arch/mips/libs. For example, for DS1386 chip, one would create
  79. rtc-ds1386.c under arch/mips/lib directory. Add the following line to
  80. the arch/mips/lib/Makefile:
  81. obj-$(CONFIG_DDB5476) += rtc-ds1386.o
  82. Step 4: if you are using low-level timer interrupt, change your interrupt
  83. dispathcing code to check for timer interrupt and jump to
  84. ll_timer_interrupt() directly if one is detected.
  85. Step 5: Modify arch/mips/config.in and add CONFIG_NEW_TIME_C to your machine.
  86. Modify the appropriate defconfig if applicable.
  87. Final notes:
  88. For some tricky cases, you may need to add your own wrapper functions
  89. for some of the functions in time.c.
  90. For example, you may define your own timer interrupt routine, which does
  91. some of its own processing and then calls timer_interrupt().
  92. You can also over-ride any of the built-in functions (RTC routines
  93. and/or timer interrupt routine).
  94. PORTING NOTES FOR SMP
  95. ----------------------
  96. If you have a SMP box, things are slightly more complicated.
  97. The time service running every jiffy is logically divided into two parts:
  98. 1) the one for the whole system (defined in timer_interrupt())
  99. 2) the one that should run for each CPU (defined in local_timer_interrupt())
  100. You need to decide on your timer interrupt sources.
  101. case 1) - whole system has only one timer interrupt delivered to one CPU
  102. In this case, you set up timer interrupt as in UP systems. In addtion,
  103. you need to set emulate_local_timer_interrupt to 1 so that other
  104. CPUs get to call local_timer_interrupt().
  105. THIS IS CURRENTLY NOT IMPLEMNETED. However, it is rather easy to write
  106. one should such a need arise. You simply make a IPI call.
  107. case 2) - each CPU has a separate timer interrupt
  108. In this case, you need to set up IRQ such that each of them will
  109. call local_timer_interrupt(). In addition, you need to arrange
  110. one and only one of them to call timer_interrupt().
  111. You can also do the low-level version of those interrupt routines,
  112. following similar dispatching routes described above.