mca.txt 8.8 KB

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  1. An ad-hoc collection of notes on IA64 MCA and INIT processing. Feel
  2. free to update it with notes about any area that is not clear.
  3. ---
  4. MCA/INIT are completely asynchronous. They can occur at any time, when
  5. the OS is in any state. Including when one of the cpus is already
  6. holding a spinlock. Trying to get any lock from MCA/INIT state is
  7. asking for deadlock. Also the state of structures that are protected
  8. by locks is indeterminate, including linked lists.
  9. ---
  10. The complicated ia64 MCA process. All of this is mandated by Intel's
  11. specification for ia64 SAL, error recovery and unwind, it is not as
  12. if we have a choice here.
  13. * MCA occurs on one cpu, usually due to a double bit memory error.
  14. This is the monarch cpu.
  15. * SAL sends an MCA rendezvous interrupt (which is a normal interrupt)
  16. to all the other cpus, the slaves.
  17. * Slave cpus that receive the MCA interrupt call down into SAL, they
  18. end up spinning disabled while the MCA is being serviced.
  19. * If any slave cpu was already spinning disabled when the MCA occurred
  20. then it cannot service the MCA interrupt. SAL waits ~20 seconds then
  21. sends an unmaskable INIT event to the slave cpus that have not
  22. already rendezvoused.
  23. * Because MCA/INIT can be delivered at any time, including when the cpu
  24. is down in PAL in physical mode, the registers at the time of the
  25. event are _completely_ undefined. In particular the MCA/INIT
  26. handlers cannot rely on the thread pointer, PAL physical mode can
  27. (and does) modify TP. It is allowed to do that as long as it resets
  28. TP on return. However MCA/INIT events expose us to these PAL
  29. internal TP changes. Hence curr_task().
  30. * If an MCA/INIT event occurs while the kernel was running (not user
  31. space) and the kernel has called PAL then the MCA/INIT handler cannot
  32. assume that the kernel stack is in a fit state to be used. Mainly
  33. because PAL may or may not maintain the stack pointer internally.
  34. Because the MCA/INIT handlers cannot trust the kernel stack, they
  35. have to use their own, per-cpu stacks. The MCA/INIT stacks are
  36. preformatted with just enough task state to let the relevant handlers
  37. do their job.
  38. * Unlike most other architectures, the ia64 struct task is embedded in
  39. the kernel stack[1]. So switching to a new kernel stack means that
  40. we switch to a new task as well. Because various bits of the kernel
  41. assume that current points into the struct task, switching to a new
  42. stack also means a new value for current.
  43. * Once all slaves have rendezvoused and are spinning disabled, the
  44. monarch is entered. The monarch now tries to diagnose the problem
  45. and decide if it can recover or not.
  46. * Part of the monarch's job is to look at the state of all the other
  47. tasks. The only way to do that on ia64 is to call the unwinder,
  48. as mandated by Intel.
  49. * The starting point for the unwind depends on whether a task is
  50. running or not. That is, whether it is on a cpu or is blocked. The
  51. monarch has to determine whether or not a task is on a cpu before it
  52. knows how to start unwinding it. The tasks that received an MCA or
  53. INIT event are no longer running, they have been converted to blocked
  54. tasks. But (and its a big but), the cpus that received the MCA
  55. rendezvous interrupt are still running on their normal kernel stacks!
  56. * To distinguish between these two cases, the monarch must know which
  57. tasks are on a cpu and which are not. Hence each slave cpu that
  58. switches to an MCA/INIT stack, registers its new stack using
  59. set_curr_task(), so the monarch can tell that the _original_ task is
  60. no longer running on that cpu. That gives us a decent chance of
  61. getting a valid backtrace of the _original_ task.
  62. * MCA/INIT can be nested, to a depth of 2 on any cpu. In the case of a
  63. nested error, we want diagnostics on the MCA/INIT handler that
  64. failed, not on the task that was originally running. Again this
  65. requires set_curr_task() so the MCA/INIT handlers can register their
  66. own stack as running on that cpu. Then a recursive error gets a
  67. trace of the failing handler's "task".
  68. [1] My (Keith Owens) original design called for ia64 to separate its
  69. struct task and the kernel stacks. Then the MCA/INIT data would be
  70. chained stacks like i386 interrupt stacks. But that required
  71. radical surgery on the rest of ia64, plus extra hard wired TLB
  72. entries with its associated performance degradation. David
  73. Mosberger vetoed that approach. Which meant that separate kernel
  74. stacks meant separate "tasks" for the MCA/INIT handlers.
  75. ---
  76. INIT is less complicated than MCA. Pressing the nmi button or using
  77. the equivalent command on the management console sends INIT to all
  78. cpus. SAL picks one of the cpus as the monarch and the rest are
  79. slaves. All the OS INIT handlers are entered at approximately the same
  80. time. The OS monarch prints the state of all tasks and returns, after
  81. which the slaves return and the system resumes.
  82. At least that is what is supposed to happen. Alas there are broken
  83. versions of SAL out there. Some drive all the cpus as monarchs. Some
  84. drive them all as slaves. Some drive one cpu as monarch, wait for that
  85. cpu to return from the OS then drive the rest as slaves. Some versions
  86. of SAL cannot even cope with returning from the OS, they spin inside
  87. SAL on resume. The OS INIT code has workarounds for some of these
  88. broken SAL symptoms, but some simply cannot be fixed from the OS side.
  89. ---
  90. The scheduler hooks used by ia64 (curr_task, set_curr_task) are layer
  91. violations. Unfortunately MCA/INIT start off as massive layer
  92. violations (can occur at _any_ time) and they build from there.
  93. At least ia64 makes an attempt at recovering from hardware errors, but
  94. it is a difficult problem because of the asynchronous nature of these
  95. errors. When processing an unmaskable interrupt we sometimes need
  96. special code to cope with our inability to take any locks.
  97. ---
  98. How is ia64 MCA/INIT different from x86 NMI?
  99. * x86 NMI typically gets delivered to one cpu. MCA/INIT gets sent to
  100. all cpus.
  101. * x86 NMI cannot be nested. MCA/INIT can be nested, to a depth of 2
  102. per cpu.
  103. * x86 has a separate struct task which points to one of multiple kernel
  104. stacks. ia64 has the struct task embedded in the single kernel
  105. stack, so switching stack means switching task.
  106. * x86 does not call the BIOS so the NMI handler does not have to worry
  107. about any registers having changed. MCA/INIT can occur while the cpu
  108. is in PAL in physical mode, with undefined registers and an undefined
  109. kernel stack.
  110. * i386 backtrace is not very sensitive to whether a process is running
  111. or not. ia64 unwind is very, very sensitive to whether a process is
  112. running or not.
  113. ---
  114. What happens when MCA/INIT is delivered what a cpu is running user
  115. space code?
  116. The user mode registers are stored in the RSE area of the MCA/INIT on
  117. entry to the OS and are restored from there on return to SAL, so user
  118. mode registers are preserved across a recoverable MCA/INIT. Since the
  119. OS has no idea what unwind data is available for the user space stack,
  120. MCA/INIT never tries to backtrace user space. Which means that the OS
  121. does not bother making the user space process look like a blocked task,
  122. i.e. the OS does not copy pt_regs and switch_stack to the user space
  123. stack. Also the OS has no idea how big the user space RSE and memory
  124. stacks are, which makes it too risky to copy the saved state to a user
  125. mode stack.
  126. ---
  127. How do we get a backtrace on the tasks that were running when MCA/INIT
  128. was delivered?
  129. mca.c:::ia64_mca_modify_original_stack(). That identifies and
  130. verifies the original kernel stack, copies the dirty registers from
  131. the MCA/INIT stack's RSE to the original stack's RSE, copies the
  132. skeleton struct pt_regs and switch_stack to the original stack, fills
  133. in the skeleton structures from the PAL minstate area and updates the
  134. original stack's thread.ksp. That makes the original stack look
  135. exactly like any other blocked task, i.e. it now appears to be
  136. sleeping. To get a backtrace, just start with thread.ksp for the
  137. original task and unwind like any other sleeping task.
  138. ---
  139. How do we identify the tasks that were running when MCA/INIT was
  140. delivered?
  141. If the previous task has been verified and converted to a blocked
  142. state, then sos->prev_task on the MCA/INIT stack is updated to point to
  143. the previous task. You can look at that field in dumps or debuggers.
  144. To help distinguish between the handler and the original tasks,
  145. handlers have _TIF_MCA_INIT set in thread_info.flags.
  146. The sos data is always in the MCA/INIT handler stack, at offset
  147. MCA_SOS_OFFSET. You can get that value from mca_asm.h or calculate it
  148. as KERNEL_STACK_SIZE - sizeof(struct pt_regs) - sizeof(struct
  149. ia64_sal_os_state), with 16 byte alignment for all structures.
  150. Also the comm field of the MCA/INIT task is modified to include the pid
  151. of the original task, for humans to use. For example, a comm field of
  152. 'MCA 12159' means that pid 12159 was running when the MCA was
  153. delivered.