genericirq.tmpl 15 KB

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  1. <?xml version="1.0" encoding="UTF-8"?>
  2. <!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
  3. "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
  4. <book id="Generic-IRQ-Guide">
  5. <bookinfo>
  6. <title>Linux generic IRQ handling</title>
  7. <authorgroup>
  8. <author>
  9. <firstname>Thomas</firstname>
  10. <surname>Gleixner</surname>
  11. <affiliation>
  12. <address>
  13. <email>tglx@linutronix.de</email>
  14. </address>
  15. </affiliation>
  16. </author>
  17. <author>
  18. <firstname>Ingo</firstname>
  19. <surname>Molnar</surname>
  20. <affiliation>
  21. <address>
  22. <email>mingo@elte.hu</email>
  23. </address>
  24. </affiliation>
  25. </author>
  26. </authorgroup>
  27. <copyright>
  28. <year>2005-2006</year>
  29. <holder>Thomas Gleixner</holder>
  30. </copyright>
  31. <copyright>
  32. <year>2005-2006</year>
  33. <holder>Ingo Molnar</holder>
  34. </copyright>
  35. <legalnotice>
  36. <para>
  37. This documentation is free software; you can redistribute
  38. it and/or modify it under the terms of the GNU General Public
  39. License version 2 as published by the Free Software Foundation.
  40. </para>
  41. <para>
  42. This program is distributed in the hope that it will be
  43. useful, but WITHOUT ANY WARRANTY; without even the implied
  44. warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  45. See the GNU General Public License for more details.
  46. </para>
  47. <para>
  48. You should have received a copy of the GNU General Public
  49. License along with this program; if not, write to the Free
  50. Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  51. MA 02111-1307 USA
  52. </para>
  53. <para>
  54. For more details see the file COPYING in the source
  55. distribution of Linux.
  56. </para>
  57. </legalnotice>
  58. </bookinfo>
  59. <toc></toc>
  60. <chapter id="intro">
  61. <title>Introduction</title>
  62. <para>
  63. The generic interrupt handling layer is designed to provide a
  64. complete abstraction of interrupt handling for device drivers.
  65. It is able to handle all the different types of interrupt controller
  66. hardware. Device drivers use generic API functions to request, enable,
  67. disable and free interrupts. The drivers do not have to know anything
  68. about interrupt hardware details, so they can be used on different
  69. platforms without code changes.
  70. </para>
  71. <para>
  72. This documentation is provided to developers who want to implement
  73. an interrupt subsystem based for their architecture, with the help
  74. of the generic IRQ handling layer.
  75. </para>
  76. </chapter>
  77. <chapter id="rationale">
  78. <title>Rationale</title>
  79. <para>
  80. The original implementation of interrupt handling in Linux is using
  81. the __do_IRQ() super-handler, which is able to deal with every
  82. type of interrupt logic.
  83. </para>
  84. <para>
  85. Originally, Russell King identified different types of handlers to
  86. build a quite universal set for the ARM interrupt handler
  87. implementation in Linux 2.5/2.6. He distinguished between:
  88. <itemizedlist>
  89. <listitem><para>Level type</para></listitem>
  90. <listitem><para>Edge type</para></listitem>
  91. <listitem><para>Simple type</para></listitem>
  92. </itemizedlist>
  93. In the SMP world of the __do_IRQ() super-handler another type
  94. was identified:
  95. <itemizedlist>
  96. <listitem><para>Per CPU type</para></listitem>
  97. </itemizedlist>
  98. </para>
  99. <para>
  100. This split implementation of highlevel IRQ handlers allows us to
  101. optimize the flow of the interrupt handling for each specific
  102. interrupt type. This reduces complexity in that particular codepath
  103. and allows the optimized handling of a given type.
  104. </para>
  105. <para>
  106. The original general IRQ implementation used hw_interrupt_type
  107. structures and their ->ack(), ->end() [etc.] callbacks to
  108. differentiate the flow control in the super-handler. This leads to
  109. a mix of flow logic and lowlevel hardware logic, and it also leads
  110. to unnecessary code duplication: for example in i386, there is a
  111. ioapic_level_irq and a ioapic_edge_irq irq-type which share many
  112. of the lowlevel details but have different flow handling.
  113. </para>
  114. <para>
  115. A more natural abstraction is the clean separation of the
  116. 'irq flow' and the 'chip details'.
  117. </para>
  118. <para>
  119. Analysing a couple of architecture's IRQ subsystem implementations
  120. reveals that most of them can use a generic set of 'irq flow'
  121. methods and only need to add the chip level specific code.
  122. The separation is also valuable for (sub)architectures
  123. which need specific quirks in the irq flow itself but not in the
  124. chip-details - and thus provides a more transparent IRQ subsystem
  125. design.
  126. </para>
  127. <para>
  128. Each interrupt descriptor is assigned its own highlevel flow
  129. handler, which is normally one of the generic
  130. implementations. (This highlevel flow handler implementation also
  131. makes it simple to provide demultiplexing handlers which can be
  132. found in embedded platforms on various architectures.)
  133. </para>
  134. <para>
  135. The separation makes the generic interrupt handling layer more
  136. flexible and extensible. For example, an (sub)architecture can
  137. use a generic irq-flow implementation for 'level type' interrupts
  138. and add a (sub)architecture specific 'edge type' implementation.
  139. </para>
  140. <para>
  141. To make the transition to the new model easier and prevent the
  142. breakage of existing implementations, the __do_IRQ() super-handler
  143. is still available. This leads to a kind of duality for the time
  144. being. Over time the new model should be used in more and more
  145. architectures, as it enables smaller and cleaner IRQ subsystems.
  146. </para>
  147. </chapter>
  148. <chapter id="bugs">
  149. <title>Known Bugs And Assumptions</title>
  150. <para>
  151. None (knock on wood).
  152. </para>
  153. </chapter>
  154. <chapter id="Abstraction">
  155. <title>Abstraction layers</title>
  156. <para>
  157. There are three main levels of abstraction in the interrupt code:
  158. <orderedlist>
  159. <listitem><para>Highlevel driver API</para></listitem>
  160. <listitem><para>Highlevel IRQ flow handlers</para></listitem>
  161. <listitem><para>Chiplevel hardware encapsulation</para></listitem>
  162. </orderedlist>
  163. </para>
  164. <sect1>
  165. <title>Interrupt control flow</title>
  166. <para>
  167. Each interrupt is described by an interrupt descriptor structure
  168. irq_desc. The interrupt is referenced by an 'unsigned int' numeric
  169. value which selects the corresponding interrupt decription structure
  170. in the descriptor structures array.
  171. The descriptor structure contains status information and pointers
  172. to the interrupt flow method and the interrupt chip structure
  173. which are assigned to this interrupt.
  174. </para>
  175. <para>
  176. Whenever an interrupt triggers, the lowlevel arch code calls into
  177. the generic interrupt code by calling desc->handle_irq().
  178. This highlevel IRQ handling function only uses desc->chip primitives
  179. referenced by the assigned chip descriptor structure.
  180. </para>
  181. </sect1>
  182. <sect1>
  183. <title>Highlevel Driver API</title>
  184. <para>
  185. The highlevel Driver API consists of following functions:
  186. <itemizedlist>
  187. <listitem><para>request_irq()</para></listitem>
  188. <listitem><para>free_irq()</para></listitem>
  189. <listitem><para>disable_irq()</para></listitem>
  190. <listitem><para>enable_irq()</para></listitem>
  191. <listitem><para>disable_irq_nosync() (SMP only)</para></listitem>
  192. <listitem><para>synchronize_irq() (SMP only)</para></listitem>
  193. <listitem><para>set_irq_type()</para></listitem>
  194. <listitem><para>set_irq_wake()</para></listitem>
  195. <listitem><para>set_irq_data()</para></listitem>
  196. <listitem><para>set_irq_chip()</para></listitem>
  197. <listitem><para>set_irq_chip_data()</para></listitem>
  198. </itemizedlist>
  199. See the autogenerated function documentation for details.
  200. </para>
  201. </sect1>
  202. <sect1>
  203. <title>Highlevel IRQ flow handlers</title>
  204. <para>
  205. The generic layer provides a set of pre-defined irq-flow methods:
  206. <itemizedlist>
  207. <listitem><para>handle_level_irq</para></listitem>
  208. <listitem><para>handle_edge_irq</para></listitem>
  209. <listitem><para>handle_simple_irq</para></listitem>
  210. <listitem><para>handle_percpu_irq</para></listitem>
  211. </itemizedlist>
  212. The interrupt flow handlers (either predefined or architecture
  213. specific) are assigned to specific interrupts by the architecture
  214. either during bootup or during device initialization.
  215. </para>
  216. <sect2>
  217. <title>Default flow implementations</title>
  218. <sect3>
  219. <title>Helper functions</title>
  220. <para>
  221. The helper functions call the chip primitives and
  222. are used by the default flow implementations.
  223. The following helper functions are implemented (simplified excerpt):
  224. <programlisting>
  225. default_enable(irq)
  226. {
  227. desc->chip->unmask(irq);
  228. }
  229. default_disable(irq)
  230. {
  231. if (!delay_disable(irq))
  232. desc->chip->mask(irq);
  233. }
  234. default_ack(irq)
  235. {
  236. chip->ack(irq);
  237. }
  238. default_mask_ack(irq)
  239. {
  240. if (chip->mask_ack) {
  241. chip->mask_ack(irq);
  242. } else {
  243. chip->mask(irq);
  244. chip->ack(irq);
  245. }
  246. }
  247. noop(irq)
  248. {
  249. }
  250. </programlisting>
  251. </para>
  252. </sect3>
  253. </sect2>
  254. <sect2>
  255. <title>Default flow handler implementations</title>
  256. <sect3>
  257. <title>Default Level IRQ flow handler</title>
  258. <para>
  259. handle_level_irq provides a generic implementation
  260. for level-triggered interrupts.
  261. </para>
  262. <para>
  263. The following control flow is implemented (simplified excerpt):
  264. <programlisting>
  265. desc->chip->start();
  266. handle_IRQ_event(desc->action);
  267. desc->chip->end();
  268. </programlisting>
  269. </para>
  270. </sect3>
  271. <sect3>
  272. <title>Default Edge IRQ flow handler</title>
  273. <para>
  274. handle_edge_irq provides a generic implementation
  275. for edge-triggered interrupts.
  276. </para>
  277. <para>
  278. The following control flow is implemented (simplified excerpt):
  279. <programlisting>
  280. if (desc->status &amp; running) {
  281. desc->chip->hold();
  282. desc->status |= pending | masked;
  283. return;
  284. }
  285. desc->chip->start();
  286. desc->status |= running;
  287. do {
  288. if (desc->status &amp; masked)
  289. desc->chip->enable();
  290. desc->status &amp;= ~pending;
  291. handle_IRQ_event(desc->action);
  292. } while (status &amp; pending);
  293. desc->status &amp;= ~running;
  294. desc->chip->end();
  295. </programlisting>
  296. </para>
  297. </sect3>
  298. <sect3>
  299. <title>Default simple IRQ flow handler</title>
  300. <para>
  301. handle_simple_irq provides a generic implementation
  302. for simple interrupts.
  303. </para>
  304. <para>
  305. Note: The simple flow handler does not call any
  306. handler/chip primitives.
  307. </para>
  308. <para>
  309. The following control flow is implemented (simplified excerpt):
  310. <programlisting>
  311. handle_IRQ_event(desc->action);
  312. </programlisting>
  313. </para>
  314. </sect3>
  315. <sect3>
  316. <title>Default per CPU flow handler</title>
  317. <para>
  318. handle_percpu_irq provides a generic implementation
  319. for per CPU interrupts.
  320. </para>
  321. <para>
  322. Per CPU interrupts are only available on SMP and
  323. the handler provides a simplified version without
  324. locking.
  325. </para>
  326. <para>
  327. The following control flow is implemented (simplified excerpt):
  328. <programlisting>
  329. desc->chip->start();
  330. handle_IRQ_event(desc->action);
  331. desc->chip->end();
  332. </programlisting>
  333. </para>
  334. </sect3>
  335. </sect2>
  336. <sect2>
  337. <title>Quirks and optimizations</title>
  338. <para>
  339. The generic functions are intended for 'clean' architectures and chips,
  340. which have no platform-specific IRQ handling quirks. If an architecture
  341. needs to implement quirks on the 'flow' level then it can do so by
  342. overriding the highlevel irq-flow handler.
  343. </para>
  344. </sect2>
  345. <sect2>
  346. <title>Delayed interrupt disable</title>
  347. <para>
  348. This per interrupt selectable feature, which was introduced by Russell
  349. King in the ARM interrupt implementation, does not mask an interrupt
  350. at the hardware level when disable_irq() is called. The interrupt is
  351. kept enabled and is masked in the flow handler when an interrupt event
  352. happens. This prevents losing edge interrupts on hardware which does
  353. not store an edge interrupt event while the interrupt is disabled at
  354. the hardware level. When an interrupt arrives while the IRQ_DISABLED
  355. flag is set, then the interrupt is masked at the hardware level and
  356. the IRQ_PENDING bit is set. When the interrupt is re-enabled by
  357. enable_irq() the pending bit is checked and if it is set, the
  358. interrupt is resent either via hardware or by a software resend
  359. mechanism. (It's necessary to enable CONFIG_HARDIRQS_SW_RESEND when
  360. you want to use the delayed interrupt disable feature and your
  361. hardware is not capable of retriggering an interrupt.)
  362. The delayed interrupt disable can be runtime enabled, per interrupt,
  363. by setting the IRQ_DELAYED_DISABLE flag in the irq_desc status field.
  364. </para>
  365. </sect2>
  366. </sect1>
  367. <sect1>
  368. <title>Chiplevel hardware encapsulation</title>
  369. <para>
  370. The chip level hardware descriptor structure irq_chip
  371. contains all the direct chip relevant functions, which
  372. can be utilized by the irq flow implementations.
  373. <itemizedlist>
  374. <listitem><para>ack()</para></listitem>
  375. <listitem><para>mask_ack() - Optional, recommended for performance</para></listitem>
  376. <listitem><para>mask()</para></listitem>
  377. <listitem><para>unmask()</para></listitem>
  378. <listitem><para>retrigger() - Optional</para></listitem>
  379. <listitem><para>set_type() - Optional</para></listitem>
  380. <listitem><para>set_wake() - Optional</para></listitem>
  381. </itemizedlist>
  382. These primitives are strictly intended to mean what they say: ack means
  383. ACK, masking means masking of an IRQ line, etc. It is up to the flow
  384. handler(s) to use these basic units of lowlevel functionality.
  385. </para>
  386. </sect1>
  387. </chapter>
  388. <chapter id="doirq">
  389. <title>__do_IRQ entry point</title>
  390. <para>
  391. The original implementation __do_IRQ() is an alternative entry
  392. point for all types of interrupts.
  393. </para>
  394. <para>
  395. This handler turned out to be not suitable for all
  396. interrupt hardware and was therefore reimplemented with split
  397. functionality for egde/level/simple/percpu interrupts. This is not
  398. only a functional optimization. It also shortens code paths for
  399. interrupts.
  400. </para>
  401. <para>
  402. To make use of the split implementation, replace the call to
  403. __do_IRQ by a call to desc->chip->handle_irq() and associate
  404. the appropriate handler function to desc->chip->handle_irq().
  405. In most cases the generic handler implementations should
  406. be sufficient.
  407. </para>
  408. </chapter>
  409. <chapter id="locking">
  410. <title>Locking on SMP</title>
  411. <para>
  412. The locking of chip registers is up to the architecture that
  413. defines the chip primitives. There is a chip->lock field that can be used
  414. for serialization, but the generic layer does not touch it. The per-irq
  415. structure is protected via desc->lock, by the generic layer.
  416. </para>
  417. </chapter>
  418. <chapter id="structs">
  419. <title>Structures</title>
  420. <para>
  421. This chapter contains the autogenerated documentation of the structures which are
  422. used in the generic IRQ layer.
  423. </para>
  424. !Iinclude/linux/irq.h
  425. </chapter>
  426. <chapter id="pubfunctions">
  427. <title>Public Functions Provided</title>
  428. <para>
  429. This chapter contains the autogenerated documentation of the kernel API functions
  430. which are exported.
  431. </para>
  432. !Ekernel/irq/manage.c
  433. !Ekernel/irq/chip.c
  434. </chapter>
  435. <chapter id="intfunctions">
  436. <title>Internal Functions Provided</title>
  437. <para>
  438. This chapter contains the autogenerated documentation of the internal functions.
  439. </para>
  440. !Ikernel/irq/handle.c
  441. !Ikernel/irq/chip.c
  442. </chapter>
  443. <chapter id="credits">
  444. <title>Credits</title>
  445. <para>
  446. The following people have contributed to this document:
  447. <orderedlist>
  448. <listitem><para>Thomas Gleixner<email>tglx@linutronix.de</email></para></listitem>
  449. <listitem><para>Ingo Molnar<email>mingo@elte.hu</email></para></listitem>
  450. </orderedlist>
  451. </para>
  452. </chapter>
  453. </book>