sm501fb.c 41 KB

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  1. /* linux/drivers/video/sm501fb.c
  2. *
  3. * Copyright (c) 2006 Simtec Electronics
  4. * Vincent Sanders <vince@simtec.co.uk>
  5. * Ben Dooks <ben@simtec.co.uk>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Framebuffer driver for the Silicon Motion SM501
  12. */
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/errno.h>
  16. #include <linux/string.h>
  17. #include <linux/mm.h>
  18. #include <linux/tty.h>
  19. #include <linux/slab.h>
  20. #include <linux/delay.h>
  21. #include <linux/fb.h>
  22. #include <linux/init.h>
  23. #include <linux/vmalloc.h>
  24. #include <linux/dma-mapping.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/workqueue.h>
  27. #include <linux/wait.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/clk.h>
  30. #include <asm/io.h>
  31. #include <asm/uaccess.h>
  32. #include <asm/div64.h>
  33. #ifdef CONFIG_PM
  34. #include <linux/pm.h>
  35. #endif
  36. #include <linux/sm501.h>
  37. #include <linux/sm501-regs.h>
  38. #define NR_PALETTE 256
  39. enum sm501_controller {
  40. HEAD_CRT = 0,
  41. HEAD_PANEL = 1,
  42. };
  43. /* SM501 memory adress */
  44. struct sm501_mem {
  45. unsigned long size;
  46. unsigned long sm_addr;
  47. void __iomem *k_addr;
  48. };
  49. /* private data that is shared between all frambuffers* */
  50. struct sm501fb_info {
  51. struct device *dev;
  52. struct fb_info *fb[2]; /* fb info for both heads */
  53. struct resource *fbmem_res; /* framebuffer resource */
  54. struct resource *regs_res; /* registers resource */
  55. struct sm501_platdata_fb *pdata; /* our platform data */
  56. int irq;
  57. int swap_endian; /* set to swap rgb=>bgr */
  58. void __iomem *regs; /* remapped registers */
  59. void __iomem *fbmem; /* remapped framebuffer */
  60. size_t fbmem_len; /* length of remapped region */
  61. };
  62. /* per-framebuffer private data */
  63. struct sm501fb_par {
  64. u32 pseudo_palette[16];
  65. enum sm501_controller head;
  66. struct sm501_mem cursor;
  67. struct sm501_mem screen;
  68. struct fb_ops ops;
  69. void *store_fb;
  70. void *store_cursor;
  71. void __iomem *cursor_regs;
  72. struct sm501fb_info *info;
  73. };
  74. /* Helper functions */
  75. static inline int h_total(struct fb_var_screeninfo *var)
  76. {
  77. return var->xres + var->left_margin +
  78. var->right_margin + var->hsync_len;
  79. }
  80. static inline int v_total(struct fb_var_screeninfo *var)
  81. {
  82. return var->yres + var->upper_margin +
  83. var->lower_margin + var->vsync_len;
  84. }
  85. /* sm501fb_sync_regs()
  86. *
  87. * This call is mainly for PCI bus systems where we need to
  88. * ensure that any writes to the bus are completed before the
  89. * next phase, or after completing a function.
  90. */
  91. static inline void sm501fb_sync_regs(struct sm501fb_info *info)
  92. {
  93. readl(info->regs);
  94. }
  95. /* sm501_alloc_mem
  96. *
  97. * This is an attempt to lay out memory for the two framebuffers and
  98. * everything else
  99. *
  100. * |fbmem_res->start fbmem_res->end|
  101. * | |
  102. * |fb[0].fix.smem_start | |fb[1].fix.smem_start | 2K |
  103. * |-> fb[0].fix.smem_len <-| spare |-> fb[1].fix.smem_len <-|-> cursors <-|
  104. *
  105. * The "spare" space is for the 2d engine data
  106. * the fixed is space for the cursors (2x1Kbyte)
  107. *
  108. * we need to allocate memory for the 2D acceleration engine
  109. * command list and the data for the engine to deal with.
  110. *
  111. * - all allocations must be 128bit aligned
  112. * - cursors are 64x64x2 bits (1Kbyte)
  113. *
  114. */
  115. #define SM501_MEMF_CURSOR (1)
  116. #define SM501_MEMF_PANEL (2)
  117. #define SM501_MEMF_CRT (4)
  118. #define SM501_MEMF_ACCEL (8)
  119. static int sm501_alloc_mem(struct sm501fb_info *inf, struct sm501_mem *mem,
  120. unsigned int why, size_t size)
  121. {
  122. unsigned int ptr = 0;
  123. switch (why) {
  124. case SM501_MEMF_CURSOR:
  125. ptr = inf->fbmem_len - size;
  126. inf->fbmem_len = ptr;
  127. break;
  128. case SM501_MEMF_PANEL:
  129. ptr = inf->fbmem_len - size;
  130. if (ptr < inf->fb[0]->fix.smem_len)
  131. return -ENOMEM;
  132. break;
  133. case SM501_MEMF_CRT:
  134. ptr = 0;
  135. break;
  136. case SM501_MEMF_ACCEL:
  137. ptr = inf->fb[0]->fix.smem_len;
  138. if ((ptr + size) >
  139. (inf->fb[1]->fix.smem_start - inf->fbmem_res->start))
  140. return -ENOMEM;
  141. break;
  142. default:
  143. return -EINVAL;
  144. }
  145. mem->size = size;
  146. mem->sm_addr = ptr;
  147. mem->k_addr = inf->fbmem + ptr;
  148. dev_dbg(inf->dev, "%s: result %08lx, %p - %u, %zd\n",
  149. __func__, mem->sm_addr, mem->k_addr, why, size);
  150. return 0;
  151. }
  152. /* sm501fb_ps_to_hz
  153. *
  154. * Converts a period in picoseconds to Hz.
  155. *
  156. * Note, we try to keep this in Hz to minimise rounding with
  157. * the limited PLL settings on the SM501.
  158. */
  159. static unsigned long sm501fb_ps_to_hz(unsigned long psvalue)
  160. {
  161. unsigned long long numerator=1000000000000ULL;
  162. /* 10^12 / picosecond period gives frequency in Hz */
  163. do_div(numerator, psvalue);
  164. return (unsigned long)numerator;
  165. }
  166. /* sm501fb_hz_to_ps is identical to the oposite transform */
  167. #define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x)
  168. /* sm501fb_setup_gamma
  169. *
  170. * Programs a linear 1.0 gamma ramp in case the gamma
  171. * correction is enabled without programming anything else.
  172. */
  173. static void sm501fb_setup_gamma(struct sm501fb_info *fbi,
  174. unsigned long palette)
  175. {
  176. unsigned long value = 0;
  177. int offset;
  178. /* set gamma values */
  179. for (offset = 0; offset < 256 * 4; offset += 4) {
  180. writel(value, fbi->regs + palette + offset);
  181. value += 0x010101; /* Advance RGB by 1,1,1.*/
  182. }
  183. }
  184. /* sm501fb_check_var
  185. *
  186. * check common variables for both panel and crt
  187. */
  188. static int sm501fb_check_var(struct fb_var_screeninfo *var,
  189. struct fb_info *info)
  190. {
  191. struct sm501fb_par *par = info->par;
  192. struct sm501fb_info *sm = par->info;
  193. unsigned long tmp;
  194. /* check we can fit these values into the registers */
  195. if (var->hsync_len > 255 || var->vsync_len > 255)
  196. return -EINVAL;
  197. if ((var->xres + var->right_margin) >= 4096)
  198. return -EINVAL;
  199. if ((var->yres + var->lower_margin) > 2048)
  200. return -EINVAL;
  201. /* hard limits of device */
  202. if (h_total(var) > 4096 || v_total(var) > 2048)
  203. return -EINVAL;
  204. /* check our line length is going to be 128 bit aligned */
  205. tmp = (var->xres * var->bits_per_pixel) / 8;
  206. if ((tmp & 15) != 0)
  207. return -EINVAL;
  208. /* check the virtual size */
  209. if (var->xres_virtual > 4096 || var->yres_virtual > 2048)
  210. return -EINVAL;
  211. /* can cope with 8,16 or 32bpp */
  212. if (var->bits_per_pixel <= 8)
  213. var->bits_per_pixel = 8;
  214. else if (var->bits_per_pixel <= 16)
  215. var->bits_per_pixel = 16;
  216. else if (var->bits_per_pixel == 24)
  217. var->bits_per_pixel = 32;
  218. /* set r/g/b positions and validate bpp */
  219. switch(var->bits_per_pixel) {
  220. case 8:
  221. var->red.length = var->bits_per_pixel;
  222. var->red.offset = 0;
  223. var->green.length = var->bits_per_pixel;
  224. var->green.offset = 0;
  225. var->blue.length = var->bits_per_pixel;
  226. var->blue.offset = 0;
  227. var->transp.length = 0;
  228. break;
  229. case 16:
  230. if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
  231. var->red.offset = 11;
  232. var->green.offset = 5;
  233. var->blue.offset = 0;
  234. } else {
  235. var->blue.offset = 11;
  236. var->green.offset = 5;
  237. var->red.offset = 0;
  238. }
  239. var->red.length = 5;
  240. var->green.length = 6;
  241. var->blue.length = 5;
  242. var->transp.length = 0;
  243. break;
  244. case 32:
  245. if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
  246. var->transp.offset = 0;
  247. var->red.offset = 8;
  248. var->green.offset = 16;
  249. var->blue.offset = 24;
  250. } else {
  251. var->transp.offset = 24;
  252. var->red.offset = 16;
  253. var->green.offset = 8;
  254. var->blue.offset = 0;
  255. }
  256. var->red.length = 8;
  257. var->green.length = 8;
  258. var->blue.length = 8;
  259. var->transp.length = 0;
  260. break;
  261. default:
  262. return -EINVAL;
  263. }
  264. return 0;
  265. }
  266. /*
  267. * sm501fb_check_var_crt():
  268. *
  269. * check the parameters for the CRT head, and either bring them
  270. * back into range, or return -EINVAL.
  271. */
  272. static int sm501fb_check_var_crt(struct fb_var_screeninfo *var,
  273. struct fb_info *info)
  274. {
  275. return sm501fb_check_var(var, info);
  276. }
  277. /* sm501fb_check_var_pnl():
  278. *
  279. * check the parameters for the CRT head, and either bring them
  280. * back into range, or return -EINVAL.
  281. */
  282. static int sm501fb_check_var_pnl(struct fb_var_screeninfo *var,
  283. struct fb_info *info)
  284. {
  285. return sm501fb_check_var(var, info);
  286. }
  287. /* sm501fb_set_par_common
  288. *
  289. * set common registers for framebuffers
  290. */
  291. static int sm501fb_set_par_common(struct fb_info *info,
  292. struct fb_var_screeninfo *var)
  293. {
  294. struct sm501fb_par *par = info->par;
  295. struct sm501fb_info *fbi = par->info;
  296. unsigned long pixclock; /* pixelclock in Hz */
  297. unsigned long sm501pixclock; /* pixelclock the 501 can achive in Hz */
  298. unsigned int mem_type;
  299. unsigned int clock_type;
  300. unsigned int head_addr;
  301. dev_dbg(fbi->dev, "%s: %dx%d, bpp = %d, virtual %dx%d\n",
  302. __func__, var->xres, var->yres, var->bits_per_pixel,
  303. var->xres_virtual, var->yres_virtual);
  304. switch (par->head) {
  305. case HEAD_CRT:
  306. mem_type = SM501_MEMF_CRT;
  307. clock_type = SM501_CLOCK_V2XCLK;
  308. head_addr = SM501_DC_CRT_FB_ADDR;
  309. break;
  310. case HEAD_PANEL:
  311. mem_type = SM501_MEMF_PANEL;
  312. clock_type = SM501_CLOCK_P2XCLK;
  313. head_addr = SM501_DC_PANEL_FB_ADDR;
  314. break;
  315. default:
  316. mem_type = 0; /* stop compiler warnings */
  317. head_addr = 0;
  318. clock_type = 0;
  319. }
  320. switch (var->bits_per_pixel) {
  321. case 8:
  322. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  323. break;
  324. case 16:
  325. info->fix.visual = FB_VISUAL_DIRECTCOLOR;
  326. break;
  327. case 32:
  328. info->fix.visual = FB_VISUAL_TRUECOLOR;
  329. break;
  330. }
  331. /* allocate fb memory within 501 */
  332. info->fix.line_length = (var->xres_virtual * var->bits_per_pixel)/8;
  333. info->fix.smem_len = info->fix.line_length * var->yres_virtual;
  334. dev_dbg(fbi->dev, "%s: line length = %u\n", __func__,
  335. info->fix.line_length);
  336. if (sm501_alloc_mem(fbi, &par->screen, mem_type,
  337. info->fix.smem_len)) {
  338. dev_err(fbi->dev, "no memory available\n");
  339. return -ENOMEM;
  340. }
  341. info->fix.smem_start = fbi->fbmem_res->start + par->screen.sm_addr;
  342. info->screen_base = fbi->fbmem + par->screen.sm_addr;
  343. info->screen_size = info->fix.smem_len;
  344. /* set start of framebuffer to the screen */
  345. writel(par->screen.sm_addr | SM501_ADDR_FLIP, fbi->regs + head_addr);
  346. /* program CRT clock */
  347. pixclock = sm501fb_ps_to_hz(var->pixclock);
  348. sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type,
  349. pixclock);
  350. /* update fb layer with actual clock used */
  351. var->pixclock = sm501fb_hz_to_ps(sm501pixclock);
  352. dev_dbg(fbi->dev, "%s: pixclock(ps) = %u, pixclock(Hz) = %lu, "
  353. "sm501pixclock = %lu, error = %ld%%\n",
  354. __func__, var->pixclock, pixclock, sm501pixclock,
  355. ((pixclock - sm501pixclock)*100)/pixclock);
  356. return 0;
  357. }
  358. /* sm501fb_set_par_geometry
  359. *
  360. * set the geometry registers for specified framebuffer.
  361. */
  362. static void sm501fb_set_par_geometry(struct fb_info *info,
  363. struct fb_var_screeninfo *var)
  364. {
  365. struct sm501fb_par *par = info->par;
  366. struct sm501fb_info *fbi = par->info;
  367. void __iomem *base = fbi->regs;
  368. unsigned long reg;
  369. if (par->head == HEAD_CRT)
  370. base += SM501_DC_CRT_H_TOT;
  371. else
  372. base += SM501_DC_PANEL_H_TOT;
  373. /* set framebuffer width and display width */
  374. reg = info->fix.line_length;
  375. reg |= ((var->xres * var->bits_per_pixel)/8) << 16;
  376. writel(reg, fbi->regs + (par->head == HEAD_CRT ?
  377. SM501_DC_CRT_FB_OFFSET : SM501_DC_PANEL_FB_OFFSET));
  378. /* program horizontal total */
  379. reg = (h_total(var) - 1) << 16;
  380. reg |= (var->xres - 1);
  381. writel(reg, base + SM501_OFF_DC_H_TOT);
  382. /* program horizontal sync */
  383. reg = var->hsync_len << 16;
  384. reg |= var->xres + var->right_margin - 1;
  385. writel(reg, base + SM501_OFF_DC_H_SYNC);
  386. /* program vertical total */
  387. reg = (v_total(var) - 1) << 16;
  388. reg |= (var->yres - 1);
  389. writel(reg, base + SM501_OFF_DC_V_TOT);
  390. /* program vertical sync */
  391. reg = var->vsync_len << 16;
  392. reg |= var->yres + var->lower_margin - 1;
  393. writel(reg, base + SM501_OFF_DC_V_SYNC);
  394. }
  395. /* sm501fb_pan_crt
  396. *
  397. * pan the CRT display output within an virtual framebuffer
  398. */
  399. static int sm501fb_pan_crt(struct fb_var_screeninfo *var,
  400. struct fb_info *info)
  401. {
  402. struct sm501fb_par *par = info->par;
  403. struct sm501fb_info *fbi = par->info;
  404. unsigned int bytes_pixel = var->bits_per_pixel / 8;
  405. unsigned long reg;
  406. unsigned long xoffs;
  407. xoffs = var->xoffset * bytes_pixel;
  408. reg = readl(fbi->regs + SM501_DC_CRT_CONTROL);
  409. reg &= ~SM501_DC_CRT_CONTROL_PIXEL_MASK;
  410. reg |= ((xoffs & 15) / bytes_pixel) << 4;
  411. writel(reg, fbi->regs + SM501_DC_CRT_CONTROL);
  412. reg = (par->screen.sm_addr + xoffs +
  413. var->yoffset * info->fix.line_length);
  414. writel(reg | SM501_ADDR_FLIP, fbi->regs + SM501_DC_CRT_FB_ADDR);
  415. sm501fb_sync_regs(fbi);
  416. return 0;
  417. }
  418. /* sm501fb_pan_pnl
  419. *
  420. * pan the panel display output within an virtual framebuffer
  421. */
  422. static int sm501fb_pan_pnl(struct fb_var_screeninfo *var,
  423. struct fb_info *info)
  424. {
  425. struct sm501fb_par *par = info->par;
  426. struct sm501fb_info *fbi = par->info;
  427. unsigned long reg;
  428. reg = var->xoffset | (var->xres_virtual << 16);
  429. writel(reg, fbi->regs + SM501_DC_PANEL_FB_WIDTH);
  430. reg = var->yoffset | (var->yres_virtual << 16);
  431. writel(reg, fbi->regs + SM501_DC_PANEL_FB_HEIGHT);
  432. sm501fb_sync_regs(fbi);
  433. return 0;
  434. }
  435. /* sm501fb_set_par_crt
  436. *
  437. * Set the CRT video mode from the fb_info structure
  438. */
  439. static int sm501fb_set_par_crt(struct fb_info *info)
  440. {
  441. struct sm501fb_par *par = info->par;
  442. struct sm501fb_info *fbi = par->info;
  443. struct fb_var_screeninfo *var = &info->var;
  444. unsigned long control; /* control register */
  445. int ret;
  446. /* activate new configuration */
  447. dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
  448. /* enable CRT DAC - note 0 is on!*/
  449. sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
  450. control = readl(fbi->regs + SM501_DC_CRT_CONTROL);
  451. control &= (SM501_DC_CRT_CONTROL_PIXEL_MASK |
  452. SM501_DC_CRT_CONTROL_GAMMA |
  453. SM501_DC_CRT_CONTROL_BLANK |
  454. SM501_DC_CRT_CONTROL_SEL |
  455. SM501_DC_CRT_CONTROL_CP |
  456. SM501_DC_CRT_CONTROL_TVP);
  457. /* set the sync polarities before we check data source */
  458. if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
  459. control |= SM501_DC_CRT_CONTROL_HSP;
  460. if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
  461. control |= SM501_DC_CRT_CONTROL_VSP;
  462. if ((control & SM501_DC_CRT_CONTROL_SEL) == 0) {
  463. /* the head is displaying panel data... */
  464. sm501_alloc_mem(fbi, &par->screen, SM501_MEMF_CRT, 0);
  465. goto out_update;
  466. }
  467. ret = sm501fb_set_par_common(info, var);
  468. if (ret) {
  469. dev_err(fbi->dev, "failed to set common parameters\n");
  470. return ret;
  471. }
  472. sm501fb_pan_crt(var, info);
  473. sm501fb_set_par_geometry(info, var);
  474. control |= SM501_FIFO_3; /* fill if >3 free slots */
  475. switch(var->bits_per_pixel) {
  476. case 8:
  477. control |= SM501_DC_CRT_CONTROL_8BPP;
  478. break;
  479. case 16:
  480. control |= SM501_DC_CRT_CONTROL_16BPP;
  481. break;
  482. case 32:
  483. control |= SM501_DC_CRT_CONTROL_32BPP;
  484. sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
  485. break;
  486. default:
  487. BUG();
  488. }
  489. control |= SM501_DC_CRT_CONTROL_SEL; /* CRT displays CRT data */
  490. control |= SM501_DC_CRT_CONTROL_TE; /* enable CRT timing */
  491. control |= SM501_DC_CRT_CONTROL_ENABLE; /* enable CRT plane */
  492. out_update:
  493. dev_dbg(fbi->dev, "new control is %08lx\n", control);
  494. writel(control, fbi->regs + SM501_DC_CRT_CONTROL);
  495. sm501fb_sync_regs(fbi);
  496. return 0;
  497. }
  498. static void sm501fb_panel_power(struct sm501fb_info *fbi, int to)
  499. {
  500. unsigned long control;
  501. void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL;
  502. control = readl(ctrl_reg);
  503. if (to && (control & SM501_DC_PANEL_CONTROL_VDD) == 0) {
  504. /* enable panel power */
  505. control |= SM501_DC_PANEL_CONTROL_VDD; /* FPVDDEN */
  506. writel(control, ctrl_reg);
  507. sm501fb_sync_regs(fbi);
  508. mdelay(10);
  509. control |= SM501_DC_PANEL_CONTROL_DATA; /* DATA */
  510. writel(control, ctrl_reg);
  511. sm501fb_sync_regs(fbi);
  512. mdelay(10);
  513. control |= SM501_DC_PANEL_CONTROL_BIAS; /* VBIASEN */
  514. writel(control, ctrl_reg);
  515. sm501fb_sync_regs(fbi);
  516. mdelay(10);
  517. control |= SM501_DC_PANEL_CONTROL_FPEN;
  518. writel(control, ctrl_reg);
  519. } else if (!to && (control & SM501_DC_PANEL_CONTROL_VDD) != 0) {
  520. /* disable panel power */
  521. control &= ~SM501_DC_PANEL_CONTROL_FPEN;
  522. writel(control, ctrl_reg);
  523. sm501fb_sync_regs(fbi);
  524. mdelay(10);
  525. control &= ~SM501_DC_PANEL_CONTROL_BIAS;
  526. writel(control, ctrl_reg);
  527. sm501fb_sync_regs(fbi);
  528. mdelay(10);
  529. control &= ~SM501_DC_PANEL_CONTROL_DATA;
  530. writel(control, ctrl_reg);
  531. sm501fb_sync_regs(fbi);
  532. mdelay(10);
  533. control &= ~SM501_DC_PANEL_CONTROL_VDD;
  534. writel(control, ctrl_reg);
  535. sm501fb_sync_regs(fbi);
  536. mdelay(10);
  537. }
  538. sm501fb_sync_regs(fbi);
  539. }
  540. /* sm501fb_set_par_pnl
  541. *
  542. * Set the panel video mode from the fb_info structure
  543. */
  544. static int sm501fb_set_par_pnl(struct fb_info *info)
  545. {
  546. struct sm501fb_par *par = info->par;
  547. struct sm501fb_info *fbi = par->info;
  548. struct fb_var_screeninfo *var = &info->var;
  549. unsigned long control;
  550. unsigned long reg;
  551. int ret;
  552. dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
  553. /* activate this new configuration */
  554. ret = sm501fb_set_par_common(info, var);
  555. if (ret)
  556. return ret;
  557. sm501fb_pan_pnl(var, info);
  558. sm501fb_set_par_geometry(info, var);
  559. /* update control register */
  560. control = readl(fbi->regs + SM501_DC_PANEL_CONTROL);
  561. control &= (SM501_DC_PANEL_CONTROL_GAMMA |
  562. SM501_DC_PANEL_CONTROL_VDD |
  563. SM501_DC_PANEL_CONTROL_DATA |
  564. SM501_DC_PANEL_CONTROL_BIAS |
  565. SM501_DC_PANEL_CONTROL_FPEN |
  566. SM501_DC_PANEL_CONTROL_CP |
  567. SM501_DC_PANEL_CONTROL_CK |
  568. SM501_DC_PANEL_CONTROL_HP |
  569. SM501_DC_PANEL_CONTROL_VP |
  570. SM501_DC_PANEL_CONTROL_HPD |
  571. SM501_DC_PANEL_CONTROL_VPD);
  572. control |= SM501_FIFO_3; /* fill if >3 free slots */
  573. switch(var->bits_per_pixel) {
  574. case 8:
  575. control |= SM501_DC_PANEL_CONTROL_8BPP;
  576. break;
  577. case 16:
  578. control |= SM501_DC_PANEL_CONTROL_16BPP;
  579. break;
  580. case 32:
  581. control |= SM501_DC_PANEL_CONTROL_32BPP;
  582. sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
  583. break;
  584. default:
  585. BUG();
  586. }
  587. writel(0x0, fbi->regs + SM501_DC_PANEL_PANNING_CONTROL);
  588. /* panel plane top left and bottom right location */
  589. writel(0x00, fbi->regs + SM501_DC_PANEL_TL_LOC);
  590. reg = var->xres - 1;
  591. reg |= (var->yres - 1) << 16;
  592. writel(reg, fbi->regs + SM501_DC_PANEL_BR_LOC);
  593. /* program panel control register */
  594. control |= SM501_DC_PANEL_CONTROL_TE; /* enable PANEL timing */
  595. control |= SM501_DC_PANEL_CONTROL_EN; /* enable PANEL gfx plane */
  596. if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
  597. control |= SM501_DC_PANEL_CONTROL_HSP;
  598. if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
  599. control |= SM501_DC_PANEL_CONTROL_VSP;
  600. writel(control, fbi->regs + SM501_DC_PANEL_CONTROL);
  601. sm501fb_sync_regs(fbi);
  602. /* power the panel up */
  603. sm501fb_panel_power(fbi, 1);
  604. return 0;
  605. }
  606. /* chan_to_field
  607. *
  608. * convert a colour value into a field position
  609. *
  610. * from pxafb.c
  611. */
  612. static inline unsigned int chan_to_field(unsigned int chan,
  613. struct fb_bitfield *bf)
  614. {
  615. chan &= 0xffff;
  616. chan >>= 16 - bf->length;
  617. return chan << bf->offset;
  618. }
  619. /* sm501fb_setcolreg
  620. *
  621. * set the colour mapping for modes that support palettised data
  622. */
  623. static int sm501fb_setcolreg(unsigned regno,
  624. unsigned red, unsigned green, unsigned blue,
  625. unsigned transp, struct fb_info *info)
  626. {
  627. struct sm501fb_par *par = info->par;
  628. struct sm501fb_info *fbi = par->info;
  629. void __iomem *base = fbi->regs;
  630. unsigned int val;
  631. if (par->head == HEAD_CRT)
  632. base += SM501_DC_CRT_PALETTE;
  633. else
  634. base += SM501_DC_PANEL_PALETTE;
  635. switch (info->fix.visual) {
  636. case FB_VISUAL_TRUECOLOR:
  637. /* true-colour, use pseuo-palette */
  638. if (regno < 16) {
  639. u32 *pal = par->pseudo_palette;
  640. val = chan_to_field(red, &info->var.red);
  641. val |= chan_to_field(green, &info->var.green);
  642. val |= chan_to_field(blue, &info->var.blue);
  643. pal[regno] = val;
  644. }
  645. break;
  646. case FB_VISUAL_PSEUDOCOLOR:
  647. if (regno < 256) {
  648. val = (red >> 8) << 16;
  649. val |= (green >> 8) << 8;
  650. val |= blue >> 8;
  651. writel(val, base + (regno * 4));
  652. }
  653. break;
  654. default:
  655. return 1; /* unknown type */
  656. }
  657. return 0;
  658. }
  659. /* sm501fb_blank_pnl
  660. *
  661. * Blank or un-blank the panel interface
  662. */
  663. static int sm501fb_blank_pnl(int blank_mode, struct fb_info *info)
  664. {
  665. struct sm501fb_par *par = info->par;
  666. struct sm501fb_info *fbi = par->info;
  667. dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
  668. switch (blank_mode) {
  669. case FB_BLANK_POWERDOWN:
  670. sm501fb_panel_power(fbi, 0);
  671. break;
  672. case FB_BLANK_UNBLANK:
  673. sm501fb_panel_power(fbi, 1);
  674. break;
  675. case FB_BLANK_NORMAL:
  676. case FB_BLANK_VSYNC_SUSPEND:
  677. case FB_BLANK_HSYNC_SUSPEND:
  678. default:
  679. return 1;
  680. }
  681. return 0;
  682. }
  683. /* sm501fb_blank_crt
  684. *
  685. * Blank or un-blank the crt interface
  686. */
  687. static int sm501fb_blank_crt(int blank_mode, struct fb_info *info)
  688. {
  689. struct sm501fb_par *par = info->par;
  690. struct sm501fb_info *fbi = par->info;
  691. unsigned long ctrl;
  692. dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
  693. ctrl = readl(fbi->regs + SM501_DC_CRT_CONTROL);
  694. switch (blank_mode) {
  695. case FB_BLANK_POWERDOWN:
  696. ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
  697. sm501_misc_control(fbi->dev->parent, SM501_MISC_DAC_POWER, 0);
  698. case FB_BLANK_NORMAL:
  699. ctrl |= SM501_DC_CRT_CONTROL_BLANK;
  700. break;
  701. case FB_BLANK_UNBLANK:
  702. ctrl &= ~SM501_DC_CRT_CONTROL_BLANK;
  703. ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
  704. sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
  705. break;
  706. case FB_BLANK_VSYNC_SUSPEND:
  707. case FB_BLANK_HSYNC_SUSPEND:
  708. default:
  709. return 1;
  710. }
  711. writel(ctrl, fbi->regs + SM501_DC_CRT_CONTROL);
  712. sm501fb_sync_regs(fbi);
  713. return 0;
  714. }
  715. /* sm501fb_cursor
  716. *
  717. * set or change the hardware cursor parameters
  718. */
  719. static int sm501fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
  720. {
  721. struct sm501fb_par *par = info->par;
  722. struct sm501fb_info *fbi = par->info;
  723. void __iomem *base = fbi->regs;
  724. unsigned long hwc_addr;
  725. unsigned long fg, bg;
  726. dev_dbg(fbi->dev, "%s(%p,%p)\n", __func__, info, cursor);
  727. if (par->head == HEAD_CRT)
  728. base += SM501_DC_CRT_HWC_BASE;
  729. else
  730. base += SM501_DC_PANEL_HWC_BASE;
  731. /* check not being asked to exceed capabilities */
  732. if (cursor->image.width > 64)
  733. return -EINVAL;
  734. if (cursor->image.height > 64)
  735. return -EINVAL;
  736. if (cursor->image.depth > 1)
  737. return -EINVAL;
  738. hwc_addr = readl(base + SM501_OFF_HWC_ADDR);
  739. if (cursor->enable)
  740. writel(hwc_addr | SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
  741. else
  742. writel(hwc_addr & ~SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
  743. /* set data */
  744. if (cursor->set & FB_CUR_SETPOS) {
  745. unsigned int x = cursor->image.dx;
  746. unsigned int y = cursor->image.dy;
  747. if (x >= 2048 || y >= 2048 )
  748. return -EINVAL;
  749. dev_dbg(fbi->dev, "set position %d,%d\n", x, y);
  750. //y += cursor->image.height;
  751. writel(x | (y << 16), base + SM501_OFF_HWC_LOC);
  752. }
  753. if (cursor->set & FB_CUR_SETCMAP) {
  754. unsigned int bg_col = cursor->image.bg_color;
  755. unsigned int fg_col = cursor->image.fg_color;
  756. dev_dbg(fbi->dev, "%s: update cmap (%08x,%08x)\n",
  757. __func__, bg_col, fg_col);
  758. bg = ((info->cmap.red[bg_col] & 0xF8) << 8) |
  759. ((info->cmap.green[bg_col] & 0xFC) << 3) |
  760. ((info->cmap.blue[bg_col] & 0xF8) >> 3);
  761. fg = ((info->cmap.red[fg_col] & 0xF8) << 8) |
  762. ((info->cmap.green[fg_col] & 0xFC) << 3) |
  763. ((info->cmap.blue[fg_col] & 0xF8) >> 3);
  764. dev_dbg(fbi->dev, "fgcol %08x, bgcol %08x\n", fg, bg);
  765. writel(bg, base + SM501_OFF_HWC_COLOR_1_2);
  766. writel(fg, base + SM501_OFF_HWC_COLOR_3);
  767. }
  768. if (cursor->set & FB_CUR_SETSIZE ||
  769. cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
  770. /* SM501 cursor is a two bpp 64x64 bitmap this routine
  771. * clears it to transparent then combines the cursor
  772. * shape plane with the colour plane to set the
  773. * cursor */
  774. int x, y;
  775. const unsigned char *pcol = cursor->image.data;
  776. const unsigned char *pmsk = cursor->mask;
  777. void __iomem *dst = par->cursor.k_addr;
  778. unsigned char dcol = 0;
  779. unsigned char dmsk = 0;
  780. unsigned int op;
  781. dev_dbg(fbi->dev, "%s: setting shape (%d,%d)\n",
  782. __func__, cursor->image.width, cursor->image.height);
  783. for (op = 0; op < (64*64*2)/8; op+=4)
  784. writel(0x0, dst + op);
  785. for (y = 0; y < cursor->image.height; y++) {
  786. for (x = 0; x < cursor->image.width; x++) {
  787. if ((x % 8) == 0) {
  788. dcol = *pcol++;
  789. dmsk = *pmsk++;
  790. } else {
  791. dcol >>= 1;
  792. dmsk >>= 1;
  793. }
  794. if (dmsk & 1) {
  795. op = (dcol & 1) ? 1 : 3;
  796. op <<= ((x % 4) * 2);
  797. op |= readb(dst + (x / 4));
  798. writeb(op, dst + (x / 4));
  799. }
  800. }
  801. dst += (64*2)/8;
  802. }
  803. }
  804. sm501fb_sync_regs(fbi); /* ensure cursor data flushed */
  805. return 0;
  806. }
  807. /* sm501fb_crtsrc_show
  808. *
  809. * device attribute code to show where the crt output is sourced from
  810. */
  811. static ssize_t sm501fb_crtsrc_show(struct device *dev,
  812. struct device_attribute *attr, char *buf)
  813. {
  814. struct sm501fb_info *info = dev_get_drvdata(dev);
  815. unsigned long ctrl;
  816. ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
  817. ctrl &= SM501_DC_CRT_CONTROL_SEL;
  818. return snprintf(buf, PAGE_SIZE, "%s\n", ctrl ? "crt" : "panel");
  819. }
  820. /* sm501fb_crtsrc_show
  821. *
  822. * device attribute code to set where the crt output is sourced from
  823. */
  824. static ssize_t sm501fb_crtsrc_store(struct device *dev,
  825. struct device_attribute *attr,
  826. const char *buf, size_t len)
  827. {
  828. struct sm501fb_info *info = dev_get_drvdata(dev);
  829. enum sm501_controller head;
  830. unsigned long ctrl;
  831. if (len < 1)
  832. return -EINVAL;
  833. if (strnicmp(buf, "crt", 3) == 0)
  834. head = HEAD_CRT;
  835. else if (strnicmp(buf, "panel", 5) == 0)
  836. head = HEAD_PANEL;
  837. else
  838. return -EINVAL;
  839. dev_info(dev, "setting crt source to head %d\n", head);
  840. ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
  841. if (head == HEAD_CRT) {
  842. ctrl |= SM501_DC_CRT_CONTROL_SEL;
  843. ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
  844. ctrl |= SM501_DC_CRT_CONTROL_TE;
  845. } else {
  846. ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
  847. ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
  848. ctrl &= ~SM501_DC_CRT_CONTROL_TE;
  849. }
  850. writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
  851. sm501fb_sync_regs(info);
  852. return len;
  853. }
  854. /* Prepare the device_attr for registration with sysfs later */
  855. static DEVICE_ATTR(crt_src, 0666, sm501fb_crtsrc_show, sm501fb_crtsrc_store);
  856. /* sm501fb_show_regs
  857. *
  858. * show the primary sm501 registers
  859. */
  860. static int sm501fb_show_regs(struct sm501fb_info *info, char *ptr,
  861. unsigned int start, unsigned int len)
  862. {
  863. void __iomem *mem = info->regs;
  864. char *buf = ptr;
  865. unsigned int reg;
  866. for (reg = start; reg < (len + start); reg += 4)
  867. ptr += sprintf(ptr, "%08x = %08x\n", reg, readl(mem + reg));
  868. return ptr - buf;
  869. }
  870. /* sm501fb_debug_show_crt
  871. *
  872. * show the crt control and cursor registers
  873. */
  874. static ssize_t sm501fb_debug_show_crt(struct device *dev,
  875. struct device_attribute *attr, char *buf)
  876. {
  877. struct sm501fb_info *info = dev_get_drvdata(dev);
  878. char *ptr = buf;
  879. ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_CONTROL, 0x40);
  880. ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_HWC_BASE, 0x10);
  881. return ptr - buf;
  882. }
  883. static DEVICE_ATTR(fbregs_crt, 0444, sm501fb_debug_show_crt, NULL);
  884. /* sm501fb_debug_show_pnl
  885. *
  886. * show the panel control and cursor registers
  887. */
  888. static ssize_t sm501fb_debug_show_pnl(struct device *dev,
  889. struct device_attribute *attr, char *buf)
  890. {
  891. struct sm501fb_info *info = dev_get_drvdata(dev);
  892. char *ptr = buf;
  893. ptr += sm501fb_show_regs(info, ptr, 0x0, 0x40);
  894. ptr += sm501fb_show_regs(info, ptr, SM501_DC_PANEL_HWC_BASE, 0x10);
  895. return ptr - buf;
  896. }
  897. static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL);
  898. /* framebuffer ops */
  899. static struct fb_ops sm501fb_ops_crt = {
  900. .owner = THIS_MODULE,
  901. .fb_check_var = sm501fb_check_var_crt,
  902. .fb_set_par = sm501fb_set_par_crt,
  903. .fb_blank = sm501fb_blank_crt,
  904. .fb_setcolreg = sm501fb_setcolreg,
  905. .fb_pan_display = sm501fb_pan_crt,
  906. .fb_cursor = sm501fb_cursor,
  907. .fb_fillrect = cfb_fillrect,
  908. .fb_copyarea = cfb_copyarea,
  909. .fb_imageblit = cfb_imageblit,
  910. };
  911. static struct fb_ops sm501fb_ops_pnl = {
  912. .owner = THIS_MODULE,
  913. .fb_check_var = sm501fb_check_var_pnl,
  914. .fb_set_par = sm501fb_set_par_pnl,
  915. .fb_pan_display = sm501fb_pan_pnl,
  916. .fb_blank = sm501fb_blank_pnl,
  917. .fb_setcolreg = sm501fb_setcolreg,
  918. .fb_cursor = sm501fb_cursor,
  919. .fb_fillrect = cfb_fillrect,
  920. .fb_copyarea = cfb_copyarea,
  921. .fb_imageblit = cfb_imageblit,
  922. };
  923. /* sm501fb_info_alloc
  924. *
  925. * creates and initialises an sm501fb_info structure
  926. */
  927. static struct sm501fb_info *sm501fb_info_alloc(struct fb_info *fbinfo_crt,
  928. struct fb_info *fbinfo_pnl)
  929. {
  930. struct sm501fb_info *info;
  931. struct sm501fb_par *par;
  932. info = kzalloc(sizeof(struct sm501fb_info), GFP_KERNEL);
  933. if (info) {
  934. /* set the references back */
  935. par = fbinfo_crt->par;
  936. par->info = info;
  937. par->head = HEAD_CRT;
  938. fbinfo_crt->pseudo_palette = &par->pseudo_palette;
  939. par = fbinfo_pnl->par;
  940. par->info = info;
  941. par->head = HEAD_PANEL;
  942. fbinfo_pnl->pseudo_palette = &par->pseudo_palette;
  943. /* store the two fbs into our info */
  944. info->fb[HEAD_CRT] = fbinfo_crt;
  945. info->fb[HEAD_PANEL] = fbinfo_pnl;
  946. }
  947. return info;
  948. }
  949. /* sm501_init_cursor
  950. *
  951. * initialise hw cursor parameters
  952. */
  953. static int sm501_init_cursor(struct fb_info *fbi, unsigned int reg_base)
  954. {
  955. struct sm501fb_par *par = fbi->par;
  956. struct sm501fb_info *info = par->info;
  957. int ret;
  958. par->cursor_regs = info->regs + reg_base;
  959. ret = sm501_alloc_mem(info, &par->cursor, SM501_MEMF_CURSOR, 1024);
  960. if (ret < 0)
  961. return ret;
  962. /* initialise the colour registers */
  963. writel(par->cursor.sm_addr, par->cursor_regs + SM501_OFF_HWC_ADDR);
  964. writel(0x00, par->cursor_regs + SM501_OFF_HWC_LOC);
  965. writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_1_2);
  966. writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_3);
  967. sm501fb_sync_regs(info);
  968. return 0;
  969. }
  970. /* sm501fb_info_start
  971. *
  972. * fills the par structure claiming resources and remapping etc.
  973. */
  974. static int sm501fb_start(struct sm501fb_info *info,
  975. struct platform_device *pdev)
  976. {
  977. struct resource *res;
  978. struct device *dev;
  979. int ret;
  980. info->dev = dev = &pdev->dev;
  981. platform_set_drvdata(pdev, info);
  982. info->irq = ret = platform_get_irq(pdev, 0);
  983. if (ret < 0) {
  984. /* we currently do not use the IRQ */
  985. dev_warn(dev, "no irq for device\n");
  986. }
  987. /* allocate, reserve and remap resources for registers */
  988. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  989. if (res == NULL) {
  990. dev_err(dev, "no resource definition for registers\n");
  991. ret = -ENOENT;
  992. goto err_release;
  993. }
  994. info->regs_res = request_mem_region(res->start,
  995. res->end - res->start,
  996. pdev->name);
  997. if (info->regs_res == NULL) {
  998. dev_err(dev, "cannot claim registers\n");
  999. ret = -ENXIO;
  1000. goto err_release;
  1001. }
  1002. info->regs = ioremap(res->start, (res->end - res->start)+1);
  1003. if (info->regs == NULL) {
  1004. dev_err(dev, "cannot remap registers\n");
  1005. ret = -ENXIO;
  1006. goto err_regs_res;
  1007. }
  1008. /* allocate, reserve resources for framebuffer */
  1009. res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
  1010. if (res == NULL) {
  1011. dev_err(dev, "no memory resource defined\n");
  1012. ret = -ENXIO;
  1013. goto err_regs_map;
  1014. }
  1015. info->fbmem_res = request_mem_region(res->start,
  1016. (res->end - res->start)+1,
  1017. pdev->name);
  1018. if (info->fbmem_res == NULL) {
  1019. dev_err(dev, "cannot claim framebuffer\n");
  1020. ret = -ENXIO;
  1021. goto err_regs_map;
  1022. }
  1023. info->fbmem = ioremap(res->start, (res->end - res->start)+1);
  1024. if (info->fbmem == NULL) {
  1025. dev_err(dev, "cannot remap framebuffer\n");
  1026. goto err_mem_res;
  1027. }
  1028. info->fbmem_len = (res->end - res->start)+1;
  1029. /* enable display controller */
  1030. sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1);
  1031. /* setup cursors */
  1032. sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR);
  1033. sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR);
  1034. return 0; /* everything is setup */
  1035. err_mem_res:
  1036. release_resource(info->fbmem_res);
  1037. kfree(info->fbmem_res);
  1038. err_regs_map:
  1039. iounmap(info->regs);
  1040. err_regs_res:
  1041. release_resource(info->regs_res);
  1042. kfree(info->regs_res);
  1043. err_release:
  1044. return ret;
  1045. }
  1046. static void sm501fb_stop(struct sm501fb_info *info)
  1047. {
  1048. /* disable display controller */
  1049. sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
  1050. iounmap(info->fbmem);
  1051. release_resource(info->fbmem_res);
  1052. kfree(info->fbmem_res);
  1053. iounmap(info->regs);
  1054. release_resource(info->regs_res);
  1055. kfree(info->regs_res);
  1056. }
  1057. static void sm501fb_info_release(struct sm501fb_info *info)
  1058. {
  1059. kfree(info);
  1060. }
  1061. static int sm501fb_init_fb(struct fb_info *fb,
  1062. enum sm501_controller head,
  1063. const char *fbname)
  1064. {
  1065. struct sm501_platdata_fbsub *pd;
  1066. struct sm501fb_par *par = fb->par;
  1067. struct sm501fb_info *info = par->info;
  1068. unsigned long ctrl;
  1069. unsigned int enable;
  1070. int ret;
  1071. switch (head) {
  1072. case HEAD_CRT:
  1073. pd = info->pdata->fb_crt;
  1074. ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
  1075. enable = (ctrl & SM501_DC_CRT_CONTROL_ENABLE) ? 1 : 0;
  1076. /* ensure we set the correct source register */
  1077. if (info->pdata->fb_route != SM501_FB_CRT_PANEL) {
  1078. ctrl |= SM501_DC_CRT_CONTROL_SEL;
  1079. writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
  1080. }
  1081. break;
  1082. case HEAD_PANEL:
  1083. pd = info->pdata->fb_pnl;
  1084. ctrl = readl(info->regs + SM501_DC_PANEL_CONTROL);
  1085. enable = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0;
  1086. break;
  1087. default:
  1088. pd = NULL; /* stop compiler warnings */
  1089. ctrl = 0;
  1090. enable = 0;
  1091. BUG();
  1092. }
  1093. dev_info(info->dev, "fb %s %sabled at start\n",
  1094. fbname, enable ? "en" : "dis");
  1095. /* check to see if our routing allows this */
  1096. if (head == HEAD_CRT && info->pdata->fb_route == SM501_FB_CRT_PANEL) {
  1097. ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
  1098. writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
  1099. enable = 0;
  1100. }
  1101. strlcpy(fb->fix.id, fbname, sizeof(fb->fix.id));
  1102. memcpy(&par->ops,
  1103. (head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl,
  1104. sizeof(struct fb_ops));
  1105. /* update ops dependant on what we've been passed */
  1106. if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0)
  1107. par->ops.fb_cursor = NULL;
  1108. fb->fbops = &par->ops;
  1109. fb->flags = FBINFO_FLAG_DEFAULT |
  1110. FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
  1111. /* fixed data */
  1112. fb->fix.type = FB_TYPE_PACKED_PIXELS;
  1113. fb->fix.type_aux = 0;
  1114. fb->fix.xpanstep = 1;
  1115. fb->fix.ypanstep = 1;
  1116. fb->fix.ywrapstep = 0;
  1117. fb->fix.accel = FB_ACCEL_NONE;
  1118. /* screenmode */
  1119. fb->var.nonstd = 0;
  1120. fb->var.activate = FB_ACTIVATE_NOW;
  1121. fb->var.accel_flags = 0;
  1122. fb->var.vmode = FB_VMODE_NONINTERLACED;
  1123. fb->var.bits_per_pixel = 16;
  1124. if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) {
  1125. /* TODO read the mode from the current display */
  1126. } else {
  1127. if (pd->def_mode) {
  1128. dev_info(info->dev, "using supplied mode\n");
  1129. fb_videomode_to_var(&fb->var, pd->def_mode);
  1130. fb->var.bits_per_pixel = pd->def_bpp ? pd->def_bpp : 8;
  1131. fb->var.xres_virtual = fb->var.xres;
  1132. fb->var.yres_virtual = fb->var.yres;
  1133. } else {
  1134. ret = fb_find_mode(&fb->var, fb,
  1135. NULL, NULL, 0, NULL, 8);
  1136. if (ret == 0 || ret == 4) {
  1137. dev_err(info->dev,
  1138. "failed to get initial mode\n");
  1139. return -EINVAL;
  1140. }
  1141. }
  1142. }
  1143. /* initialise and set the palette */
  1144. fb_alloc_cmap(&fb->cmap, NR_PALETTE, 0);
  1145. fb_set_cmap(&fb->cmap, fb);
  1146. ret = (fb->fbops->fb_check_var)(&fb->var, fb);
  1147. if (ret)
  1148. dev_err(info->dev, "check_var() failed on initial setup?\n");
  1149. /* ensure we've activated our new configuration */
  1150. (fb->fbops->fb_set_par)(fb);
  1151. return 0;
  1152. }
  1153. /* default platform data if none is supplied (ie, PCI device) */
  1154. static struct sm501_platdata_fbsub sm501fb_pdata_crt = {
  1155. .flags = (SM501FB_FLAG_USE_INIT_MODE |
  1156. SM501FB_FLAG_USE_HWCURSOR |
  1157. SM501FB_FLAG_USE_HWACCEL |
  1158. SM501FB_FLAG_DISABLE_AT_EXIT),
  1159. };
  1160. static struct sm501_platdata_fbsub sm501fb_pdata_pnl = {
  1161. .flags = (SM501FB_FLAG_USE_INIT_MODE |
  1162. SM501FB_FLAG_USE_HWCURSOR |
  1163. SM501FB_FLAG_USE_HWACCEL |
  1164. SM501FB_FLAG_DISABLE_AT_EXIT),
  1165. };
  1166. static struct sm501_platdata_fb sm501fb_def_pdata = {
  1167. .fb_route = SM501_FB_OWN,
  1168. .fb_crt = &sm501fb_pdata_crt,
  1169. .fb_pnl = &sm501fb_pdata_pnl,
  1170. };
  1171. static char driver_name_crt[] = "sm501fb-crt";
  1172. static char driver_name_pnl[] = "sm501fb-panel";
  1173. static int __init sm501fb_probe(struct platform_device *pdev)
  1174. {
  1175. struct sm501fb_info *info;
  1176. struct device *dev = &pdev->dev;
  1177. struct fb_info *fbinfo_crt;
  1178. struct fb_info *fbinfo_pnl;
  1179. int ret;
  1180. /* allocate our framebuffers */
  1181. fbinfo_crt = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
  1182. if (fbinfo_crt == NULL) {
  1183. dev_err(dev, "cannot allocate crt framebuffer\n");
  1184. return -ENOMEM;
  1185. }
  1186. fbinfo_pnl = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
  1187. if (fbinfo_pnl == NULL) {
  1188. dev_err(dev, "cannot allocate panel framebuffer\n");
  1189. ret = -ENOMEM;
  1190. goto fbinfo_crt_alloc_fail;
  1191. }
  1192. info = sm501fb_info_alloc(fbinfo_crt, fbinfo_pnl);
  1193. if (info == NULL) {
  1194. dev_err(dev, "cannot allocate par\n");
  1195. ret = -ENOMEM;
  1196. goto sm501fb_alloc_fail;
  1197. }
  1198. if (dev->parent->platform_data) {
  1199. struct sm501_platdata *pd = dev->parent->platform_data;
  1200. info->pdata = pd->fb;
  1201. }
  1202. if (info->pdata == NULL) {
  1203. dev_info(dev, "using default configuration data\n");
  1204. info->pdata = &sm501fb_def_pdata;
  1205. }
  1206. /* start the framebuffers */
  1207. ret = sm501fb_start(info, pdev);
  1208. if (ret) {
  1209. dev_err(dev, "cannot initialise SM501\n");
  1210. goto sm501fb_start_fail;
  1211. }
  1212. /* CRT framebuffer setup */
  1213. ret = sm501fb_init_fb(fbinfo_crt, HEAD_CRT, driver_name_crt);
  1214. if (ret) {
  1215. dev_err(dev, "cannot initialise CRT fb\n");
  1216. goto sm501fb_start_fail;
  1217. }
  1218. /* Panel framebuffer setup */
  1219. ret = sm501fb_init_fb(fbinfo_pnl, HEAD_PANEL, driver_name_pnl);
  1220. if (ret) {
  1221. dev_err(dev, "cannot initialise Panel fb\n");
  1222. goto sm501fb_start_fail;
  1223. }
  1224. /* register framebuffers */
  1225. ret = register_framebuffer(fbinfo_crt);
  1226. if (ret < 0) {
  1227. dev_err(dev, "failed to register CRT fb (%d)\n", ret);
  1228. goto register_crt_fail;
  1229. }
  1230. ret = register_framebuffer(fbinfo_pnl);
  1231. if (ret < 0) {
  1232. dev_err(dev, "failed to register panel fb (%d)\n", ret);
  1233. goto register_pnl_fail;
  1234. }
  1235. dev_info(dev, "fb%d: %s frame buffer device\n",
  1236. fbinfo_crt->node, fbinfo_crt->fix.id);
  1237. dev_info(dev, "fb%d: %s frame buffer device\n",
  1238. fbinfo_pnl->node, fbinfo_pnl->fix.id);
  1239. /* create device files */
  1240. ret = device_create_file(dev, &dev_attr_crt_src);
  1241. if (ret)
  1242. goto crtsrc_fail;
  1243. ret = device_create_file(dev, &dev_attr_fbregs_pnl);
  1244. if (ret)
  1245. goto fbregs_pnl_fail;
  1246. ret = device_create_file(dev, &dev_attr_fbregs_crt);
  1247. if (ret)
  1248. goto fbregs_crt_fail;
  1249. /* we registered, return ok */
  1250. return 0;
  1251. fbregs_crt_fail:
  1252. device_remove_file(dev, &dev_attr_fbregs_pnl);
  1253. fbregs_pnl_fail:
  1254. device_remove_file(dev, &dev_attr_crt_src);
  1255. crtsrc_fail:
  1256. unregister_framebuffer(fbinfo_pnl);
  1257. register_pnl_fail:
  1258. unregister_framebuffer(fbinfo_crt);
  1259. register_crt_fail:
  1260. sm501fb_stop(info);
  1261. sm501fb_start_fail:
  1262. sm501fb_info_release(info);
  1263. sm501fb_alloc_fail:
  1264. framebuffer_release(fbinfo_pnl);
  1265. fbinfo_crt_alloc_fail:
  1266. framebuffer_release(fbinfo_crt);
  1267. return ret;
  1268. }
  1269. /*
  1270. * Cleanup
  1271. */
  1272. static int sm501fb_remove(struct platform_device *pdev)
  1273. {
  1274. struct sm501fb_info *info = platform_get_drvdata(pdev);
  1275. struct fb_info *fbinfo_crt = info->fb[0];
  1276. struct fb_info *fbinfo_pnl = info->fb[1];
  1277. device_remove_file(&pdev->dev, &dev_attr_fbregs_crt);
  1278. device_remove_file(&pdev->dev, &dev_attr_fbregs_pnl);
  1279. device_remove_file(&pdev->dev, &dev_attr_crt_src);
  1280. unregister_framebuffer(fbinfo_crt);
  1281. unregister_framebuffer(fbinfo_pnl);
  1282. sm501fb_stop(info);
  1283. sm501fb_info_release(info);
  1284. framebuffer_release(fbinfo_pnl);
  1285. framebuffer_release(fbinfo_crt);
  1286. return 0;
  1287. }
  1288. #ifdef CONFIG_PM
  1289. static int sm501fb_suspend_fb(struct sm501fb_info *info,
  1290. enum sm501_controller head)
  1291. {
  1292. struct fb_info *fbi = info->fb[head];
  1293. struct sm501fb_par *par = fbi->par;
  1294. if (par->screen.size == 0)
  1295. return 0;
  1296. /* backup copies in case chip is powered down over suspend */
  1297. par->store_fb = vmalloc(par->screen.size);
  1298. if (par->store_fb == NULL) {
  1299. dev_err(info->dev, "no memory to store screen\n");
  1300. return -ENOMEM;
  1301. }
  1302. par->store_cursor = vmalloc(par->cursor.size);
  1303. if (par->store_cursor == NULL) {
  1304. dev_err(info->dev, "no memory to store cursor\n");
  1305. goto err_nocursor;
  1306. }
  1307. memcpy_fromio(par->store_fb, par->screen.k_addr, par->screen.size);
  1308. memcpy_fromio(par->store_cursor, par->cursor.k_addr, par->cursor.size);
  1309. /* blank the relevant interface to ensure unit power minimised */
  1310. (par->ops.fb_blank)(FB_BLANK_POWERDOWN, fbi);
  1311. return 0;
  1312. err_nocursor:
  1313. vfree(par->store_fb);
  1314. return -ENOMEM;
  1315. }
  1316. static void sm501fb_resume_fb(struct sm501fb_info *info,
  1317. enum sm501_controller head)
  1318. {
  1319. struct fb_info *fbi = info->fb[head];
  1320. struct sm501fb_par *par = fbi->par;
  1321. if (par->screen.size == 0)
  1322. return;
  1323. /* re-activate the configuration */
  1324. (par->ops.fb_set_par)(fbi);
  1325. /* restore the data */
  1326. memcpy_toio(par->screen.k_addr, par->store_fb, par->screen.size);
  1327. memcpy_toio(par->cursor.k_addr, par->store_cursor, par->cursor.size);
  1328. vfree(par->store_fb);
  1329. vfree(par->store_cursor);
  1330. }
  1331. /* suspend and resume support */
  1332. static int sm501fb_suspend(struct platform_device *pdev, pm_message_t state)
  1333. {
  1334. struct sm501fb_info *info = platform_get_drvdata(pdev);
  1335. sm501fb_suspend_fb(info, HEAD_CRT);
  1336. sm501fb_suspend_fb(info, HEAD_PANEL);
  1337. /* turn off the clocks, in case the device is not powered down */
  1338. sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
  1339. return 0;
  1340. }
  1341. static int sm501fb_resume(struct platform_device *pdev)
  1342. {
  1343. struct sm501fb_info *info = platform_get_drvdata(pdev);
  1344. sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 1);
  1345. sm501fb_resume_fb(info, HEAD_CRT);
  1346. sm501fb_resume_fb(info, HEAD_PANEL);
  1347. return 0;
  1348. }
  1349. #else
  1350. #define sm501fb_suspend NULL
  1351. #define sm501fb_resume NULL
  1352. #endif
  1353. static struct platform_driver sm501fb_driver = {
  1354. .probe = sm501fb_probe,
  1355. .remove = sm501fb_remove,
  1356. .suspend = sm501fb_suspend,
  1357. .resume = sm501fb_resume,
  1358. .driver = {
  1359. .name = "sm501-fb",
  1360. .owner = THIS_MODULE,
  1361. },
  1362. };
  1363. static int __devinit sm501fb_init(void)
  1364. {
  1365. return platform_driver_register(&sm501fb_driver);
  1366. }
  1367. static void __exit sm501fb_cleanup(void)
  1368. {
  1369. platform_driver_unregister(&sm501fb_driver);
  1370. }
  1371. module_init(sm501fb_init);
  1372. module_exit(sm501fb_cleanup);
  1373. MODULE_AUTHOR("Ben Dooks, Vincent Sanders");
  1374. MODULE_DESCRIPTION("SM501 Framebuffer driver");
  1375. MODULE_LICENSE("GPL v2");