pxafb.h 2.8 KB

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  1. #ifndef __PXAFB_H__
  2. #define __PXAFB_H__
  3. /*
  4. * linux/drivers/video/pxafb.h
  5. * -- Intel PXA250/210 LCD Controller Frame Buffer Device
  6. *
  7. * Copyright (C) 1999 Eric A. Thomas.
  8. * Copyright (C) 2004 Jean-Frederic Clere.
  9. * Copyright (C) 2004 Ian Campbell.
  10. * Copyright (C) 2004 Jeff Lackey.
  11. * Based on sa1100fb.c Copyright (C) 1999 Eric A. Thomas
  12. * which in turn is
  13. * Based on acornfb.c Copyright (C) Russell King.
  14. *
  15. * 2001-08-03: Cliff Brake <cbrake@acclent.com>
  16. * - ported SA1100 code to PXA
  17. *
  18. * This file is subject to the terms and conditions of the GNU General Public
  19. * License. See the file COPYING in the main directory of this archive
  20. * for more details.
  21. */
  22. /* Shadows for LCD controller registers */
  23. struct pxafb_lcd_reg {
  24. unsigned int lccr0;
  25. unsigned int lccr1;
  26. unsigned int lccr2;
  27. unsigned int lccr3;
  28. };
  29. /* PXA LCD DMA descriptor */
  30. struct pxafb_dma_descriptor {
  31. unsigned int fdadr;
  32. unsigned int fsadr;
  33. unsigned int fidr;
  34. unsigned int ldcmd;
  35. };
  36. struct pxafb_info {
  37. struct fb_info fb;
  38. struct device *dev;
  39. /*
  40. * These are the addresses we mapped
  41. * the framebuffer memory region to.
  42. */
  43. /* raw memory addresses */
  44. dma_addr_t map_dma; /* physical */
  45. u_char * map_cpu; /* virtual */
  46. u_int map_size;
  47. /* addresses of pieces placed in raw buffer */
  48. u_char * screen_cpu; /* virtual address of frame buffer */
  49. dma_addr_t screen_dma; /* physical address of frame buffer */
  50. u16 * palette_cpu; /* virtual address of palette memory */
  51. dma_addr_t palette_dma; /* physical address of palette memory */
  52. u_int palette_size;
  53. /* DMA descriptors */
  54. struct pxafb_dma_descriptor * dmadesc_fblow_cpu;
  55. dma_addr_t dmadesc_fblow_dma;
  56. struct pxafb_dma_descriptor * dmadesc_fbhigh_cpu;
  57. dma_addr_t dmadesc_fbhigh_dma;
  58. struct pxafb_dma_descriptor * dmadesc_palette_cpu;
  59. dma_addr_t dmadesc_palette_dma;
  60. dma_addr_t fdadr0;
  61. dma_addr_t fdadr1;
  62. u_int lccr0;
  63. u_int lccr3;
  64. u_int cmap_inverse:1,
  65. cmap_static:1,
  66. unused:30;
  67. u_int reg_lccr0;
  68. u_int reg_lccr1;
  69. u_int reg_lccr2;
  70. u_int reg_lccr3;
  71. unsigned long hsync_time;
  72. volatile u_char state;
  73. volatile u_char task_state;
  74. struct semaphore ctrlr_sem;
  75. wait_queue_head_t ctrlr_wait;
  76. struct work_struct task;
  77. #ifdef CONFIG_CPU_FREQ
  78. struct notifier_block freq_transition;
  79. struct notifier_block freq_policy;
  80. #endif
  81. };
  82. #define TO_INF(ptr,member) container_of(ptr,struct pxafb_info,member)
  83. /*
  84. * These are the actions for set_ctrlr_state
  85. */
  86. #define C_DISABLE (0)
  87. #define C_ENABLE (1)
  88. #define C_DISABLE_CLKCHANGE (2)
  89. #define C_ENABLE_CLKCHANGE (3)
  90. #define C_REENABLE (4)
  91. #define C_DISABLE_PM (5)
  92. #define C_ENABLE_PM (6)
  93. #define C_STARTUP (7)
  94. #define PXA_NAME "PXA"
  95. /*
  96. * Minimum X and Y resolutions
  97. */
  98. #define MIN_XRES 64
  99. #define MIN_YRES 64
  100. #endif /* __PXAFB_H__ */