platinumfb.h 10 KB

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  1. /*
  2. * linux/drivers/video/platinumfb-hw.c -- Frame buffer device for the
  3. * Platinum on-board video in PowerMac 7200s (and some clones based
  4. * on the same motherboard.)
  5. *
  6. * Created 09 Feb 1998 by Jon Howell <jonh@cs.dartmouth.edu>
  7. *
  8. * Copyright (C) 1998 Jon Howell
  9. *
  10. * based on drivers/macintosh/platinum.c: Console support
  11. * for PowerMac "platinum" display adaptor.
  12. * Copyright (C) 1996 Paul Mackerras and Mark Abene.
  13. *
  14. * based on skeletonfb.c:
  15. * Created 28 Dec 1997 by Geert Uytterhoeven
  16. *
  17. * This file is subject to the terms and conditions of the GNU General Public
  18. * License. See the file COPYING in the main directory of this archive
  19. * for more details.
  20. */
  21. /*
  22. * Structure of the registers for the DACula colormap device.
  23. */
  24. struct cmap_regs {
  25. unsigned char addr;
  26. char pad1[15];
  27. unsigned char d1;
  28. char pad2[15];
  29. unsigned char d2;
  30. char pad3[15];
  31. unsigned char lut;
  32. char pad4[15];
  33. };
  34. /*
  35. * Structure of the registers for the "platinum" display adaptor".
  36. */
  37. struct preg { /* padded register */
  38. unsigned r; /* notice this is 32 bits. */
  39. char pad[12];
  40. };
  41. struct platinum_regs {
  42. struct preg reg[128];
  43. };
  44. /*
  45. * Register initialization tables for the platinum display.
  46. *
  47. * It seems that there are two different types of platinum display
  48. * out there. Older ones use the values in clocksel[1], for which
  49. * the formula for the clock frequency seems to be
  50. * F = 14.3MHz * c0 / (c1 & 0x1f) / (1 << (c1 >> 5))
  51. * Newer ones use the values in clocksel[0], for which the formula
  52. * seems to be
  53. * F = 15MHz * c0 / ((c1 & 0x1f) + 2) / (1 << (c1 >> 5))
  54. */
  55. struct platinum_regvals {
  56. int fb_offset;
  57. int pitch[3];
  58. unsigned regs[26];
  59. unsigned char offset[3];
  60. unsigned char mode[3];
  61. unsigned char dacula_ctrl[3];
  62. unsigned char clock_params[2][2];
  63. };
  64. #define DIV2 0x20
  65. #define DIV4 0x40
  66. #define DIV8 0x60
  67. #define DIV16 0x80
  68. /* 1280x1024, 75Hz (20) */
  69. static struct platinum_regvals platinum_reg_init_20 = {
  70. 0x5c00,
  71. { 1312, 2592, 2592 },
  72. { 0xffc, 4, 0, 0, 0, 0, 0x428, 0,
  73. 0, 0xb3, 0xd3, 0x12, 0x1a5, 0x23, 0x28, 0x2d,
  74. 0x5e, 0x19e, 0x1a4, 0x854, 0x852, 4, 9, 0x50,
  75. 0x850, 0x851 }, { 0x58, 0x5d, 0x5d },
  76. { 0, 0xff, 0xff }, { 0x51, 0x55, 0x55 },
  77. {{ 45, 3 }, { 66, 7 }}
  78. };
  79. /* 1280x960, 75Hz (19) */
  80. static struct platinum_regvals platinum_reg_init_19 = {
  81. 0x5c00,
  82. { 1312, 2592, 2592 },
  83. { 0xffc, 4, 0, 0, 0, 0, 0x428, 0,
  84. 0, 0xb2, 0xd2, 0x12, 0x1a3, 0x23, 0x28, 0x2d,
  85. 0x5c, 0x19c, 0x1a2, 0x7d0, 0x7ce, 4, 9, 0x4c,
  86. 0x7cc, 0x7cd }, { 0x56, 0x5b, 0x5b },
  87. { 0, 0xff, 0xff }, { 0x51, 0x55, 0x55 },
  88. {{ 42, 3 }, { 44, 5 }}
  89. };
  90. /* 1152x870, 75Hz (18) */
  91. static struct platinum_regvals platinum_reg_init_18 = {
  92. 0x11b0,
  93. { 1184, 2336, 4640 },
  94. { 0xff0, 4, 0, 0, 0, 0, 0x38f, 0,
  95. 0, 0x294, 0x16c, 0x20, 0x2d7, 0x3f, 0x49, 0x53,
  96. 0x82, 0x2c2, 0x2d6, 0x726, 0x724, 4, 9, 0x52,
  97. 0x71e, 0x722 }, { 0x74, 0x7c, 0x81 },
  98. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  99. {{ 26, 0 + DIV2 }, { 42, 6 }}
  100. };
  101. /* 1024x768, 75Hz (17) */
  102. static struct platinum_regvals platinum_reg_init_17 = {
  103. 0x10b0,
  104. { 1056, 2080, 4128 },
  105. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  106. 0, 0x254, 0x14b, 0x18, 0x295, 0x2f, 0x32, 0x3b,
  107. 0x80, 0x280, 0x296, 0x648, 0x646, 4, 9, 0x40,
  108. 0x640, 0x644 }, { 0x72, 0x7a, 0x7f },
  109. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  110. {{ 54, 3 + DIV2 }, { 67, 12 }}
  111. };
  112. /* 1024x768, 75Hz (16) */
  113. static struct platinum_regvals platinum_reg_init_16 = {
  114. 0x10b0,
  115. { 1056, 2080, 4128 },
  116. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  117. 0, 0x250, 0x147, 0x17, 0x28f, 0x2f, 0x35, 0x47,
  118. 0x82, 0x282, 0x28e, 0x640, 0x63e, 4, 9, 0x3c,
  119. 0x63c, 0x63d }, { 0x74, 0x7c, 0x81 },
  120. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  121. {{ 20, 0 + DIV2 }, { 11, 2 }}
  122. };
  123. /* 1024x768, 70Hz (15) */
  124. static struct platinum_regvals platinum_reg_init_15 = {
  125. 0x10b0,
  126. { 1056, 2080, 4128 },
  127. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  128. 0, 0x254, 0x14b, 0x22, 0x297, 0x43, 0x49, 0x5b,
  129. 0x86, 0x286, 0x296, 0x64c, 0x64a, 0xa, 0xf, 0x44,
  130. 0x644, 0x646 }, { 0x78, 0x80, 0x85 },
  131. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  132. {{ 19, 0 + DIV2 }, { 110, 21 }}
  133. };
  134. /* 1024x768, 60Hz (14) */
  135. static struct platinum_regvals platinum_reg_init_14 = {
  136. 0x10b0,
  137. { 1056, 2080, 4128 },
  138. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  139. 0, 0x25a, 0x14f, 0x22, 0x29f, 0x43, 0x49, 0x5b,
  140. 0x8e, 0x28e, 0x29e, 0x64c, 0x64a, 0xa, 0xf, 0x44,
  141. 0x644, 0x646 }, { 0x80, 0x88, 0x8d },
  142. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  143. {{ 71, 6 + DIV2 }, { 118, 13 + DIV2 }}
  144. };
  145. /* 832x624, 75Hz (13) */
  146. static struct platinum_regvals platinum_reg_init_13 = {
  147. 0x70,
  148. { 864, 1680, 3344 }, /* MacOS does 1680 instead of 1696 to fit 16bpp in 1MB,
  149. * and we use 3344 instead of 3360 to fit in 2Mb
  150. */
  151. { 0xff0, 4, 0, 0, 0, 0, 0x299, 0,
  152. 0, 0x21e, 0x120, 0x10, 0x23f, 0x1f, 0x25, 0x37,
  153. 0x8a, 0x22a, 0x23e, 0x536, 0x534, 4, 9, 0x52,
  154. 0x532, 0x533 }, { 0x7c, 0x84, 0x89 },
  155. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  156. {{ 30, 0 + DIV4 }, { 56, 7 + DIV2 }}
  157. };
  158. /* 800x600, 75Hz (12) */
  159. static struct platinum_regvals platinum_reg_init_12 = {
  160. 0x1010,
  161. { 832, 1632, 3232 },
  162. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  163. 0, 0x1ce, 0x108, 0x14, 0x20f, 0x27, 0x30, 0x39,
  164. 0x72, 0x202, 0x20e, 0x4e2, 0x4e0, 4, 9, 0x2e,
  165. 0x4de, 0x4df }, { 0x64, 0x6c, 0x71 },
  166. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  167. {{ 122, 7 + DIV4 }, { 62, 9 + DIV2 }}
  168. };
  169. /* 800x600, 72Hz (11) */
  170. static struct platinum_regvals platinum_reg_init_11 = {
  171. 0x1010,
  172. { 832, 1632, 3232 },
  173. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  174. 0, 0x1ca, 0x104, 0x1e, 0x207, 0x3b, 0x44, 0x4d,
  175. 0x56, 0x1e6, 0x206, 0x534, 0x532, 0xa, 0xe, 0x38,
  176. 0x4e8, 0x4ec }, { 0x48, 0x50, 0x55 },
  177. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  178. {{ 26, 0 + DIV4 }, { 42, 6 + DIV2 }}
  179. };
  180. /* 800x600, 60Hz (10) */
  181. static struct platinum_regvals platinum_reg_init_10 = {
  182. 0x1010,
  183. { 832, 1632, 3232 },
  184. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  185. 0, 0x1ce, 0x108, 0x20, 0x20f, 0x3f, 0x45, 0x5d,
  186. 0x66, 0x1f6, 0x20e, 0x4e8, 0x4e6, 6, 0xa, 0x34,
  187. 0x4e4, 0x4e5 }, { 0x58, 0x60, 0x65 },
  188. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  189. {{ 54, 3 + DIV4 }, { 95, 1 + DIV8 }}
  190. };
  191. /* 800x600, 56Hz (9) --unsupported? copy of mode 10 for now... */
  192. static struct platinum_regvals platinum_reg_init_9 = {
  193. 0x1010,
  194. { 832, 1632, 3232 },
  195. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  196. 0, 0x1ce, 0x108, 0x20, 0x20f, 0x3f, 0x45, 0x5d,
  197. 0x66, 0x1f6, 0x20e, 0x4e8, 0x4e6, 6, 0xa, 0x34,
  198. 0x4e4, 0x4e5 }, { 0x58, 0x60, 0x65 },
  199. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  200. {{ 54, 3 + DIV4 }, { 88, 1 + DIV8 }}
  201. };
  202. /* 768x576, 50Hz Interlaced-PAL (8) */
  203. static struct platinum_regvals platinum_reg_init_8 = {
  204. 0x1010,
  205. { 800, 1568, 3104 },
  206. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  207. 0, 0xc8, 0xec, 0x11, 0x1d7, 0x22, 0x25, 0x36,
  208. 0x47, 0x1c7, 0x1d6, 0x271, 0x270, 4, 9, 0x27,
  209. 0x267, 0x26b }, { 0x39, 0x41, 0x46 },
  210. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  211. {{ 31, 0 + DIV16 }, { 74, 9 + DIV8 }}
  212. };
  213. /* 640x870, 75Hz Portrait (7) */
  214. static struct platinum_regvals platinum_reg_init_7 = {
  215. 0xb10,
  216. { 672, 1312, 2592 },
  217. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  218. 0, 0x176, 0xd0, 0x14, 0x19f, 0x27, 0x2d, 0x3f,
  219. 0x4a, 0x18a, 0x19e, 0x72c, 0x72a, 4, 9, 0x58,
  220. 0x724, 0x72a }, { 0x3c, 0x44, 0x49 },
  221. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  222. {{ 30, 0 + DIV4 }, { 56, 7 + DIV2 }}
  223. };
  224. /* 640x480, 67Hz (6) */
  225. static struct platinum_regvals platinum_reg_init_6 = {
  226. 0x1010,
  227. { 672, 1312, 2592 },
  228. { 0xff0, 4, 0, 0, 0, 0, 0x209, 0,
  229. 0, 0x18e, 0xd8, 0x10, 0x1af, 0x1f, 0x25, 0x37,
  230. 0x4a, 0x18a, 0x1ae, 0x41a, 0x418, 4, 9, 0x52,
  231. 0x412, 0x416 }, { 0x3c, 0x44, 0x49 },
  232. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  233. {{ 99, 4 + DIV8 }, { 42, 5 + DIV4 }}
  234. };
  235. /* 640x480, 60Hz (5) */
  236. static struct platinum_regvals platinum_reg_init_5 = {
  237. 0x1010,
  238. { 672, 1312, 2592 },
  239. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  240. 0, 0x15e, 0xc8, 0x18, 0x18f, 0x2f, 0x35, 0x3e,
  241. 0x42, 0x182, 0x18e, 0x41a, 0x418, 2, 7, 0x44,
  242. 0x404, 0x408 }, { 0x34, 0x3c, 0x41 },
  243. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  244. {{ 26, 0 + DIV8 }, { 14, 2 + DIV4 }}
  245. };
  246. /* 640x480, 60Hz Interlaced-NTSC (4) */
  247. static struct platinum_regvals platinum_reg_init_4 = {
  248. 0x1010,
  249. { 672, 1312, 2592 },
  250. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  251. 0, 0xa5, 0xc3, 0xe, 0x185, 0x1c, 0x1f, 0x30,
  252. 0x37, 0x177, 0x184, 0x20d, 0x20c, 5, 0xb, 0x23,
  253. 0x203, 0x206 }, { 0x29, 0x31, 0x36 },
  254. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  255. {{ 94, 5 + DIV16 }, { 48, 7 + DIV8 }}
  256. };
  257. /* 640x480, 50Hz Interlaced-PAL (3) */
  258. static struct platinum_regvals platinum_reg_init_3 = {
  259. 0x1010,
  260. { 672, 1312, 2592 },
  261. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  262. 0, 0xc8, 0xec, 0x11, 0x1d7, 0x22, 0x25, 0x36,
  263. 0x67, 0x1a7, 0x1d6, 0x271, 0x270, 4, 9, 0x57,
  264. 0x237, 0x26b }, { 0x59, 0x61, 0x66 },
  265. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  266. {{ 31, 0 + DIV16 }, { 74, 9 + DIV8 }}
  267. };
  268. /* 512x384, 60Hz (2) */
  269. static struct platinum_regvals platinum_reg_init_2 = {
  270. 0x1010,
  271. { 544, 1056, 2080 },
  272. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  273. 0, 0x25c, 0x140, 0x10, 0x27f, 0x1f, 0x2b, 0x4f,
  274. 0x68, 0x268, 0x27e, 0x32e, 0x32c, 4, 9, 0x2a,
  275. 0x32a, 0x32b }, { 0x5a, 0x62, 0x67 },
  276. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  277. {{ 33, 2 + DIV8 }, { 79, 9 + DIV8 }}
  278. };
  279. /* 512x384, 60Hz Interlaced-NTSC (1) */
  280. static struct platinum_regvals platinum_reg_init_1 = {
  281. 0x1010,
  282. { 544, 1056, 2080 },
  283. { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
  284. 0, 0xa5, 0xc3, 0xe, 0x185, 0x1c, 0x1f, 0x30,
  285. 0x57, 0x157, 0x184, 0x20d, 0x20c, 5, 0xb, 0x53,
  286. 0x1d3, 0x206 }, { 0x49, 0x51, 0x56 },
  287. { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
  288. {{ 94, 5 + DIV16 }, { 48, 7 + DIV8 }}
  289. };
  290. static struct platinum_regvals *platinum_reg_init[VMODE_MAX] = {
  291. &platinum_reg_init_1,
  292. &platinum_reg_init_2,
  293. &platinum_reg_init_3,
  294. &platinum_reg_init_4,
  295. &platinum_reg_init_5,
  296. &platinum_reg_init_6,
  297. &platinum_reg_init_7,
  298. &platinum_reg_init_8,
  299. &platinum_reg_init_9,
  300. &platinum_reg_init_10,
  301. &platinum_reg_init_11,
  302. &platinum_reg_init_12,
  303. &platinum_reg_init_13,
  304. &platinum_reg_init_14,
  305. &platinum_reg_init_15,
  306. &platinum_reg_init_16,
  307. &platinum_reg_init_17,
  308. &platinum_reg_init_18,
  309. &platinum_reg_init_19,
  310. &platinum_reg_init_20
  311. };
  312. struct vmode_attr {
  313. int hres;
  314. int vres;
  315. int vfreq;
  316. int interlaced;
  317. };
  318. struct vmode_attr vmode_attrs[VMODE_MAX] = {
  319. {512, 384, 60, 1},
  320. {512, 384, 60},
  321. {640, 480, 50, 1},
  322. {640, 480, 60, 1},
  323. {640, 480, 60},
  324. {640, 480, 67},
  325. {640, 870, 75},
  326. {768, 576, 50, 1},
  327. {800, 600, 56},
  328. {800, 600, 60},
  329. {800, 600, 72},
  330. {800, 600, 75},
  331. {832, 624, 75},
  332. {1024, 768, 60},
  333. {1024, 768, 72},
  334. {1024, 768, 75},
  335. {1024, 768, 75},
  336. {1152, 870, 75},
  337. {1280, 960, 75},
  338. {1280, 1024, 75}
  339. };