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- /* linux/arch/arm/mach-s3c2416/mach-cybook_orizon.c
- *
- * Slightly based on mach-s3c2416.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
- #include <linux/kernel.h>
- #include <linux/types.h>
- #include <linux/interrupt.h>
- #include <linux/list.h>
- #include <linux/timer.h>
- #include <linux/init.h>
- #include <linux/serial_core.h>
- #include <linux/platform_device.h>
- #include <asm/mach/arch.h>
- #include <asm/mach/map.h>
- #include <asm/mach/irq.h>
- #include <asm/setup.h>
- #include <asm/hardware.h>
- #include <asm/io.h>
- #include <asm/irq.h>
- #include <asm/mach-types.h>
- #include <asm/arch/regs-serial.h>
- #include <asm/arch/regs-gpio.h>
- #include <asm/arch/regs-gpioj.h>
- #include <asm/arch/regs-lcd.h>
- #include <asm/arch/regs-mem.h>
- #include <asm/arch/idle.h>
- #include <asm/arch/fb.h>
- #include <asm/plat-s3c24xx/s3c2410.h>
- #include <asm/plat-s3c24xx/s3c2440.h>
- #include <asm/plat-s3c24xx/clock.h>
- #include <asm/plat-s3c24xx/devs.h>
- #include <asm/plat-s3c24xx/cpu.h>
- #include <asm/plat-s3c24xx/common-smdk.h>
- #include <asm/arch/nand.h>
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
- #include <asm/arch/hsmmc.h>
- #include <cybook.h>
- unsigned int platform_type = CYBOOK_GEN4;
- unsigned long platform_capability = PLAT_CAP_GTILT | PLAT_CAP_SOUNDNO
- | PLAT_CAP_VTCON | PLAT_CAP_ORIZONFORM;
- static struct map_desc bkorizon_iodesc[] __initdata = {
- };
- #define UCON S3C2410_UCON_DEFAULT | S3C2440_UCON_FCLK
- #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
- #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
- static struct s3c24xx_uart_clksrc bkorizon_serial_clocks[] = {
- [0] = {
- .name = "pclk",
- .divisor = 1,
- .min_baud = 0,
- .max_baud = 0,
- },
- [1] = {
- .name = "esysclk",
- .divisor = 1,
- .min_baud = 0,
- .max_baud = 0,
- }
- };
- static struct s3c2410_uartcfg bkorizon_uartcfgs[] __initdata = {
- [0] = {
- .hwport = 0,
- .flags = 0,
- .ucon = 0x3c5,
- .ulcon = 0x03,
- .ufcon = 0x51,
- },
- [1] = { /* VRFY: Used by BT? */
- .hwport = 1,
- .flags = 0,
- /* Use PCLK */
- .ucon = 0x3c5,
- .ulcon = 0x03,
- .ufcon = 0x51,
- .clocks = bkorizon_serial_clocks,
- .clocks_size = ARRAY_SIZE(bkorizon_serial_clocks),
- },
- /* IR port */
- [2] = {
- .hwport = 2,
- .flags = 0,
- .ucon = 0x3c5,
- .ulcon = 0x03,
- .ufcon = 0x51,
- .clocks = bkorizon_serial_clocks,
- .clocks_size = ARRAY_SIZE(bkorizon_serial_clocks),
- }
- };
- extern struct platform_device orizon_device_cyio;
- extern struct platform_device orizon_device_tcon;
- /*** TODO: Verify this list and remove anything unneeded */
- static struct platform_device *bkorizon_devices[] __initdata = {
- &s3c_device_spi0,
- &s3c_device_spi1,
- &s3c_device_wdt,
- &s3c_device_i2c,
- &s3c_device_lcd,
- &s3c_device_rtc,
- &s3c_device_adc,
- &s3c_device_iis,
- &s3c_device_usbgadget,
- &s3c_device_usb,
- &s3c_device_hsmmc0,
- &s3c_device_hsmmc1,
- &s3c_device_ts_iic,
- &orizon_device_cyio,
- &orizon_device_tcon,
- };
- static struct s3c24xx_board bkorizon_board __initdata = {
- .devices = bkorizon_devices,
- .devices_count = ARRAY_SIZE(bkorizon_devices)
- };
- static void bkorizon_power_off(void)
- {
- printk(KERN_ERR "Will Shutdown...\n");
- s3c2410_gpio_cfgpin(S3C2410_GPD14, S3C2410_GPD14_OUTP);
- s3c2410_gpio_setpin(S3C2410_GPD14, 0);
- }
- static void __init bkorizon_map_io(void)
- {
- s3c24xx_init_io(bkorizon_iodesc, ARRAY_SIZE(bkorizon_iodesc));
- s3c24xx_init_clocks(12000000);
- s3c24xx_init_uarts(bkorizon_uartcfgs, ARRAY_SIZE(bkorizon_uartcfgs));
- s3c24xx_set_board(&bkorizon_board);
- }
- static void __init bkorizon_machine_init(void)
- {
- smdk_machine_init();
- pm_power_off = bkorizon_power_off;
- }
- static void __init bkorizon_fixup (struct machine_desc *desc, struct tag *tags,
- char **cmdline, struct meminfo *mi)
- {
- /*
- * Bank start addresses are not present in the information
- * passed in from the boot loader. We could potentially
- * detect them, but instead we hard-code them.
- */
- mi->bank[0].start = 0x30000000;
- mi->bank[0].size = 128*1024*1024;
- mi->bank[0].node = 0;
- mi->nr_banks = 1;
- }
- MACHINE_START(CYBOOK_ORIZON, "Cybook Orizon")
- /* Maintainer: Manoel Trapier <mtrapier@bookeen.com> */
- .phys_io = S3C2410_PA_UART,
- .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
- .boot_params = S3C2410_SDRAM_PA + 0x100,
- .init_irq = s3c24xx_init_irq,
- .map_io = bkorizon_map_io,
- .fixup = bkorizon_fixup,
- .init_machine = bkorizon_machine_init,
- .timer = &s3c24xx_timer,
- MACHINE_END
- /*
- * HS-MMC GPIO Set function for S3C2416 SMDK board
- */
- void hsmmc_set_gpio (uint channel, uint width)
- {
- switch (channel) {
- /* can supports 1 and 4 bit bus */
- case 0:
- /* GPIO E : Command, Clock */
- s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2450_GPE5_SD0_CLK);
- s3c2410_gpio_cfgpin(S3C2410_GPE6, S3C2450_GPE6_SD0_CMD);
- if (width == 1) {
- /* GPIO E : MMC DATA0[0] */
- s3c2410_gpio_cfgpin(S3C2410_GPE7, S3C2450_GPE7_SD0_DAT0);
- }
- else if (width == 4) {
- /* GPIO E : MMC DATA0[0:3] */
- s3c2410_gpio_cfgpin(S3C2410_GPE7, S3C2450_GPE7_SD0_DAT0);
- s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2450_GPE8_SD0_DAT1);
- s3c2410_gpio_cfgpin(S3C2410_GPE9, S3C2450_GPE9_SD0_DAT2);
- s3c2410_gpio_cfgpin(S3C2410_GPE10, S3C2450_GPE10_SD0_DAT3);
- }
- break;
- /* can supports 1 and 4 bit bus */
- case 1:
- /* GPIO L : Command, Clock */
- s3c2410_gpio_cfgpin(S3C2443_GPL8, S3C2450_GPL8_SD1CMD);
- s3c2410_gpio_cfgpin(S3C2443_GPL9, S3C2450_GPL9_SD1CLK);
- if (width == 1) {
- /* GPIO L : MMC DATA1[0] */
- s3c2410_gpio_cfgpin(S3C2443_GPL0, S3C2450_GPL0_SD1DAT0);
- }
- else if (width == 4) {
- /* GPIO L : MMC DATA1[0:3] */
- s3c2410_gpio_cfgpin(S3C2443_GPL0, S3C2450_GPL0_SD1DAT0);
- s3c2410_gpio_cfgpin(S3C2443_GPL1, S3C2450_GPL1_SD1DAT1);
- s3c2410_gpio_cfgpin(S3C2443_GPL2, S3C2450_GPL2_SD1DAT2);
- s3c2410_gpio_cfgpin(S3C2443_GPL3, S3C2450_GPL3_SD1DAT3);
- }
- break;
- default:
- break;
- }
- }
- EXPORT_SYMBOL_GPL(hsmmc_set_gpio);
- #define HOST_CAPS (MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | \
- MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED)
- /* Channel 0 : added HS-MMC channel */
- struct s3c_hsmmc_cfg s3c_hsmmc0_platform = {
- .hwport = 0,
- .enabled = 1,
- .host_caps = 0xF ,
- .bus_width = 4,
- .highspeed = 0,
- /* ctrl for mmc */
- .fd_ctrl[MMC_MODE_MMC] = {
- .ctrl2 = 0xC0000100, /* ctrl2 for mmc */
- .ctrl3[SPEED_NORMAL] = 0, /* ctrl3 for low speed */
- .ctrl3[SPEED_HIGH] = 0, /* ctrl3 for high speed */
- .ctrl4 = 0x3,
- },
- /* ctrl for sd */
- .fd_ctrl[MMC_MODE_SD] = {
- .ctrl2 = 0xC0000100, /* ctrl2 for sd */
- .ctrl3[SPEED_NORMAL] = 0, /* ctrl3 for low speed */
- .ctrl3[SPEED_HIGH] = 0, /* ctrl3 for high speed */
- .ctrl4 = 0x3,
- },
- .clk_name[0] = "hsmmc", /* 1st clock source */
- .clk_name[1] = "esysclk", /* 2nd clock source hsmmc-epll by Ben Dooks */
- .clk_name[2] = "hsmmc-ext", /* 3rd clock source */
- };
- /* Channel 1 : default HS-MMC channel */
- struct s3c_hsmmc_cfg s3c_hsmmc1_platform = {
- .hwport = 1,
- .enabled = 1,
- .host_caps = 0xF ,
- .bus_width = 8,
- .highspeed = 0,
- /* ctrl for mmc */
- .fd_ctrl[MMC_MODE_MMC] = {
- .ctrl2 = 0xC0000100, /* ctrl2 for mmc */
- .ctrl3[SPEED_NORMAL] = 0, /* ctrl3 for low speed */
- .ctrl3[SPEED_HIGH] = 0, /* ctrl3 for high speed */
- .ctrl4 = 0x3,
- },
- /* ctrl for sd */
- .fd_ctrl[MMC_MODE_SD] = {
- .ctrl2 = 0xC0000100, /* ctrl2 for sd */
- .ctrl3[SPEED_NORMAL] = 0, /* ctrl3 for low speed */
- .ctrl3[SPEED_HIGH] = 0, /* ctrl3 for high speed */
- .ctrl4 = 0x3,
- },
- .clk_name[0] = "hsmmc", /* 1st clock source */
- .clk_name[1] = "esysclk", /* 2nd clock source hsmmc-epll by Ben Dooks */
- .clk_name[2] = "hsmmc-ext", /* 3rd clock source */
- };
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