ioc4.h 5.8 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (c) 2005 Silicon Graphics, Inc. All Rights Reserved.
  7. */
  8. #ifndef _LINUX_IOC4_H
  9. #define _LINUX_IOC4_H
  10. #include <linux/interrupt.h>
  11. /***************
  12. * Definitions *
  13. ***************/
  14. /* Miscellaneous values inherent to hardware */
  15. #define IOC4_EXTINT_COUNT_DIVISOR 520 /* PCI clocks per COUNT tick */
  16. /***********************************
  17. * Structures needed by subdrivers *
  18. ***********************************/
  19. /* This structure fully describes the IOC4 miscellaneous registers which
  20. * appear at bar[0]+0x00000 through bar[0]+0x0005c. The corresponding
  21. * PCI resource is managed by the main IOC4 driver because it contains
  22. * registers of interest to many different IOC4 subdrivers.
  23. */
  24. struct ioc4_misc_regs {
  25. /* Miscellaneous IOC4 registers */
  26. union ioc4_pci_err_addr_l {
  27. uint32_t raw;
  28. struct {
  29. uint32_t valid:1; /* Address captured */
  30. uint32_t master_id:4; /* Unit causing error
  31. * 0/1: Serial port 0 TX/RX
  32. * 2/3: Serial port 1 TX/RX
  33. * 4/5: Serial port 2 TX/RX
  34. * 6/7: Serial port 3 TX/RX
  35. * 8: ATA/ATAPI
  36. * 9-15: Undefined
  37. */
  38. uint32_t mul_err:1; /* Multiple errors occurred */
  39. uint32_t addr:26; /* Bits 31-6 of error addr */
  40. } fields;
  41. } pci_err_addr_l;
  42. uint32_t pci_err_addr_h; /* Bits 63-32 of error addr */
  43. union ioc4_sio_int {
  44. uint32_t raw;
  45. struct {
  46. uint8_t tx_mt:1; /* TX ring buffer empty */
  47. uint8_t rx_full:1; /* RX ring buffer full */
  48. uint8_t rx_high:1; /* RX high-water exceeded */
  49. uint8_t rx_timer:1; /* RX timer has triggered */
  50. uint8_t delta_dcd:1; /* DELTA_DCD seen */
  51. uint8_t delta_cts:1; /* DELTA_CTS seen */
  52. uint8_t intr_pass:1; /* Interrupt pass-through */
  53. uint8_t tx_explicit:1; /* TX, MCW, or delay complete */
  54. } fields[4];
  55. } sio_ir; /* Serial interrupt state */
  56. union ioc4_other_int {
  57. uint32_t raw;
  58. struct {
  59. uint32_t ata_int:1; /* ATA port passthru */
  60. uint32_t ata_memerr:1; /* ATA halted by mem error */
  61. uint32_t memerr:4; /* Serial halted by mem err */
  62. uint32_t kbd_int:1; /* kbd/mouse intr asserted */
  63. uint32_t reserved:16; /* zero */
  64. uint32_t rt_int:1; /* INT_OUT section latch */
  65. uint32_t gen_int:8; /* Intr. from generic pins */
  66. } fields;
  67. } other_ir; /* Other interrupt state */
  68. union ioc4_sio_int sio_ies; /* Serial interrupt enable set */
  69. union ioc4_other_int other_ies; /* Other interrupt enable set */
  70. union ioc4_sio_int sio_iec; /* Serial interrupt enable clear */
  71. union ioc4_other_int other_iec; /* Other interrupt enable clear */
  72. union ioc4_sio_cr {
  73. uint32_t raw;
  74. struct {
  75. uint32_t cmd_pulse:4; /* Bytebus strobe width */
  76. uint32_t arb_diag:3; /* PCI bus requester */
  77. uint32_t sio_diag_idle:1; /* Active ser req? */
  78. uint32_t ata_diag_idle:1; /* Active ATA req? */
  79. uint32_t ata_diag_active:1; /* ATA req is winner */
  80. uint32_t reserved:22; /* zero */
  81. } fields;
  82. } sio_cr;
  83. uint32_t unused1;
  84. union ioc4_int_out {
  85. uint32_t raw;
  86. struct {
  87. uint32_t count:16; /* Period control */
  88. uint32_t mode:3; /* Output signal shape */
  89. uint32_t reserved:11; /* zero */
  90. uint32_t diag:1; /* Timebase control */
  91. uint32_t int_out:1; /* Current value */
  92. } fields;
  93. } int_out; /* External interrupt output control */
  94. uint32_t unused2;
  95. union ioc4_gpcr {
  96. uint32_t raw;
  97. struct {
  98. uint32_t dir:8; /* Pin direction */
  99. uint32_t edge:8; /* Edge/level mode */
  100. uint32_t reserved1:4; /* zero */
  101. uint32_t int_out_en:1; /* INT_OUT enable */
  102. uint32_t reserved2:11; /* zero */
  103. } fields;
  104. } gpcr_s; /* Generic PIO control set */
  105. union ioc4_gpcr gpcr_c; /* Generic PIO control clear */
  106. union ioc4_gpdr {
  107. uint32_t raw;
  108. struct {
  109. uint32_t gen_pin:8; /* State of pins */
  110. uint32_t reserved:24;
  111. } fields;
  112. } gpdr; /* Generic PIO data */
  113. uint32_t unused3;
  114. union ioc4_gppr {
  115. uint32_t raw;
  116. struct {
  117. uint32_t gen_pin:1; /* Single pin state */
  118. uint32_t reserved:31;
  119. } fields;
  120. } gppr[8]; /* Generic PIO pins */
  121. };
  122. /* Masks for GPCR DIR pins */
  123. #define IOC4_GPCR_DIR_0 0x01 /* External interrupt output */
  124. #define IOC4_GPCR_DIR_1 0x02 /* External interrupt input */
  125. #define IOC4_GPCR_DIR_2 0x04
  126. #define IOC4_GPCR_DIR_3 0x08 /* Keyboard/mouse presence */
  127. #define IOC4_GPCR_DIR_4 0x10 /* Ser. port 0 xcvr select (0=232, 1=422) */
  128. #define IOC4_GPCR_DIR_5 0x20 /* Ser. port 1 xcvr select (0=232, 1=422) */
  129. #define IOC4_GPCR_DIR_6 0x40 /* Ser. port 2 xcvr select (0=232, 1=422) */
  130. #define IOC4_GPCR_DIR_7 0x80 /* Ser. port 3 xcvr select (0=232, 1=422) */
  131. /* Masks for GPCR EDGE pins */
  132. #define IOC4_GPCR_EDGE_0 0x01
  133. #define IOC4_GPCR_EDGE_1 0x02 /* External interrupt input */
  134. #define IOC4_GPCR_EDGE_2 0x04
  135. #define IOC4_GPCR_EDGE_3 0x08
  136. #define IOC4_GPCR_EDGE_4 0x10
  137. #define IOC4_GPCR_EDGE_5 0x20
  138. #define IOC4_GPCR_EDGE_6 0x40
  139. #define IOC4_GPCR_EDGE_7 0x80
  140. #define IOC4_VARIANT_IO9 0x0900
  141. #define IOC4_VARIANT_PCI_RT 0x0901
  142. #define IOC4_VARIANT_IO10 0x1000
  143. /* One of these per IOC4 */
  144. struct ioc4_driver_data {
  145. struct list_head idd_list;
  146. unsigned long idd_bar0;
  147. struct pci_dev *idd_pdev;
  148. const struct pci_device_id *idd_pci_id;
  149. struct ioc4_misc_regs __iomem *idd_misc_regs;
  150. unsigned long count_period;
  151. void *idd_serial_data;
  152. unsigned int idd_variant;
  153. };
  154. /* One per submodule */
  155. struct ioc4_submodule {
  156. struct list_head is_list;
  157. char *is_name;
  158. struct module *is_owner;
  159. int (*is_probe) (struct ioc4_driver_data *);
  160. int (*is_remove) (struct ioc4_driver_data *);
  161. };
  162. #define IOC4_NUM_CARDS 8 /* max cards per partition */
  163. /**********************************
  164. * Functions needed by submodules *
  165. **********************************/
  166. extern int ioc4_register_submodule(struct ioc4_submodule *);
  167. extern void ioc4_unregister_submodule(struct ioc4_submodule *);
  168. #endif /* _LINUX_IOC4_H */