s3c2416.c 5.0 KB

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  1. /* linux/arch/arm/mach-s3c2416/s3c2416.c
  2. *
  3. * Copyright (c) 2007 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. * Ryu Euiyoul <ryu.real@gmail.com>
  6. *
  7. * Samsung S3C2416 Mobile CPU support
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/serial_core.h>
  21. #include <linux/sysdev.h>
  22. #include <linux/clk.h>
  23. #include <asm/mach/arch.h>
  24. #include <asm/mach/map.h>
  25. #include <asm/mach/irq.h>
  26. #include <asm/hardware.h>
  27. #include <asm/io.h>
  28. #include <asm/irq.h>
  29. #include <asm/proc-fns.h>
  30. #include <asm/arch/idle.h>
  31. #include <asm/arch/regs-s3c2416-clock.h>
  32. #include <asm/arch/reset.h>
  33. #include <asm/plat-s3c24xx/s3c2416.h>
  34. #include <asm/plat-s3c24xx/devs.h>
  35. #include <asm/plat-s3c24xx/cpu.h>
  36. #include <asm/arch/regs-gpio.h>
  37. #undef DVS_IDLE
  38. static struct map_desc s3c2416_iodesc[] __initdata = {
  39. IODESC_ENT(WATCHDOG),
  40. IODESC_ENT(CLKPWR),
  41. IODESC_ENT(TIMER),
  42. IODESC_ENT(LCD),
  43. IODESC_ENT(USBDEV),
  44. IODESC_ENT(CAMIF),
  45. IODESC_ENT(EBI),
  46. IODESC_ENT(SROMC),
  47. };
  48. struct sysdev_class s3c2416_sysclass = {
  49. set_kset_name("s3c2416-core"),
  50. };
  51. static struct sys_device s3c2416_sysdev = {
  52. .cls = &s3c2416_sysclass,
  53. };
  54. static void s3c2416_hard_reset(void)
  55. {
  56. __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
  57. }
  58. int __init s3c2416_init(void)
  59. {
  60. printk("S3C2416: Initialising architecture\n");
  61. s3c24xx_reset_hook = s3c2416_hard_reset;
  62. s3c_device_nand.name = "s3c2412-nand";
  63. // For S3C nand
  64. s3c_device_nand.name = "s3c-nand";
  65. return sysdev_register(&s3c2416_sysdev);
  66. }
  67. #define IDLE_PROBE
  68. static void s3c2416_idle(void)
  69. {
  70. unsigned long tmp;
  71. /* ensure our idle mode is to go to idle */
  72. /*if you want to reduce CPU clock with idle */
  73. #ifdef DVS_IDLE
  74. /*tmp = __raw_readl(S3C2443_CLKDIV0);
  75. tmp &= ~(0x1<<13);
  76. tmp |= (0x1<<13);
  77. __raw_writel(tmp, S3C2443_CLKDIV0);*/
  78. #else
  79. /* Qisda, ShiYong Lin, 2009/10/27, Modify for exception in s3c_idle function {*/
  80. // tmp = __raw_readl(S3C2443_PWRMODE);
  81. // tmp &= ~(0x1<<17);
  82. // tmp |= (0x1<<17);
  83. // __raw_writel(tmp, S3C2443_PWRMODE);
  84. /* } Qisda, ShiYong Lin, 2009/10/27, Modify for exception in s3c_idle function */
  85. #endif
  86. /* in SMDK2416 you can probe the idle status through the TP11(GPB2) by Laputa*/
  87. #ifdef IDLE_PROBE
  88. /* Qisda, ShiYong Lin, 2009/10/27, Modify for exception in s3c_idle function {*/
  89. //tmp = __raw_readl(S3C2410_GPBDAT);
  90. //tmp |= (0x1<<2);
  91. //__raw_writel(tmp, S3C2410_GPBDAT);
  92. //tmp &= ~(0x1<<2);
  93. //__raw_writel(tmp, S3C2410_GPBDAT);
  94. /* } Qisda, ShiYong Lin, 2009/10/27, Modify for exception in s3c_idle function */
  95. #endif
  96. cpu_do_idle();
  97. }
  98. void __init s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no)
  99. {
  100. s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
  101. #if defined (CONFIG_S3C_SIR)
  102. s3c24xx_uart_src[2]->name = "s3c-irda";
  103. #endif
  104. /* rename devices that are s3c2413/s3c2443/s3c6400 specific */
  105. s3c_device_lcd.name = "s3c-lcd";
  106. }
  107. /* s3c2443_map_io
  108. *
  109. * register the standard cpu IO areas, and any passed in from the
  110. * machine specific initialisation.
  111. */
  112. void __init s3c2416_map_io(struct map_desc *mach_desc, int mach_size)
  113. {
  114. iotable_init(s3c2416_iodesc, ARRAY_SIZE(s3c2416_iodesc));
  115. iotable_init(mach_desc, mach_size);
  116. s3c24xx_idle = s3c2416_idle;
  117. }
  118. /* need to register class before we actually register the device, and
  119. * we also need to ensure that it has been initialised before any of the
  120. * drivers even try to use it (even if not on an s3c2443 based system)
  121. * as a driver which may support both 2443 and 2440 may try and use it.
  122. */
  123. static int __init s3c2416_core_init(void)
  124. {
  125. return sysdev_class_register(&s3c2416_sysclass);
  126. }
  127. core_initcall(s3c2416_core_init);
  128. #define CAMDIV_val 26
  129. int s3c_camif_set_clock (unsigned int camclk)
  130. {
  131. unsigned int camclk_div, val, hclkcon;
  132. struct clk *src_clk = clk_get(NULL, "hclk");
  133. if (camclk == 4800000) {
  134. printk(KERN_INFO "External camera clock is set to 48MHz\n");
  135. }
  136. else if (camclk > 48000000) {
  137. printk(KERN_ERR "Invalid camera clock\n");
  138. }
  139. writel(readl(S3C2443_CLKSRC) | (1 << 20), S3C2443_CLKSRC);
  140. camclk_div = clk_get_rate(src_clk) / camclk;
  141. printk("Parent clock = %ld, CAMDIV = %d\n", clk_get_rate(src_clk), camclk_div);
  142. // CAMIF HCLK Enable
  143. hclkcon = __raw_readl(S3C2443_HCLKCON);
  144. hclkcon |= S3C2443_HCLKCON_CAMIF;
  145. __raw_writel(hclkcon, S3C2443_HCLKCON);
  146. /* CAMCLK Enable */
  147. val = readl(S3C2443_SCLKCON);
  148. val |= S3C2443_SCLKCON_CAMCLK;
  149. writel(val, S3C2443_SCLKCON);
  150. val = readl(S3C2443_CLKDIV1);
  151. val &= ~(0xf<<CAMDIV_val);
  152. writel(val, S3C2443_CLKDIV1);
  153. val |= ((camclk_div -1) << CAMDIV_val);
  154. writel(val, S3C2443_CLKDIV1);
  155. val = readl(S3C2443_CLKDIV1);
  156. return 0;
  157. }
  158. void s3c_camif_disable_clock (void)
  159. {
  160. unsigned int val;
  161. val = readl(S3C2443_SCLKCON);
  162. val &= ~S3C2443_SCLKCON_CAMCLK;
  163. writel(val, S3C2443_SCLKCON);
  164. }