015-fix-2nd-usb-ctrler-on-sun47i.patch 2.7 KB

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  1. From 948603d4d637a0e04a3214253b911cfc4ed11220 Mon Sep 17 00:00:00 2001
  2. From: Hans de Goede <hdegoede@redhat.com>
  3. Date: Mon, 21 Mar 2016 14:44:35 +0100
  4. Subject: [PATCH] sunxi: Fix 2nd usb controller on sun4i/sun7i no longer
  5. working
  6. The 2nd usb controller on sun4i/sun7i has its base address 0x8000
  7. bytes from the 1st one, rather then 0x1000. Also the ahb clk gates
  8. are interleaved with the ohci clk-gates introducing a hole between
  9. the clks for usb1 and usb2.
  10. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
  11. Acked-by: Ian Campbell <ijc@hellion.org.uk>
  12. ---
  13. drivers/usb/host/ehci-sunxi.c | 13 +++++++++++--
  14. drivers/usb/host/ohci-sunxi.c | 15 ++++++++++++---
  15. 2 files changed, 23 insertions(+), 5 deletions(-)
  16. --- a/drivers/usb/host/ehci-sunxi.c
  17. +++ b/drivers/usb/host/ehci-sunxi.c
  18. @@ -17,6 +17,14 @@
  19. #include <dm.h>
  20. #include "ehci.h"
  21. +#ifdef CONFIG_SUNXI_GEN_SUN4I
  22. +#define BASE_DIST 0x8000
  23. +#define AHB_CLK_DIST 2
  24. +#else
  25. +#define BASE_DIST 0x1000
  26. +#define AHB_CLK_DIST 1
  27. +#endif
  28. +
  29. struct ehci_sunxi_priv {
  30. struct ehci_ctrl ehci;
  31. int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
  32. @@ -39,8 +47,9 @@ static int ehci_usb_probe(struct udevice
  33. #ifdef CONFIG_MACH_SUN8I_H3
  34. priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_OHCI0;
  35. #endif
  36. - priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / 0x1000 + 1;
  37. - priv->ahb_gate_mask <<= priv->phy_index - 1;
  38. + priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / BASE_DIST;
  39. + priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
  40. + priv->phy_index++; /* Non otg phys start at 1 */
  41. setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
  42. #ifdef CONFIG_SUNXI_GEN_SUN6I
  43. --- a/drivers/usb/host/ohci-sunxi.c
  44. +++ b/drivers/usb/host/ohci-sunxi.c
  45. @@ -17,6 +17,14 @@
  46. #include <usb.h>
  47. #include "ohci.h"
  48. +#ifdef CONFIG_SUNXI_GEN_SUN4I
  49. +#define BASE_DIST 0x8000
  50. +#define AHB_CLK_DIST 2
  51. +#else
  52. +#define BASE_DIST 0x1000
  53. +#define AHB_CLK_DIST 1
  54. +#endif
  55. +
  56. struct ohci_sunxi_priv {
  57. ohci_t ohci;
  58. int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
  59. @@ -42,9 +50,10 @@ static int ohci_usb_probe(struct udevice
  60. priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_EHCI0;
  61. #endif
  62. priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
  63. - priv->phy_index = ((u32)regs - (SUNXI_USB1_BASE + 0x400)) / 0x1000 + 1;
  64. - priv->ahb_gate_mask <<= priv->phy_index - 1;
  65. - priv->usb_gate_mask <<= priv->phy_index - 1;
  66. + priv->phy_index = ((u32)regs - (SUNXI_USB1_BASE + 0x400)) / BASE_DIST;
  67. + priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
  68. + priv->usb_gate_mask <<= priv->phy_index;
  69. + priv->phy_index++; /* Non otg phys start at 1 */
  70. setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
  71. setbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask);