200-icplus-phy.patch 4.1 KB

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  1. From e719404ee1241af679a51879eaad291bc27e4817 Mon Sep 17 00:00:00 2001
  2. From: Daniel Golle <daniel@makrotopia.org>
  3. Date: Tue, 2 Dec 2014 14:46:05 +0100
  4. Subject: [PATCH] net/phy: add back icplus driver
  5. IC+ phy driver was removed due to the lack of users some time ago.
  6. Add it back, so we can use it.
  7. ---
  8. drivers/net/phy/Makefile | 1 +
  9. drivers/net/phy/icplus.c | 80 ++++++++++++++++++++++++++++++++++++++++++++++++
  10. drivers/net/phy/phy.c | 3 ++
  11. 3 files changed, 84 insertions(+)
  12. create mode 100644 drivers/net/phy/icplus.c
  13. --- a/drivers/net/phy/Makefile
  14. +++ b/drivers/net/phy/Makefile
  15. @@ -15,6 +15,7 @@ obj-$(CONFIG_PHY_ATHEROS) += atheros.o
  16. obj-$(CONFIG_PHY_BROADCOM) += broadcom.o
  17. obj-$(CONFIG_PHY_DAVICOM) += davicom.o
  18. obj-$(CONFIG_PHY_ET1011C) += et1011c.o
  19. +obj-$(CONFIG_PHY_ICPLUS) += icplus.o
  20. obj-$(CONFIG_PHY_LXT) += lxt.o
  21. obj-$(CONFIG_PHY_MARVELL) += marvell.o
  22. obj-$(CONFIG_PHY_MICREL) += micrel.o
  23. --- /dev/null
  24. +++ b/drivers/net/phy/icplus.c
  25. @@ -0,0 +1,93 @@
  26. +/*
  27. + * ICPlus PHY drivers
  28. + *
  29. + * SPDX-License-Identifier: GPL-2.0+
  30. + *
  31. + * Copyright (c) 2007 Freescale Semiconductor, Inc.
  32. + */
  33. +#include <phy.h>
  34. +
  35. +/* IP101A/G - IP1001 */
  36. +#define IP10XX_SPEC_CTRL_STATUS 16 /* Spec. Control Register */
  37. +#define IP1001_SPEC_CTRL_STATUS_2 20 /* IP1001 Spec. Control Reg 2 */
  38. +#define IP1001_PHASE_SEL_MASK 3 /* IP1001 RX/TXPHASE_SEL */
  39. +#define IP1001_APS_ON 11 /* IP1001 APS Mode bit */
  40. +#define IP101A_G_APS_ON 2 /* IP101A/G APS Mode bit */
  41. +#define IP101A_G_IRQ_CONF_STATUS 0x11 /* Conf Info IRQ & Status Reg */
  42. +#define IP101A_G_IRQ_PIN_USED (1<<15) /* INTR pin used */
  43. +#define IP101A_G_IRQ_DEFAULT IP101A_G_IRQ_PIN_USED
  44. +#define IP1001LF_DRIVE_MASK (15 << 5)
  45. +#define IP1001LF_RXCLKDRIVE_HI (2 << 5)
  46. +#define IP1001LF_RXDDRIVE_HI (2 << 7)
  47. +#define IP1001LF_RXCLKDRIVE_M (1 << 5)
  48. +#define IP1001LF_RXDDRIVE_M (1 << 7)
  49. +#define IP1001LF_RXCLKDRIVE_L (0 << 5)
  50. +#define IP1001LF_RXDDRIVE_L (0 << 7)
  51. +#define IP1001LF_RXCLKDRIVE_VL (3 << 5)
  52. +#define IP1001LF_RXDDRIVE_VL (3 << 7)
  53. +
  54. +static int ip1001_config(struct phy_device *phydev)
  55. +{
  56. + int c;
  57. +
  58. + /* Enable Auto Power Saving mode */
  59. + c = phy_read(phydev, MDIO_DEVAD_NONE, IP1001_SPEC_CTRL_STATUS_2);
  60. + if (c < 0)
  61. + return c;
  62. + c |= IP1001_APS_ON;
  63. + c = phy_write(phydev, MDIO_DEVAD_NONE, IP1001_SPEC_CTRL_STATUS_2, c);
  64. + if (c < 0)
  65. + return c;
  66. +
  67. + /* INTR pin used: speed/link/duplex will cause an interrupt */
  68. + c = phy_write(phydev, MDIO_DEVAD_NONE, IP101A_G_IRQ_CONF_STATUS,
  69. + IP101A_G_IRQ_DEFAULT);
  70. + if (c < 0)
  71. + return c;
  72. +
  73. + if (phydev->interface == PHY_INTERFACE_MODE_RGMII) {
  74. + /*
  75. + * Additional delay (2ns) used to adjust RX clock phase
  76. + * at RGMII interface
  77. + */
  78. + c = phy_read(phydev, MDIO_DEVAD_NONE, IP10XX_SPEC_CTRL_STATUS);
  79. + if (c < 0)
  80. + return c;
  81. +
  82. + c |= IP1001_PHASE_SEL_MASK;
  83. + /* adjust digtial drive strength */
  84. + c &= ~IP1001LF_DRIVE_MASK;
  85. + c |= IP1001LF_RXCLKDRIVE_M;
  86. + c |= IP1001LF_RXDDRIVE_M;
  87. + c = phy_write(phydev, MDIO_DEVAD_NONE, IP10XX_SPEC_CTRL_STATUS,
  88. + c);
  89. + if (c < 0)
  90. + return c;
  91. + }
  92. +
  93. + return 0;
  94. +}
  95. +
  96. +static int ip1001_startup(struct phy_device *phydev)
  97. +{
  98. + genphy_update_link(phydev);
  99. + genphy_parse_link(phydev);
  100. +
  101. + return 0;
  102. +}
  103. +static struct phy_driver IP1001_driver = {
  104. + .name = "ICPlus IP1001",
  105. + .uid = 0x02430d90,
  106. + .mask = 0x0ffffff0,
  107. + .features = PHY_GBIT_FEATURES,
  108. + .config = &ip1001_config,
  109. + .startup = &ip1001_startup,
  110. + .shutdown = &genphy_shutdown,
  111. +};
  112. +
  113. +int phy_icplus_init(void)
  114. +{
  115. + phy_register(&IP1001_driver);
  116. +
  117. + return 0;
  118. +}
  119. --- a/drivers/net/phy/phy.c
  120. +++ b/drivers/net/phy/phy.c
  121. @@ -454,6 +454,9 @@ int phy_init(void)
  122. #ifdef CONFIG_PHY_ET1011C
  123. phy_et1011c_init();
  124. #endif
  125. +#ifdef CONFIG_PHY_ICPLUS
  126. + phy_icplus_init();
  127. +#endif
  128. #ifdef CONFIG_PHY_LXT
  129. phy_lxt_init();
  130. #endif
  131. --- a/include/phy.h
  132. +++ b/include/phy.h
  133. @@ -225,6 +225,7 @@ int phy_atheros_init(void);
  134. int phy_broadcom_init(void);
  135. int phy_davicom_init(void);
  136. int phy_et1011c_init(void);
  137. +int phy_icplus_init(void);
  138. int phy_lxt_init(void);
  139. int phy_marvell_init(void);
  140. int phy_micrel_init(void);