eagle.rom.addr.v6.ld 14 KB

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  1. PROVIDE ( Cache_Read_Disable = 0x400047f0 );
  2. PROVIDE ( Cache_Read_Enable = 0x40004678 );
  3. PROVIDE ( FilePacketSendReqMsgProc = 0x400035a0 );
  4. PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x4000368c );
  5. PROVIDE ( FlashDwnLdStartMsgProc = 0x40003538 );
  6. PROVIDE ( FlashDwnLdStopReqMsgProc = 0x40003658 );
  7. PROVIDE ( GetUartDevice = 0x40003f4c );
  8. PROVIDE ( MD5Final = 0x40009900 );
  9. PROVIDE ( MD5Init = 0x40009818 );
  10. PROVIDE ( MD5Update = 0x40009834 );
  11. PROVIDE ( MemDwnLdStartMsgProc = 0x400036c4 );
  12. PROVIDE ( MemDwnLdStopReqMsgProc = 0x4000377c );
  13. PROVIDE ( MemPacketSendReqMsgProc = 0x400036f0 );
  14. PROVIDE ( RcvMsg = 0x40003eac );
  15. PROVIDE ( SHA1Final = 0x4000b648 );
  16. PROVIDE ( SHA1Init = 0x4000b584 );
  17. PROVIDE ( SHA1Transform = 0x4000a364 );
  18. PROVIDE ( SHA1Update = 0x4000b5a8 );
  19. PROVIDE ( SPI_read_status = 0x400043c8 );
  20. PROVIDE ( SPI_write_status = 0x40004400 );
  21. PROVIDE ( SPI_write_enable = 0x4000443c );
  22. PROVIDE ( Wait_SPI_Idle = 0x4000448c );
  23. PROVIDE ( SPIEraseArea = 0x40004b44 );
  24. PROVIDE ( SPIEraseBlock = 0x400049b4 );
  25. PROVIDE ( SPIEraseChip = 0x40004984 );
  26. PROVIDE ( SPIEraseSector = 0x40004a00 );
  27. PROVIDE ( SPILock = 0x400048a8 );
  28. PROVIDE ( SPIParamCfg = 0x40004c2c );
  29. PROVIDE ( SPIRead = 0x40004b1c );
  30. PROVIDE ( SPIReadModeCnfig = 0x400048ec );
  31. PROVIDE ( SPIUnlock = 0x40004878 );
  32. PROVIDE ( SPIWrite = 0x40004a4c );
  33. PROVIDE ( SelectSpiFunction = 0x40003f58 );
  34. PROVIDE ( SendMsg = 0x40003cf4 );
  35. PROVIDE ( UartConnCheck = 0x40003230 );
  36. PROVIDE ( UartConnectProc = 0x400037a0 );
  37. PROVIDE ( UartDwnLdProc = 0x40003368 );
  38. PROVIDE ( UartGetCmdLn = 0x40003ef4 );
  39. PROVIDE ( UartRegReadProc = 0x4000381c );
  40. PROVIDE ( UartRegWriteProc = 0x400037ac );
  41. PROVIDE ( UartRxString = 0x40003c30 );
  42. PROVIDE ( Uart_Init = 0x40003a14 );
  43. PROVIDE ( _DebugExceptionVector = 0x40000010 );
  44. PROVIDE ( _DoubleExceptionVector = 0x40000070 );
  45. PROVIDE ( _KernelExceptionVector = 0x40000030 );
  46. PROVIDE ( _NMIExceptionVector = 0x40000020 );
  47. PROVIDE ( _ResetHandler = 0x400000a4 );
  48. PROVIDE ( _ResetVector = 0x40000080 );
  49. PROVIDE ( _UserExceptionVector = 0x40000050 );
  50. PROVIDE ( __adddf3 = 0x4000c538 );
  51. PROVIDE ( __addsf3 = 0x4000c180 );
  52. PROVIDE ( __divdf3 = 0x4000cb94 );
  53. PROVIDE ( __divdi3 = 0x4000ce60 );
  54. PROVIDE ( __divsi3 = 0x4000dc88 );
  55. PROVIDE ( __extendsfdf2 = 0x4000cdfc );
  56. PROVIDE ( __fixdfsi = 0x4000ccb8 );
  57. PROVIDE ( __fixunsdfsi = 0x4000cd00 );
  58. PROVIDE ( __fixunssfsi = 0x4000c4c4 );
  59. PROVIDE ( __floatsidf = 0x4000e2f0 );
  60. PROVIDE ( __floatsisf = 0x4000e2ac );
  61. PROVIDE ( __floatunsidf = 0x4000e2e8 );
  62. PROVIDE ( __floatunsisf = 0x4000e2a4 );
  63. PROVIDE ( __muldf3 = 0x4000c8f0 );
  64. PROVIDE ( __muldi3 = 0x40000650 );
  65. PROVIDE ( __mulsf3 = 0x4000c3dc );
  66. PROVIDE ( __subdf3 = 0x4000c688 );
  67. PROVIDE ( __subsf3 = 0x4000c268 );
  68. PROVIDE ( __truncdfsf2 = 0x4000cd5c );
  69. PROVIDE ( __udivdi3 = 0x4000d310 );
  70. PROVIDE ( __udivsi3 = 0x4000e21c );
  71. PROVIDE ( __umoddi3 = 0x4000d770 );
  72. PROVIDE ( __umodsi3 = 0x4000e268 );
  73. PROVIDE ( __umulsidi3 = 0x4000dcf0 );
  74. PROVIDE ( _rom_store = 0x4000e388 );
  75. PROVIDE ( _rom_store_table = 0x4000e328 );
  76. PROVIDE ( _start = 0x4000042c );
  77. PROVIDE ( _xtos_alloca_handler = 0x4000dbe0 );
  78. PROVIDE ( _xtos_c_wrapper_handler = 0x40000598 );
  79. PROVIDE ( _xtos_cause3_handler = 0x40000590 );
  80. PROVIDE ( _xtos_ints_off = 0x4000bda4 );
  81. PROVIDE ( _xtos_ints_on = 0x4000bd84 );
  82. PROVIDE ( _xtos_l1int_handler = 0x4000048c );
  83. PROVIDE ( _xtos_p_none = 0x4000dbf8 );
  84. PROVIDE ( _xtos_restore_intlevel = 0x4000056c );
  85. PROVIDE ( _xtos_return_from_exc = 0x4000dc54 );
  86. PROVIDE ( _xtos_set_exception_handler = 0x40000454 );
  87. PROVIDE ( _xtos_set_interrupt_handler = 0x4000bd70 );
  88. PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4000bd28 );
  89. PROVIDE ( _xtos_set_intlevel = 0x4000dbfc );
  90. PROVIDE ( _xtos_set_min_intlevel = 0x4000dc18 );
  91. PROVIDE ( _xtos_set_vpri = 0x40000574 );
  92. PROVIDE ( _xtos_syscall_handler = 0x4000dbe4 );
  93. PROVIDE ( _xtos_unhandled_exception = 0x4000dc44 );
  94. PROVIDE ( _xtos_unhandled_interrupt = 0x4000dc3c );
  95. PROVIDE ( aes_decrypt = 0x400092d4 );
  96. PROVIDE ( aes_decrypt_deinit = 0x400092e4 );
  97. PROVIDE ( aes_decrypt_init = 0x40008ea4 );
  98. PROVIDE ( aes_unwrap = 0x40009410 );
  99. PROVIDE ( base64_decode = 0x40009648 );
  100. PROVIDE ( base64_encode = 0x400094fc );
  101. PROVIDE ( bzero = 0x4000de84 );
  102. PROVIDE ( cmd_parse = 0x40000814 );
  103. PROVIDE ( conv_str_decimal = 0x40000b24 );
  104. PROVIDE ( conv_str_hex = 0x40000cb8 );
  105. PROVIDE ( convert_para_str = 0x40000a60 );
  106. PROVIDE ( dtm_get_intr_mask = 0x400026d0 );
  107. PROVIDE ( dtm_params_init = 0x4000269c );
  108. PROVIDE ( dtm_set_intr_mask = 0x400026c8 );
  109. PROVIDE ( dtm_set_params = 0x400026dc );
  110. PROVIDE ( eprintf = 0x40001d14 );
  111. PROVIDE ( eprintf_init_buf = 0x40001cb8 );
  112. PROVIDE ( eprintf_to_host = 0x40001d48 );
  113. PROVIDE ( est_get_printf_buf_remain_len = 0x40002494 );
  114. PROVIDE ( est_reset_printf_buf_len = 0x4000249c );
  115. PROVIDE ( ets_bzero = 0x40002ae8 );
  116. PROVIDE ( ets_char2xdigit = 0x40002b74 );
  117. PROVIDE ( ets_delay_us = 0x40002ecc );
  118. PROVIDE ( ets_enter_sleep = 0x400027b8 );
  119. PROVIDE ( ets_external_printf = 0x40002578 );
  120. PROVIDE ( ets_get_cpu_frequency = 0x40002f0c );
  121. PROVIDE ( ets_getc = 0x40002bcc );
  122. PROVIDE ( ets_install_external_printf = 0x40002450 );
  123. PROVIDE ( ets_install_putc1 = 0x4000242c );
  124. PROVIDE ( ets_install_putc2 = 0x4000248c );
  125. PROVIDE ( ets_install_uart_printf = 0x40002438 );
  126. PROVIDE ( ets_intr_lock = 0x40000f74 );
  127. PROVIDE ( ets_intr_unlock = 0x40000f80 );
  128. PROVIDE ( ets_isr_attach = 0x40000f88 );
  129. PROVIDE ( ets_isr_mask = 0x40000f98 );
  130. PROVIDE ( ets_isr_unmask = 0x40000fa8 );
  131. PROVIDE ( ets_memcmp = 0x400018d4 );
  132. PROVIDE ( ets_memcpy = 0x400018b4 );
  133. PROVIDE ( ets_memmove = 0x400018c4 );
  134. PROVIDE ( ets_memset = 0x400018a4 );
  135. PROVIDE ( ets_post = 0x40000e24 );
  136. PROVIDE ( ets_printf = 0x400024cc );
  137. PROVIDE ( ets_putc = 0x40002be8 );
  138. PROVIDE ( ets_rtc_int_register = 0x40002a40 );
  139. PROVIDE ( ets_run = 0x40000e04 );
  140. PROVIDE ( ets_set_idle_cb = 0x40000dc0 );
  141. PROVIDE ( ets_set_user_start = 0x40000fbc );
  142. PROVIDE ( ets_str2macaddr = 0x40002af8 );
  143. PROVIDE ( ets_strcmp = 0x40002aa8 );
  144. PROVIDE ( ets_strcpy = 0x40002a88 );
  145. PROVIDE ( ets_strlen = 0x40002ac8 );
  146. PROVIDE ( ets_strncmp = 0x40002ab8 );
  147. PROVIDE ( ets_strncpy = 0x40002a98 );
  148. PROVIDE ( ets_strstr = 0x40002ad8 );
  149. PROVIDE ( ets_task = 0x40000dd0 );
  150. PROVIDE ( ets_timer_arm = 0x40002cc4 );
  151. PROVIDE ( ets_timer_disarm = 0x40002d40 );
  152. PROVIDE ( ets_timer_done = 0x40002d80 );
  153. PROVIDE ( ets_timer_handler_isr = 0x40002da8 );
  154. PROVIDE ( ets_timer_init = 0x40002e68 );
  155. PROVIDE ( ets_timer_setfn = 0x40002c48 );
  156. PROVIDE ( ets_uart_printf = 0x40002544 );
  157. PROVIDE ( ets_update_cpu_frequency = 0x40002f04 );
  158. PROVIDE ( ets_vprintf = 0x40001f00 );
  159. PROVIDE ( ets_wdt_disable = 0x400030f0 );
  160. PROVIDE ( ets_wdt_enable = 0x40002fa0 );
  161. PROVIDE ( ets_wdt_get_mode = 0x40002f34 );
  162. PROVIDE ( ets_wdt_init = 0x40003170 );
  163. PROVIDE ( ets_wdt_restore = 0x40003158 );
  164. PROVIDE ( ets_write_char = 0x40001da0 );
  165. PROVIDE ( get_first_seg = 0x4000091c );
  166. PROVIDE ( gpio_init = 0x40004c50 );
  167. PROVIDE ( gpio_input_get = 0x40004cf0 );
  168. PROVIDE ( gpio_intr_ack = 0x40004dcc );
  169. PROVIDE ( gpio_intr_handler_register = 0x40004e28 );
  170. PROVIDE ( gpio_intr_pending = 0x40004d88 );
  171. PROVIDE ( gpio_intr_test = 0x40004efc );
  172. PROVIDE ( gpio_output_set = 0x40004cd0 );
  173. PROVIDE ( gpio_pin_intr_state_set = 0x40004d90 );
  174. PROVIDE ( gpio_pin_wakeup_disable = 0x40004ed4 );
  175. PROVIDE ( gpio_pin_wakeup_enable = 0x40004e90 );
  176. PROVIDE ( gpio_register_get = 0x40004d5c );
  177. PROVIDE ( gpio_register_set = 0x40004d04 );
  178. PROVIDE ( hmac_md5 = 0x4000a2cc );
  179. PROVIDE ( hmac_md5_vector = 0x4000a160 );
  180. PROVIDE ( hmac_sha1 = 0x4000ba28 );
  181. PROVIDE ( hmac_sha1_vector = 0x4000b8b4 );
  182. PROVIDE ( lldesc_build_chain = 0x40004f40 );
  183. PROVIDE ( lldesc_num2link = 0x40005050 );
  184. PROVIDE ( lldesc_set_owner = 0x4000507c );
  185. PROVIDE ( main = 0x40000fec );
  186. PROVIDE ( md5_vector = 0x400097ac );
  187. PROVIDE ( mem_calloc = 0x40001c2c );
  188. PROVIDE ( mem_free = 0x400019e0 );
  189. PROVIDE ( mem_init = 0x40001998 );
  190. PROVIDE ( mem_malloc = 0x40001b40 );
  191. PROVIDE ( mem_realloc = 0x40001c6c );
  192. PROVIDE ( mem_trim = 0x40001a14 );
  193. PROVIDE ( mem_zalloc = 0x40001c58 );
  194. PROVIDE ( memcmp = 0x4000dea8 );
  195. PROVIDE ( memcpy = 0x4000df48 );
  196. PROVIDE ( memmove = 0x4000e04c );
  197. PROVIDE ( memset = 0x4000e190 );
  198. PROVIDE ( multofup = 0x400031c0 );
  199. PROVIDE ( pbkdf2_sha1 = 0x4000b840 );
  200. PROVIDE ( phy_get_romfuncs = 0x40006b08 );
  201. PROVIDE ( rand = 0x40000600 );
  202. PROVIDE ( rc4_skip = 0x4000dd68 );
  203. PROVIDE ( recv_packet = 0x40003d08 );
  204. PROVIDE ( remove_head_space = 0x40000a04 );
  205. PROVIDE ( rijndaelKeySetupDec = 0x40008dd0 );
  206. PROVIDE ( rijndaelKeySetupEnc = 0x40009300 );
  207. PROVIDE ( rom_abs_temp = 0x400060c0 );
  208. PROVIDE ( rom_ana_inf_gating_en = 0x40006b10 );
  209. PROVIDE ( rom_cal_tos_v50 = 0x40007a28 );
  210. PROVIDE ( rom_chip_50_set_channel = 0x40006f84 );
  211. PROVIDE ( rom_chip_v5_disable_cca = 0x400060d0 );
  212. PROVIDE ( rom_chip_v5_enable_cca = 0x400060ec );
  213. PROVIDE ( rom_chip_v5_rx_init = 0x4000711c );
  214. PROVIDE ( rom_chip_v5_sense_backoff = 0x4000610c );
  215. PROVIDE ( rom_chip_v5_tx_init = 0x4000718c );
  216. PROVIDE ( rom_dc_iq_est = 0x4000615c );
  217. PROVIDE ( rom_en_pwdet = 0x400061b8 );
  218. PROVIDE ( rom_get_bb_atten = 0x40006238 );
  219. PROVIDE ( rom_get_corr_power = 0x40006260 );
  220. PROVIDE ( rom_get_fm_sar_dout = 0x400062dc );
  221. PROVIDE ( rom_get_noisefloor = 0x40006394 );
  222. PROVIDE ( rom_get_power_db = 0x400063b0 );
  223. PROVIDE ( rom_i2c_readReg = 0x40007268 );
  224. PROVIDE ( rom_i2c_readReg_Mask = 0x4000729c );
  225. PROVIDE ( rom_i2c_writeReg = 0x400072d8 );
  226. PROVIDE ( rom_i2c_writeReg_Mask = 0x4000730c );
  227. PROVIDE ( rom_iq_est_disable = 0x40006400 );
  228. PROVIDE ( rom_iq_est_enable = 0x40006430 );
  229. PROVIDE ( rom_linear_to_db = 0x40006484 );
  230. PROVIDE ( rom_mhz2ieee = 0x400065a4 );
  231. PROVIDE ( rom_pbus_dco___SA2 = 0x40007bf0 );
  232. PROVIDE ( rom_pbus_debugmode = 0x4000737c );
  233. PROVIDE ( rom_pbus_enter_debugmode = 0x40007410 );
  234. PROVIDE ( rom_pbus_exit_debugmode = 0x40007448 );
  235. PROVIDE ( rom_pbus_force_test = 0x4000747c );
  236. PROVIDE ( rom_pbus_rd = 0x400074d8 );
  237. PROVIDE ( rom_pbus_set_rxgain = 0x4000754c );
  238. PROVIDE ( rom_pbus_set_txgain = 0x40007610 );
  239. PROVIDE ( rom_pbus_workmode = 0x40007648 );
  240. PROVIDE ( rom_pbus_xpd_rx_off = 0x40007688 );
  241. PROVIDE ( rom_pbus_xpd_rx_on = 0x400076cc );
  242. PROVIDE ( rom_pbus_xpd_tx_off = 0x400076fc );
  243. PROVIDE ( rom_pbus_xpd_tx_on = 0x40007740 );
  244. PROVIDE ( rom_pbus_xpd_tx_on__low_gain = 0x400077a0 );
  245. PROVIDE ( rom_phy_reset_req = 0x40007804 );
  246. PROVIDE ( rom_restart_cal = 0x4000781c );
  247. PROVIDE ( rom_rfcal_pwrctrl = 0x40007eb4 );
  248. PROVIDE ( rom_rfcal_rxiq = 0x4000804c );
  249. PROVIDE ( rom_rfcal_rxiq_set_reg = 0x40008264 );
  250. PROVIDE ( rom_rfcal_txcap = 0x40008388 );
  251. PROVIDE ( rom_rfcal_txiq = 0x40008610 );
  252. PROVIDE ( rom_rfcal_txiq_cover = 0x400088b8 );
  253. PROVIDE ( rom_rfcal_txiq_set_reg = 0x40008a70 );
  254. PROVIDE ( rom_rfpll_reset = 0x40007868 );
  255. PROVIDE ( rom_rfpll_set_freq = 0x40007968 );
  256. PROVIDE ( rom_rxiq_cover_mg_mp = 0x40008b6c );
  257. PROVIDE ( rom_rxiq_get_mis = 0x40006628 );
  258. PROVIDE ( rom_sar_init = 0x40006738 );
  259. PROVIDE ( rom_set_ana_inf_tx_scale = 0x4000678c );
  260. PROVIDE ( rom_set_channel_freq = 0x40006c50 );
  261. PROVIDE ( rom_set_loopback_gain = 0x400067c8 );
  262. PROVIDE ( rom_set_noise_floor = 0x40006830 );
  263. PROVIDE ( rom_set_rxclk_en = 0x40006550 );
  264. PROVIDE ( rom_set_txbb_atten = 0x40008c6c );
  265. PROVIDE ( rom_set_txclk_en = 0x4000650c );
  266. PROVIDE ( rom_set_txiq_cal = 0x40008d34 );
  267. PROVIDE ( rom_start_noisefloor = 0x40006874 );
  268. PROVIDE ( rom_start_tx_tone = 0x400068b4 );
  269. PROVIDE ( rom_stop_tx_tone = 0x4000698c );
  270. PROVIDE ( rom_tx_mac_disable = 0x40006a98 );
  271. PROVIDE ( rom_tx_mac_enable = 0x40006ad4 );
  272. PROVIDE ( rom_txtone_linear_pwr = 0x40006a1c );
  273. PROVIDE ( rom_write_rfpll_sdm = 0x400078dc );
  274. PROVIDE ( roundup2 = 0x400031b4 );
  275. PROVIDE ( rtc_enter_sleep = 0x40002870 );
  276. PROVIDE ( rtc_get_reset_reason = 0x400025e0 );
  277. PROVIDE ( rtc_intr_handler = 0x400029ec );
  278. PROVIDE ( rtc_set_sleep_mode = 0x40002668 );
  279. PROVIDE ( save_rxbcn_mactime = 0x400027a4 );
  280. PROVIDE ( save_tsf_us = 0x400027ac );
  281. PROVIDE ( send_packet = 0x40003c80 );
  282. PROVIDE ( sha1_prf = 0x4000ba48 );
  283. PROVIDE ( sha1_vector = 0x4000a2ec );
  284. PROVIDE ( sip_alloc_to_host_evt = 0x40005180 );
  285. PROVIDE ( sip_get_ptr = 0x400058a8 );
  286. PROVIDE ( sip_get_state = 0x40005668 );
  287. PROVIDE ( sip_init_attach = 0x4000567c );
  288. PROVIDE ( sip_install_rx_ctrl_cb = 0x4000544c );
  289. PROVIDE ( sip_install_rx_data_cb = 0x4000545c );
  290. PROVIDE ( sip_post = 0x400050fc );
  291. PROVIDE ( sip_post_init = 0x400056c4 );
  292. PROVIDE ( sip_reclaim_from_host_cmd = 0x4000534c );
  293. PROVIDE ( sip_reclaim_tx_data_pkt = 0x400052c0 );
  294. PROVIDE ( sip_send = 0x40005808 );
  295. PROVIDE ( sip_to_host_chain_append = 0x40005864 );
  296. PROVIDE ( sip_to_host_evt_send_done = 0x40005234 );
  297. PROVIDE ( slc_add_credits = 0x400060ac );
  298. PROVIDE ( slc_enable = 0x40005d90 );
  299. PROVIDE ( slc_from_host_chain_fetch = 0x40005f24 );
  300. PROVIDE ( slc_from_host_chain_recycle = 0x40005e94 );
  301. PROVIDE ( slc_init_attach = 0x40005c50 );
  302. PROVIDE ( slc_init_credit = 0x4000608c );
  303. PROVIDE ( slc_pause_from_host = 0x40006014 );
  304. PROVIDE ( slc_reattach = 0x40005c1c );
  305. PROVIDE ( slc_resume_from_host = 0x4000603c );
  306. PROVIDE ( slc_select_tohost_gpio = 0x40005dc0 );
  307. PROVIDE ( slc_select_tohost_gpio_mode = 0x40005db8 );
  308. PROVIDE ( slc_send_to_host_chain = 0x40005de4 );
  309. PROVIDE ( slc_set_host_io_max_window = 0x40006068 );
  310. PROVIDE ( slc_to_host_chain_recycle = 0x40005f10 );
  311. PROVIDE ( software_reset = 0x4000264c );
  312. PROVIDE ( spi_flash_attach = 0x40004644 );
  313. PROVIDE ( srand = 0x400005f0 );
  314. PROVIDE ( strcmp = 0x4000bdc8 );
  315. PROVIDE ( strcpy = 0x4000bec8 );
  316. PROVIDE ( strlen = 0x4000bf4c );
  317. PROVIDE ( strncmp = 0x4000bfa8 );
  318. PROVIDE ( strncpy = 0x4000c0a0 );
  319. PROVIDE ( strstr = 0x4000e1e0 );
  320. PROVIDE ( timer_insert = 0x40002c64 );
  321. PROVIDE ( uartAttach = 0x4000383c );
  322. PROVIDE ( uart_baudrate_detect = 0x40003924 );
  323. PROVIDE ( uart_buff_switch = 0x400038a4 );
  324. PROVIDE ( uart_div_modify = 0x400039d8 );
  325. PROVIDE ( uart_rx_intr_handler = 0x40003bbc );
  326. PROVIDE ( uart_rx_one_char = 0x40003b8c );
  327. PROVIDE ( uart_rx_one_char_block = 0x40003b64 );
  328. PROVIDE ( uart_rx_readbuff = 0x40003ec8 );
  329. PROVIDE ( uart_tx_one_char = 0x40003b30 );
  330. PROVIDE ( wepkey_128 = 0x4000bc40 );
  331. PROVIDE ( wepkey_64 = 0x4000bb3c );
  332. PROVIDE ( xthal_bcopy = 0x40000688 );
  333. PROVIDE ( xthal_copy123 = 0x4000074c );
  334. PROVIDE ( xthal_get_ccompare = 0x4000dd4c );
  335. PROVIDE ( xthal_get_ccount = 0x4000dd38 );
  336. PROVIDE ( xthal_get_interrupt = 0x4000dd58 );
  337. PROVIDE ( xthal_get_intread = 0x4000dd58 );
  338. PROVIDE ( xthal_memcpy = 0x400006c4 );
  339. PROVIDE ( xthal_set_ccompare = 0x4000dd40 );
  340. PROVIDE ( xthal_set_intclear = 0x4000dd60 );
  341. PROVIDE ( xthal_spill_registers_into_stack_nw = 0x4000e320 );
  342. PROVIDE ( xthal_window_spill = 0x4000e324 );
  343. PROVIDE ( xthal_window_spill_nw = 0x4000e320 );
  344. PROVIDE ( Te0 = 0x3fffccf0 );
  345. PROVIDE ( UartDev = 0x3fffde10 );
  346. PROVIDE ( flashchip = 0x3fffc714);