u8g_dev_lc7981_160x80.c 5.4 KB

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  1. /*
  2. u8g_dev_lc7981_160x80.c
  3. Universal 8bit Graphics Library
  4. Copyright (c) 2011, olikraus@gmail.com
  5. All rights reserved.
  6. Redistribution and use in source and binary forms, with or without modification,
  7. are permitted provided that the following conditions are met:
  8. * Redistributions of source code must retain the above copyright notice, this list
  9. of conditions and the following disclaimer.
  10. * Redistributions in binary form must reproduce the above copyright notice, this
  11. list of conditions and the following disclaimer in the documentation and/or other
  12. materials provided with the distribution.
  13. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
  14. CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
  15. INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  16. MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  17. DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
  18. CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  19. SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  21. LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  22. CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  23. STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  24. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  25. ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26. */
  27. #include "u8g.h"
  28. #define WIDTH 160
  29. #define HEIGHT 80
  30. #define PAGE_HEIGHT 8
  31. /*
  32. code ideas:
  33. https://github.com/vsergeev/embedded-drivers/tree/master/avr-lc7981
  34. data sheets:
  35. http://www.lcd-module.de/eng/pdf/zubehoer/lc7981.pdf
  36. http://www.lcd-module.de/pdf/grafik/w160-6.pdf
  37. */
  38. static const uint8_t u8g_dev_lc7981_160x80_init_seq[] PROGMEM = {
  39. U8G_ESC_CS(0), /* disable chip */
  40. U8G_ESC_ADR(1), /* instruction mode */
  41. U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
  42. U8G_ESC_CS(1), /* enable chip */
  43. U8G_ESC_DLY(50), /* delay 50 ms */
  44. U8G_ESC_ADR(1), /* instruction mode */
  45. 0x000, /* mode register */
  46. U8G_ESC_ADR(0), /* data mode */
  47. 0x032, /* display on (bit 5), master mode on (bit 4), graphics mode on (bit 1)*/
  48. U8G_ESC_ADR(1), /* instruction mode */
  49. 0x001, /* character/bits per pixel pitch */
  50. U8G_ESC_ADR(0), /* data mode */
  51. 0x007, /* 8 bits per pixel */
  52. U8G_ESC_ADR(1), /* instruction mode */
  53. 0x002, /* number of chars/byte width of the screen */
  54. U8G_ESC_ADR(0), /* data mode */
  55. WIDTH/8-1, /* 8 bits per pixel */
  56. U8G_ESC_ADR(1), /* instruction mode */
  57. 0x003, /* time division */
  58. U8G_ESC_ADR(0), /* data mode */
  59. 0x07f, /* */
  60. U8G_ESC_ADR(1), /* instruction mode */
  61. 0x008, /* display start low */
  62. U8G_ESC_ADR(0), /* data mode */
  63. 0x000, /* */
  64. U8G_ESC_ADR(1), /* instruction mode */
  65. 0x009, /* display start high */
  66. U8G_ESC_ADR(0), /* data mode */
  67. 0x000, /* */
  68. U8G_ESC_DLY(10), /* delay 10 ms */
  69. U8G_ESC_CS(0), /* disable chip */
  70. U8G_ESC_END /* end of sequence */
  71. };
  72. uint8_t u8g_dev_lc7981_160x80_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
  73. {
  74. switch(msg)
  75. {
  76. case U8G_DEV_MSG_INIT:
  77. u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_NONE);
  78. u8g_WriteEscSeqP(u8g, dev, u8g_dev_lc7981_160x80_init_seq);
  79. break;
  80. case U8G_DEV_MSG_STOP:
  81. break;
  82. case U8G_DEV_MSG_PAGE_NEXT:
  83. {
  84. uint8_t y, i;
  85. uint16_t disp_ram_adr;
  86. uint8_t *ptr;
  87. u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
  88. u8g_SetAddress(u8g, dev, 1); /* cmd mode */
  89. u8g_SetChipSelect(u8g, dev, 1);
  90. y = pb->p.page_y0;
  91. ptr = pb->buf;
  92. disp_ram_adr = WIDTH/8;
  93. disp_ram_adr *= y;
  94. for( i = 0; i < 8; i ++ )
  95. {
  96. u8g_SetAddress(u8g, dev, 1); /* cmd mode */
  97. u8g_WriteByte(u8g, dev, 0x00a ); /* display ram (cursor) address low byte */
  98. u8g_SetAddress(u8g, dev, 0); /* data mode */
  99. u8g_WriteByte(u8g, dev, disp_ram_adr & 0x0ff );
  100. u8g_SetAddress(u8g, dev, 1); /* cmd mode */
  101. u8g_WriteByte(u8g, dev, 0x00b ); /* display ram (cursor) address hight byte */
  102. u8g_SetAddress(u8g, dev, 0); /* data mode */
  103. u8g_WriteByte(u8g, dev, disp_ram_adr >> 8 );
  104. u8g_SetAddress(u8g, dev, 1); /* cmd mode */
  105. u8g_WriteByte(u8g, dev, 0x00c ); /* write data */
  106. u8g_SetAddress(u8g, dev, 0); /* data mode */
  107. u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
  108. ptr += WIDTH/8;
  109. disp_ram_adr += WIDTH/8;
  110. }
  111. u8g_SetChipSelect(u8g, dev, 0);
  112. }
  113. break;
  114. }
  115. return u8g_dev_pb8h1f_base_fn(u8g, dev, msg, arg);
  116. }
  117. U8G_PB_DEV(u8g_dev_lc7981_160x80_8bit, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_lc7981_160x80_fn, U8G_COM_FAST_PARALLEL);