uart_register.h 5.9 KB

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  1. //Generated at 2012-07-03 18:44:06
  2. /*
  3. * Copyright (c) 2010 - 2011 Espressif System
  4. *
  5. */
  6. #ifndef UART_REGISTER_H_INCLUDED
  7. #define UART_REGISTER_H_INCLUDED
  8. #define REG_UART_BASE( i ) (0x60000000+(i)*0xf00)
  9. //version value:32'h062000
  10. #define UART_FIFO( i ) (REG_UART_BASE( i ) + 0x0)
  11. #define UART_RXFIFO_RD_BYTE 0x000000FF
  12. #define UART_RXFIFO_RD_BYTE_S 0
  13. #define UART_INT_RAW( i ) (REG_UART_BASE( i ) + 0x4)
  14. #define UART_RXFIFO_TOUT_INT_RAW (BIT(8))
  15. #define UART_BRK_DET_INT_RAW (BIT(7))
  16. #define UART_CTS_CHG_INT_RAW (BIT(6))
  17. #define UART_DSR_CHG_INT_RAW (BIT(5))
  18. #define UART_RXFIFO_OVF_INT_RAW (BIT(4))
  19. #define UART_FRM_ERR_INT_RAW (BIT(3))
  20. #define UART_PARITY_ERR_INT_RAW (BIT(2))
  21. #define UART_TXFIFO_EMPTY_INT_RAW (BIT(1))
  22. #define UART_RXFIFO_FULL_INT_RAW (BIT(0))
  23. #define UART_INT_ST( i ) (REG_UART_BASE( i ) + 0x8)
  24. #define UART_RXFIFO_TOUT_INT_ST (BIT(8))
  25. #define UART_BRK_DET_INT_ST (BIT(7))
  26. #define UART_CTS_CHG_INT_ST (BIT(6))
  27. #define UART_DSR_CHG_INT_ST (BIT(5))
  28. #define UART_RXFIFO_OVF_INT_ST (BIT(4))
  29. #define UART_FRM_ERR_INT_ST (BIT(3))
  30. #define UART_PARITY_ERR_INT_ST (BIT(2))
  31. #define UART_TXFIFO_EMPTY_INT_ST (BIT(1))
  32. #define UART_RXFIFO_FULL_INT_ST (BIT(0))
  33. #define UART_INT_ENA( i ) (REG_UART_BASE( i ) + 0xC)
  34. #define UART_RXFIFO_TOUT_INT_ENA (BIT(8))
  35. #define UART_BRK_DET_INT_ENA (BIT(7))
  36. #define UART_CTS_CHG_INT_ENA (BIT(6))
  37. #define UART_DSR_CHG_INT_ENA (BIT(5))
  38. #define UART_RXFIFO_OVF_INT_ENA (BIT(4))
  39. #define UART_FRM_ERR_INT_ENA (BIT(3))
  40. #define UART_PARITY_ERR_INT_ENA (BIT(2))
  41. #define UART_TXFIFO_EMPTY_INT_ENA (BIT(1))
  42. #define UART_RXFIFO_FULL_INT_ENA (BIT(0))
  43. #define UART_INT_CLR( i ) (REG_UART_BASE( i ) + 0x10)
  44. #define UART_RXFIFO_TOUT_INT_CLR (BIT(8))
  45. #define UART_BRK_DET_INT_CLR (BIT(7))
  46. #define UART_CTS_CHG_INT_CLR (BIT(6))
  47. #define UART_DSR_CHG_INT_CLR (BIT(5))
  48. #define UART_RXFIFO_OVF_INT_CLR (BIT(4))
  49. #define UART_FRM_ERR_INT_CLR (BIT(3))
  50. #define UART_PARITY_ERR_INT_CLR (BIT(2))
  51. #define UART_TXFIFO_EMPTY_INT_CLR (BIT(1))
  52. #define UART_RXFIFO_FULL_INT_CLR (BIT(0))
  53. #define UART_CLKDIV( i ) (REG_UART_BASE( i ) + 0x14)
  54. #define UART_CLKDIV_CNT 0x000FFFFF
  55. #define UART_CLKDIV_S 0
  56. #define UART_AUTOBAUD( i ) (REG_UART_BASE( i ) + 0x18)
  57. #define UART_GLITCH_FILT 0x000000FF
  58. #define UART_GLITCH_FILT_S 8
  59. #define UART_AUTOBAUD_EN (BIT(0))
  60. #define UART_STATUS( i ) (REG_UART_BASE( i ) + 0x1C)
  61. #define UART_TXD (BIT(31))
  62. #define UART_RTSN (BIT(30))
  63. #define UART_DTRN (BIT(29))
  64. #define UART_TXFIFO_CNT 0x000000FF
  65. #define UART_TXFIFO_CNT_S 16
  66. #define UART_RXD (BIT(15))
  67. #define UART_CTSN (BIT(14))
  68. #define UART_DSRN (BIT(13))
  69. #define UART_RXFIFO_CNT 0x000000FF
  70. #define UART_RXFIFO_CNT_S 0
  71. #define UART_CONF0( i ) (REG_UART_BASE( i ) + 0x20)
  72. #define UART_DTR_INV (BIT(24))
  73. #define UART_RTS_INV (BIT(23))
  74. #define UART_TXD_INV (BIT(22))
  75. #define UART_DSR_INV (BIT(21))
  76. #define UART_CTS_INV (BIT(20))
  77. #define UART_RXD_INV (BIT(19))
  78. #define UART_TXFIFO_RST (BIT(18))
  79. #define UART_RXFIFO_RST (BIT(17))
  80. #define UART_IRDA_EN (BIT(16))
  81. #define UART_TX_FLOW_EN (BIT(15))
  82. #define UART_LOOPBACK (BIT(14))
  83. #define UART_IRDA_RX_INV (BIT(13))
  84. #define UART_IRDA_TX_INV (BIT(12))
  85. #define UART_IRDA_WCTL (BIT(11))
  86. #define UART_IRDA_TX_EN (BIT(10))
  87. #define UART_IRDA_DPLX (BIT(9))
  88. #define UART_TXD_BRK (BIT(8))
  89. #define UART_SW_DTR (BIT(7))
  90. #define UART_SW_RTS (BIT(6))
  91. #define UART_STOP_BIT_NUM 0x00000003
  92. #define UART_STOP_BIT_NUM_S 4
  93. #define UART_BIT_NUM 0x00000003
  94. #define UART_BIT_NUM_S 2
  95. #define UART_PARITY_EN (BIT(1))
  96. #define UART_PARITY_EN_M 0x00000001
  97. #define UART_PARITY_EN_S 1
  98. #define UART_PARITY (BIT(0))
  99. #define UART_PARITY_M 0x00000001
  100. #define UART_PARITY_S 0
  101. #define UART_CONF1( i ) (REG_UART_BASE( i ) + 0x24)
  102. #define UART_RX_TOUT_EN (BIT(31))
  103. #define UART_RX_TOUT_THRHD 0x0000007F
  104. #define UART_RX_TOUT_THRHD_S 24
  105. #define UART_RX_FLOW_EN (BIT(23))
  106. #define UART_RX_FLOW_THRHD 0x0000007F
  107. #define UART_RX_FLOW_THRHD_S 16
  108. #define UART_TXFIFO_EMPTY_THRHD 0x0000007F
  109. #define UART_TXFIFO_EMPTY_THRHD_S 8
  110. #define UART_RXFIFO_FULL_THRHD 0x0000007F
  111. #define UART_RXFIFO_FULL_THRHD_S 0
  112. #define UART_LOWPULSE( i ) (REG_UART_BASE( i ) + 0x28)
  113. #define UART_LOWPULSE_MIN_CNT 0x000FFFFF
  114. #define UART_LOWPULSE_MIN_CNT_S 0
  115. #define UART_HIGHPULSE( i ) (REG_UART_BASE( i ) + 0x2C)
  116. #define UART_HIGHPULSE_MIN_CNT 0x000FFFFF
  117. #define UART_HIGHPULSE_MIN_CNT_S 0
  118. #define UART_PULSE_NUM( i ) (REG_UART_BASE( i ) + 0x30)
  119. #define UART_PULSE_NUM_CNT 0x0003FF
  120. #define UART_PULSE_NUM_CNT_S 0
  121. #define UART_DATE( i ) (REG_UART_BASE( i ) + 0x78)
  122. #define UART_ID( i ) (REG_UART_BASE( i ) + 0x7C)
  123. #define ESP8266_DREG(addr) *((volatile uint32_t *)(0x3FF00000+(addr)))
  124. //IO SWAP Register
  125. #define IOSWAP ESP8266_DREG(0x28)
  126. #define IOSWAPU 0 //Swaps UART
  127. #define IOSWAPS 1 //Swaps SPI
  128. #define IOSWAPU0 2 //Swaps UART 0 pins (u0rxd <-> u0cts), (u0txd <-> u0rts)
  129. #define IOSWAPU1 3 //Swaps UART 1 pins (u1rxd <-> u1cts), (u1txd <-> u1rts)
  130. #define IOSWAPHS 5 //Sets HSPI with higher prio
  131. #define IOSWAP2HS 6 //Sets Two SPI Masters on HSPI
  132. #define IOSWAP2CS 7 //Sets Two SPI Masters on CSPI
  133. #endif // UART_REGISTER_H_INCLUDED