nodemcu32.ld 9.7 KB

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  1. /* boot.bin @ 0x00000 */
  2. /* drom0.bin @ 0xX4000 */
  3. /* irom0_flash.bin @ 0xX0000+0x40000 */
  4. /* Flash Map */
  5. /* |..|...............|...........................................|..| */
  6. /* ^ ^ ^ ^ */
  7. /* |_boot.bin(0x0000) |_irom0_flash.bin(0xX0000+0x40000) | */
  8. /* |_drom0.bin(0xX4000) |_system param area(Flash size - 0x4000) */
  9. /* RAM Map */
  10. /* Pro CPU iRAM, Total len 0x28000 */
  11. /* |......................................................| */
  12. /* ^ */
  13. /* |_iram1_0 : 0x40040000 (0x20000) */
  14. /* |........| */
  15. /* ^ */
  16. /* |_cache for Pro CPU : (0x8000) */
  17. /* Share Memory, Total len 0x28000 */
  18. /* |..........| */
  19. /* ^ */
  20. /* |_dram0_0 : 0x3FFD8000 (dynamic len) */
  21. /* |................................................| */
  22. /* ^ */
  23. /* |_ heap area */
  24. /* |.....| */
  25. /* ^ */
  26. /* |_ used for Pro CPU's rom code : 0x3FFFC000 (0x4000) */
  27. /* NOTICE: */
  28. /* 1. drom0.bin + irom0_flash.bin = user.ota */
  29. /* 2. drom0.bin and irom0_flash.bin must locate at 0xX4000 and 0xX0000+0x40000, */
  30. /* here 0xX0000 must 256KB align. */
  31. /* 3. Make sure each user.ota not overlap other. */
  32. /* 4. Make sure each user.ota not overlap system param area or user param area. */
  33. /* 5. We support a maximum of 5 user.ota */
  34. /* 6. We support 1MB/2MB/4MB/8MB/16MB flash, */
  35. /* but make suer user.ota not exceed 16MB. */
  36. /* 7. rodata at drom0_0, drom0.bin. */
  37. /* 8. Pay attention to any modification. */
  38. MEMORY
  39. {
  40. dport0_0_seg : org = 0x3FF00000, len = 0x10
  41. dram0_0_seg : org = 0x3FFD8000, len = 0x24000
  42. iram1_0_seg : org = 0x40040000, len = 0x20000
  43. irom0_0_seg : org = 0x40080010, len = 0x37FFF0
  44. drom0_0_seg : org = 0x3FE04010, len = 0x3BFF0
  45. }
  46. PHDRS
  47. {
  48. dport0_0_phdr PT_LOAD;
  49. dram0_0_phdr PT_LOAD;
  50. iram1_0_phdr PT_LOAD;
  51. irom0_0_phdr PT_LOAD;
  52. drom0_0_phdr PT_LOAD;
  53. }
  54. /* Default entry point: */
  55. ENTRY(call_user_start)
  56. EXTERN(_Level2Vector)
  57. EXTERN(_Level3Vector)
  58. EXTERN(_Level4Vector)
  59. EXTERN(_Level5Vector)
  60. EXTERN(_DebugExceptionVector)
  61. EXTERN(_NMIExceptionVector)
  62. EXTERN(_KernelExceptionVector)
  63. EXTERN(_DoubleExceptionVector)
  64. PROVIDE(_memmap_vecbase_reset = 0x40000000);
  65. /* Various memory-map dependent cache attribute settings: */
  66. _memmap_cacheattr_wb_base = 0x00000110;
  67. _memmap_cacheattr_wt_base = 0x00000110;
  68. _memmap_cacheattr_bp_base = 0x00000220;
  69. _memmap_cacheattr_unused_mask = 0xFFFFF00F;
  70. _memmap_cacheattr_wb_trapnull = 0x2222211F;
  71. _memmap_cacheattr_wba_trapnull = 0x2222211F;
  72. _memmap_cacheattr_wbna_trapnull = 0x2222211F;
  73. _memmap_cacheattr_wt_trapnull = 0x2222211F;
  74. _memmap_cacheattr_bp_trapnull = 0x2222222F;
  75. _memmap_cacheattr_wb_strict = 0xFFFFF11F;
  76. _memmap_cacheattr_wt_strict = 0xFFFFF11F;
  77. _memmap_cacheattr_bp_strict = 0xFFFFF22F;
  78. _memmap_cacheattr_wb_allvalid = 0x22222112;
  79. _memmap_cacheattr_wt_allvalid = 0x22222112;
  80. _memmap_cacheattr_bp_allvalid = 0x22222222;
  81. PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
  82. SECTIONS
  83. {
  84. .dport0.rodata : ALIGN(4)
  85. {
  86. _dport0_rodata_start = ABSOLUTE(.);
  87. *(.dport0.rodata)
  88. *(.dport.rodata)
  89. _dport0_rodata_end = ABSOLUTE(.);
  90. } >dport0_0_seg :dport0_0_phdr
  91. .dport0.literal : ALIGN(4)
  92. {
  93. _dport0_literal_start = ABSOLUTE(.);
  94. *(.dport0.literal)
  95. *(.dport.literal)
  96. _dport0_literal_end = ABSOLUTE(.);
  97. } >dport0_0_seg :dport0_0_phdr
  98. .dport0.data : ALIGN(4)
  99. {
  100. _dport0_data_start = ABSOLUTE(.);
  101. *(.dport0.data)
  102. *(.dport.data)
  103. _dport0_data_end = ABSOLUTE(.);
  104. } >dport0_0_seg :dport0_0_phdr
  105. .drom0.text : ALIGN(4)
  106. {
  107. _drom0_text_start = ABSOLUTE(.);
  108. *(.drom0.literal .drom0.text.literal .drom0.text)
  109. *(.rodata*)
  110. _drom0_text_end = ABSOLUTE(.);
  111. } >drom0_0_seg :drom0_0_phdr
  112. .data : ALIGN(4)
  113. {
  114. _data_start = ABSOLUTE(.);
  115. *(.data)
  116. *(.data.*)
  117. *(.gnu.linkonce.d.*)
  118. *(.data1)
  119. *(.sdata)
  120. *(.sdata.*)
  121. *(.gnu.linkonce.s.*)
  122. *(.sdata2)
  123. *(.sdata2.*)
  124. *(.gnu.linkonce.s2.*)
  125. *(.jcr)
  126. _data_end = ABSOLUTE(.);
  127. } >dram0_0_seg :dram0_0_phdr
  128. .rodata : ALIGN(4)
  129. {
  130. _rodata_start = ABSOLUTE(.);
  131. *(.gnu.linkonce.r.*)
  132. __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
  133. *(.xt_except_table)
  134. *(.gcc_except_table)
  135. *(.gnu.linkonce.e.*)
  136. *(.gnu.version_r)
  137. *(.eh_frame)
  138. . = (. + 3) & ~ 3;
  139. /* C++ constructor and destructor tables, properly ordered: */
  140. __init_array_start = ABSOLUTE(.);
  141. KEEP (*crtbegin.o(.ctors))
  142. KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
  143. KEEP (*(SORT(.ctors.*)))
  144. KEEP (*(.ctors))
  145. __init_array_end = ABSOLUTE(.);
  146. KEEP (*crtbegin.o(.dtors))
  147. KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
  148. KEEP (*(SORT(.dtors.*)))
  149. KEEP (*(.dtors))
  150. /* C++ exception handlers table: */
  151. __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
  152. *(.xt_except_desc)
  153. *(.gnu.linkonce.h.*)
  154. __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
  155. *(.xt_except_desc_end)
  156. *(.dynamic)
  157. *(.gnu.version_d)
  158. . = ALIGN(4); /* this table MUST be 4-byte aligned */
  159. _bss_table_start = ABSOLUTE(.);
  160. LONG(_bss_start)
  161. LONG(_bss_end)
  162. _bss_table_end = ABSOLUTE(.);
  163. _rodata_end = ABSOLUTE(.);
  164. } >dram0_0_seg :dram0_0_phdr
  165. .UserExceptionVector.literal : AT(LOADADDR(.rodata) + (ADDR(.UserExceptionVector.literal) - ADDR(.rodata))) ALIGN(4)
  166. {
  167. _UserExceptionVector_literal_start = ABSOLUTE(.);
  168. *(.UserExceptionVector.literal)
  169. _UserExceptionVector_literal_end = ABSOLUTE(.);
  170. } >dram0_0_seg :dram0_0_phdr
  171. .bss ALIGN(8) (NOLOAD) : ALIGN(4)
  172. {
  173. . = ALIGN (8);
  174. _bss_start = ABSOLUTE(.);
  175. *(.dynsbss)
  176. *(.sbss)
  177. *(.sbss.*)
  178. *(.gnu.linkonce.sb.*)
  179. *(.scommon)
  180. *(.sbss2)
  181. *(.sbss2.*)
  182. *(.gnu.linkonce.sb2.*)
  183. *(.dynbss)
  184. *(.bss)
  185. *(.bss.*)
  186. *(.gnu.linkonce.b.*)
  187. *(COMMON)
  188. . = ALIGN (8);
  189. _bss_end = ABSOLUTE(.);
  190. } >dram0_0_seg :dram0_0_phdr
  191. .share.mem (NOLOAD) : ALIGN(4)
  192. {
  193. _share_mem_start = ABSOLUTE(.);
  194. *(.share.mem)
  195. _share_mem_end = ABSOLUTE(.);
  196. _heap_sentry = ABSOLUTE(.);
  197. } >dram0_0_seg :dram0_0_phdr
  198. _end = 0x3fffc000;
  199. .text : ALIGN(4)
  200. {
  201. _stext = .;
  202. _text_start = ABSOLUTE(.);
  203. . = 0x0;
  204. *(.WindowVectors.text)
  205. . = 0x180;
  206. *(.Level2InterruptVector.text)
  207. . = 0x1c0;
  208. *(.Level3InterruptVector.text)
  209. . = 0x200;
  210. *(.Level4InterruptVector.text)
  211. . = 0x240;
  212. *(.Level5InterruptVector.text)
  213. . = 0x280;
  214. *(.DebugExceptionVector.text)
  215. . = 0x2c0;
  216. *(.NMIExceptionVector.text)
  217. . = 0x300;
  218. *(.KernelExceptionVector.text)
  219. . = 0x340;
  220. *(.UserExceptionVector.text)
  221. . = 0x3c0;
  222. *(.DoubleExceptionVector.text)
  223. . = 0x400;
  224. *(.UserEnter.literal);
  225. *(.UserEnter.text);
  226. . = ALIGN (16);
  227. *(.entry.text)
  228. *(.init.literal)
  229. *(.init)
  230. *(.iram1.*)
  231. *libmain.a:(.literal .text .literal.* .text.*)
  232. *libfreertos.a:(.literal .text .literal.* .text.*)
  233. *libpp.a:(.literal .text .literal.* .text.*)
  234. *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
  235. *(.fini.literal)
  236. *(.fini)
  237. *(.gnu.version)
  238. _text_end = ABSOLUTE(.);
  239. _etext = .;
  240. } >iram1_0_seg :iram1_0_phdr
  241. .irom0.text : ALIGN(4)
  242. {
  243. _irom0_text_start = ABSOLUTE(.);
  244. *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
  245. *(.literal .text .literal.* .text.*)
  246. /* Link-time arrays containing the defs for the included modules */
  247. . = ALIGN(4);
  248. lua_libs = ABSOLUTE(.);
  249. /* Allow either empty define or defined-to-1 to include the module */
  250. KEEP(*(.lua_libs))
  251. LONG(0) LONG(0) /* Null-terminate the array */
  252. lua_rotable = ABSOLUTE(.);
  253. KEEP(*(.lua_rotable))
  254. LONG(0) LONG(0) /* Null-terminate the array */
  255. _irom0_text_end = ABSOLUTE(.);
  256. /* Due to the way the gen_appbin.py script packs the bundle that goes into
  257. * flash, we don't have a convenient _flash_used_end symbol on the ESP32.
  258. * Instead we sum up the three sections we know goes into the
  259. * irom0_flash.bin, so we can use that as a starting point to scan for
  260. * the next free page. We could presumably be even more specific and
  261. * account for the block headers and trailing checksum. Maybe later.
  262. */
  263. _irom0_bin_min_sz = ABSOLUTE(
  264. _irom0_text_end - _irom0_text_start +
  265. _text_end - _text_start +
  266. _data_end - _data_start);
  267. } >irom0_0_seg :irom0_0_phdr
  268. .lit4 : ALIGN(4)
  269. {
  270. _lit4_start = ABSOLUTE(.);
  271. *(*.lit4)
  272. *(.lit4.*)
  273. *(.gnu.linkonce.lit4.*)
  274. _lit4_end = ABSOLUTE(.);
  275. } >iram1_0_seg :iram1_0_phdr
  276. }
  277. INCLUDE "pro.rom.addr.ld"