console.c 6.7 KB

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  1. /*
  2. * Copyright 2016 Dius Computing Pty Ltd. All rights reserved.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * - Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * - Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the
  13. * distribution.
  14. * - Neither the name of the copyright holders nor the names of
  15. * its contributors may be used to endorse or promote products derived
  16. * from this software without specific prior written permission.
  17. *
  18. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  19. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  20. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  21. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
  22. * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  23. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  25. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  27. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  29. * OF THE POSSIBILITY OF SUCH DAMAGE.
  30. *
  31. * @author Johny Mattsson <jmattsson@dius.com.au>
  32. */
  33. #include "driver/console.h"
  34. #include "esp_intr.h"
  35. #include "esp_intr_alloc.h"
  36. #include "soc/soc.h"
  37. #include "soc/uart_reg.h"
  38. #include "soc/dport_reg.h"
  39. #include "freertos/FreeRTOS.h"
  40. #include "freertos/queue.h"
  41. #include <unistd.h>
  42. #include "rom/libc_stubs.h"
  43. #include "sys/reent.h"
  44. #define UART_INPUT_QUEUE_SZ 0x100
  45. // These used to be available in soc/uart_register.h:
  46. #define UART_GET_RXFIFO_RD_BYTE(i) GET_PERI_REG_BITS2(UART_FIFO_REG(i) , UART_RXFIFO_RD_BYTE_V, UART_RXFIFO_RD_BYTE_S)
  47. #define UART_GET_RXFIFO_CNT(i) GET_PERI_REG_BITS2(UART_STATUS_REG(i) , UART_RXFIFO_CNT_V, UART_RXFIFO_CNT_S)
  48. #define UART_SET_AUTOBAUD_EN(i,val) SET_PERI_REG_BITS(UART_AUTOBAUD_REG(i) ,UART_AUTOBAUD_EN_V,(val),UART_AUTOBAUD_EN_S)
  49. # define UART_SET_PARITY_EN(i,val) SET_PERI_REG_BITS(UART_CONF0_REG(i) ,UART_PARITY_EN_V,(val),UART_PARITY_EN_S)
  50. #define UART_SET_RX_TOUT_EN(i,val) SET_PERI_REG_BITS(UART_CONF1_REG(i) ,UART_RX_TOUT_EN_V,(val),UART_RX_TOUT_EN_S)
  51. #define UART_SET_RX_TOUT_THRHD(i,val) SET_PERI_REG_BITS(UART_CONF1_REG(i) ,UART_RX_TOUT_THRHD_V,(val),UART_RX_TOUT_THRHD_S)
  52. #define UART_SET_RXFIFO_FULL_THRHD(i,val) SET_PERI_REG_BITS(UART_CONF1_REG(i) ,UART_RXFIFO_FULL_THRHD_V,(val),UART_RXFIFO_FULL_THRHD_S)
  53. #define UART_SET_STOP_BIT_NUM(i,val) SET_PERI_REG_BITS(UART_CONF0_REG(i) ,UART_STOP_BIT_NUM_V,(val),UART_STOP_BIT_NUM_S)
  54. #define UART_SET_BIT_NUM(i,val) SET_PERI_REG_BITS(UART_CONF0_REG(i) ,UART_BIT_NUM_V,(val),UART_BIT_NUM_S)
  55. #define UART_SET_PARITY_EN(i,val) SET_PERI_REG_BITS(UART_CONF0_REG(i) ,UART_PARITY_EN_V,(val),UART_PARITY_EN_S)
  56. #define UART_SET_PARITY(i,val) SET_PERI_REG_BITS(UART_CONF0_REG(i) ,UART_PARITY_V,(val),UART_PARITY_S)
  57. typedef int (*_read_r_fn) (struct _reent *r, int fd, void *buf, int size);
  58. static _read_r_fn _read_r_pro, _read_r_app;
  59. static xQueueHandle uart0Q;
  60. static task_handle_t input_task = 0;
  61. static intr_handle_t intr_handle;
  62. // --- Syscall support for reading from STDIN_FILENO ---------------
  63. static int console_read_r (struct _reent *r, int fd, void *buf, int size, _read_r_fn next)
  64. {
  65. if (fd == STDIN_FILENO)
  66. {
  67. static _lock_t stdin_lock;
  68. _lock_acquire_recursive (&stdin_lock);
  69. char *c = (char *)buf;
  70. int i = 0;
  71. for (; i < size; ++i)
  72. {
  73. if (!console_getc (c++))
  74. break;
  75. }
  76. _lock_release_recursive (&stdin_lock);
  77. return i;
  78. }
  79. else if (next)
  80. return next (r, fd, buf, size);
  81. else
  82. return -1;
  83. }
  84. static int console_read_r_pro (struct _reent *r, int fd, void *buf, int size)
  85. {
  86. return console_read_r (r, fd, buf, size, _read_r_pro);
  87. }
  88. static int console_read_r_app (struct _reent *r, int fd, void *buf, int size)
  89. {
  90. return console_read_r (r, fd, buf, size, _read_r_app);
  91. }
  92. // --- End syscall support -------------------------------------------
  93. static void uart0_rx_intr_handler (void *arg)
  94. {
  95. (void)arg;
  96. bool received = false;
  97. uint32_t status = READ_PERI_REG(UART_INT_ST_REG(CONSOLE_UART));
  98. while (status)
  99. {
  100. if (status & UART_FRM_ERR_INT_ENA)
  101. {
  102. // TODO: report somehow?
  103. WRITE_PERI_REG(UART_INT_CLR_REG(CONSOLE_UART), UART_FRM_ERR_INT_ENA);
  104. }
  105. if ((status & UART_RXFIFO_TOUT_INT_ENA) ||
  106. (status & UART_RXFIFO_FULL_INT_ENA))
  107. {
  108. uint32_t fifo_len = UART_GET_RXFIFO_CNT(CONSOLE_UART);
  109. for (uint32_t i = 0; i < fifo_len; ++i)
  110. {
  111. received = true;
  112. char c = UART_GET_RXFIFO_RD_BYTE(CONSOLE_UART);
  113. if (uart0Q)
  114. xQueueSendToBackFromISR (uart0Q, &c, NULL);
  115. }
  116. WRITE_PERI_REG(UART_INT_CLR_REG(CONSOLE_UART),
  117. UART_RXFIFO_TOUT_INT_ENA | UART_RXFIFO_FULL_INT_ENA);
  118. }
  119. status = READ_PERI_REG(UART_INT_ST_REG(CONSOLE_UART));
  120. }
  121. if (received && input_task)
  122. task_post_low (input_task, false);
  123. }
  124. void console_setup (const ConsoleSetup_t *cfg)
  125. {
  126. uart_tx_wait_idle (CONSOLE_UART);
  127. uart_div_modify (CONSOLE_UART, (UART_CLK_FREQ << 4) / cfg->bit_rate);
  128. UART_SET_BIT_NUM(CONSOLE_UART, cfg->data_bits);
  129. UART_SET_PARITY_EN(CONSOLE_UART, cfg->parity != CONSOLE_PARITY_NONE);
  130. UART_SET_PARITY(CONSOLE_UART, cfg->parity & 0x1);
  131. UART_SET_STOP_BIT_NUM(CONSOLE_UART, cfg->stop_bits);
  132. // TODO: Make this actually work
  133. UART_SET_AUTOBAUD_EN(CONSOLE_UART, cfg->auto_baud);
  134. }
  135. void console_init (const ConsoleSetup_t *cfg, task_handle_t tsk)
  136. {
  137. input_task = tsk;
  138. uart0Q = xQueueCreate (UART_INPUT_QUEUE_SZ, sizeof (char));
  139. console_setup (cfg);
  140. esp_intr_alloc (ETS_UART0_INTR_SOURCE + CONSOLE_UART,
  141. ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_INTRDISABLED,
  142. uart0_rx_intr_handler, NULL, &intr_handle);
  143. UART_SET_RX_TOUT_EN(CONSOLE_UART, true);
  144. UART_SET_RX_TOUT_THRHD(CONSOLE_UART, 2);
  145. UART_SET_RXFIFO_FULL_THRHD(CONSOLE_UART, 10);
  146. WRITE_PERI_REG(UART_INT_ENA_REG(CONSOLE_UART),
  147. UART_RXFIFO_TOUT_INT_ENA |
  148. UART_RXFIFO_FULL_INT_ENA |
  149. UART_FRM_ERR_INT_ENA);
  150. esp_intr_enable (intr_handle);
  151. // Register our console_read_r_xxx functions to support stdin input
  152. _read_r_pro = syscall_table_ptr_pro->_read_r;
  153. _read_r_app = syscall_table_ptr_app->_read_r;
  154. syscall_table_ptr_pro->_read_r = console_read_r_pro;
  155. syscall_table_ptr_app->_read_r = console_read_r_app;
  156. }
  157. bool console_getc (char *c)
  158. {
  159. return (uart0Q && (xQueueReceive (uart0Q, c, 0) == pdTRUE));
  160. }