aesni.c 18 KB

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  1. /*
  2. * AES-NI support functions
  3. *
  4. * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Licensed under the Apache License, Version 2.0 (the "License"); you may
  8. * not use this file except in compliance with the License.
  9. * You may obtain a copy of the License at
  10. *
  11. * http://www.apache.org/licenses/LICENSE-2.0
  12. *
  13. * Unless required by applicable law or agreed to in writing, software
  14. * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
  15. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  16. * See the License for the specific language governing permissions and
  17. * limitations under the License.
  18. *
  19. * This file is part of mbed TLS (https://tls.mbed.org)
  20. */
  21. /*
  22. * [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set
  23. * [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/
  24. */
  25. #if !defined(MBEDTLS_CONFIG_FILE)
  26. #include "mbedtls/config.h"
  27. #else
  28. #include MBEDTLS_CONFIG_FILE
  29. #endif
  30. #if defined(MBEDTLS_AESNI_C)
  31. #include "mbedtls/aesni.h"
  32. #include <string.h>
  33. #ifndef asm
  34. #define asm __asm
  35. #endif
  36. #if defined(MBEDTLS_HAVE_X86_64)
  37. /*
  38. * AES-NI support detection routine
  39. */
  40. int mbedtls_aesni_has_support( unsigned int what )
  41. {
  42. static int done = 0;
  43. static unsigned int c = 0;
  44. if( ! done )
  45. {
  46. asm( "movl $1, %%eax \n\t"
  47. "cpuid \n\t"
  48. : "=c" (c)
  49. :
  50. : "eax", "ebx", "edx" );
  51. done = 1;
  52. }
  53. return( ( c & what ) != 0 );
  54. }
  55. /*
  56. * Binutils needs to be at least 2.19 to support AES-NI instructions.
  57. * Unfortunately, a lot of users have a lower version now (2014-04).
  58. * Emit bytecode directly in order to support "old" version of gas.
  59. *
  60. * Opcodes from the Intel architecture reference manual, vol. 3.
  61. * We always use registers, so we don't need prefixes for memory operands.
  62. * Operand macros are in gas order (src, dst) as opposed to Intel order
  63. * (dst, src) in order to blend better into the surrounding assembly code.
  64. */
  65. #define AESDEC ".byte 0x66,0x0F,0x38,0xDE,"
  66. #define AESDECLAST ".byte 0x66,0x0F,0x38,0xDF,"
  67. #define AESENC ".byte 0x66,0x0F,0x38,0xDC,"
  68. #define AESENCLAST ".byte 0x66,0x0F,0x38,0xDD,"
  69. #define AESIMC ".byte 0x66,0x0F,0x38,0xDB,"
  70. #define AESKEYGENA ".byte 0x66,0x0F,0x3A,0xDF,"
  71. #define PCLMULQDQ ".byte 0x66,0x0F,0x3A,0x44,"
  72. #define xmm0_xmm0 "0xC0"
  73. #define xmm0_xmm1 "0xC8"
  74. #define xmm0_xmm2 "0xD0"
  75. #define xmm0_xmm3 "0xD8"
  76. #define xmm0_xmm4 "0xE0"
  77. #define xmm1_xmm0 "0xC1"
  78. #define xmm1_xmm2 "0xD1"
  79. /*
  80. * AES-NI AES-ECB block en(de)cryption
  81. */
  82. int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx,
  83. int mode,
  84. const unsigned char input[16],
  85. unsigned char output[16] )
  86. {
  87. asm( "movdqu (%3), %%xmm0 \n\t" // load input
  88. "movdqu (%1), %%xmm1 \n\t" // load round key 0
  89. "pxor %%xmm1, %%xmm0 \n\t" // round 0
  90. "add $16, %1 \n\t" // point to next round key
  91. "subl $1, %0 \n\t" // normal rounds = nr - 1
  92. "test %2, %2 \n\t" // mode?
  93. "jz 2f \n\t" // 0 = decrypt
  94. "1: \n\t" // encryption loop
  95. "movdqu (%1), %%xmm1 \n\t" // load round key
  96. AESENC xmm1_xmm0 "\n\t" // do round
  97. "add $16, %1 \n\t" // point to next round key
  98. "subl $1, %0 \n\t" // loop
  99. "jnz 1b \n\t"
  100. "movdqu (%1), %%xmm1 \n\t" // load round key
  101. AESENCLAST xmm1_xmm0 "\n\t" // last round
  102. "jmp 3f \n\t"
  103. "2: \n\t" // decryption loop
  104. "movdqu (%1), %%xmm1 \n\t"
  105. AESDEC xmm1_xmm0 "\n\t" // do round
  106. "add $16, %1 \n\t"
  107. "subl $1, %0 \n\t"
  108. "jnz 2b \n\t"
  109. "movdqu (%1), %%xmm1 \n\t" // load round key
  110. AESDECLAST xmm1_xmm0 "\n\t" // last round
  111. "3: \n\t"
  112. "movdqu %%xmm0, (%4) \n\t" // export output
  113. :
  114. : "r" (ctx->nr), "r" (ctx->rk), "r" (mode), "r" (input), "r" (output)
  115. : "memory", "cc", "xmm0", "xmm1" );
  116. return( 0 );
  117. }
  118. /*
  119. * GCM multiplication: c = a times b in GF(2^128)
  120. * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
  121. */
  122. void mbedtls_aesni_gcm_mult( unsigned char c[16],
  123. const unsigned char a[16],
  124. const unsigned char b[16] )
  125. {
  126. unsigned char aa[16], bb[16], cc[16];
  127. size_t i;
  128. /* The inputs are in big-endian order, so byte-reverse them */
  129. for( i = 0; i < 16; i++ )
  130. {
  131. aa[i] = a[15 - i];
  132. bb[i] = b[15 - i];
  133. }
  134. asm( "movdqu (%0), %%xmm0 \n\t" // a1:a0
  135. "movdqu (%1), %%xmm1 \n\t" // b1:b0
  136. /*
  137. * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
  138. * using [CLMUL-WP] algorithm 1 (p. 13).
  139. */
  140. "movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0
  141. "movdqa %%xmm1, %%xmm3 \n\t" // same
  142. "movdqa %%xmm1, %%xmm4 \n\t" // same
  143. PCLMULQDQ xmm0_xmm1 ",0x00 \n\t" // a0*b0 = c1:c0
  144. PCLMULQDQ xmm0_xmm2 ",0x11 \n\t" // a1*b1 = d1:d0
  145. PCLMULQDQ xmm0_xmm3 ",0x10 \n\t" // a0*b1 = e1:e0
  146. PCLMULQDQ xmm0_xmm4 ",0x01 \n\t" // a1*b0 = f1:f0
  147. "pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0
  148. "movdqa %%xmm4, %%xmm3 \n\t" // same
  149. "psrldq $8, %%xmm4 \n\t" // 0:e1+f1
  150. "pslldq $8, %%xmm3 \n\t" // e0+f0:0
  151. "pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1
  152. "pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0
  153. /*
  154. * Now shift the result one bit to the left,
  155. * taking advantage of [CLMUL-WP] eq 27 (p. 20)
  156. */
  157. "movdqa %%xmm1, %%xmm3 \n\t" // r1:r0
  158. "movdqa %%xmm2, %%xmm4 \n\t" // r3:r2
  159. "psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1
  160. "psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1
  161. "psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63
  162. "psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63
  163. "movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63
  164. "pslldq $8, %%xmm3 \n\t" // r0>>63:0
  165. "pslldq $8, %%xmm4 \n\t" // r2>>63:0
  166. "psrldq $8, %%xmm5 \n\t" // 0:r1>>63
  167. "por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1
  168. "por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1
  169. "por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63
  170. /*
  171. * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
  172. * using [CLMUL-WP] algorithm 5 (p. 20).
  173. * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
  174. */
  175. /* Step 2 (1) */
  176. "movdqa %%xmm1, %%xmm3 \n\t" // x1:x0
  177. "movdqa %%xmm1, %%xmm4 \n\t" // same
  178. "movdqa %%xmm1, %%xmm5 \n\t" // same
  179. "psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a
  180. "psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b
  181. "psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c
  182. /* Step 2 (2) */
  183. "pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b
  184. "pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c
  185. "pslldq $8, %%xmm3 \n\t" // a+b+c:0
  186. "pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0
  187. /* Steps 3 and 4 */
  188. "movdqa %%xmm1,%%xmm0 \n\t" // d:x0
  189. "movdqa %%xmm1,%%xmm4 \n\t" // same
  190. "movdqa %%xmm1,%%xmm5 \n\t" // same
  191. "psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0'
  192. "psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0'
  193. "psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0'
  194. "pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0'
  195. "pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0'
  196. // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing
  197. // bits carried from d. Now get those\t bits back in.
  198. "movdqa %%xmm1,%%xmm3 \n\t" // d:x0
  199. "movdqa %%xmm1,%%xmm4 \n\t" // same
  200. "movdqa %%xmm1,%%xmm5 \n\t" // same
  201. "psllq $63, %%xmm3 \n\t" // d<<63:stuff
  202. "psllq $62, %%xmm4 \n\t" // d<<62:stuff
  203. "psllq $57, %%xmm5 \n\t" // d<<57:stuff
  204. "pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff
  205. "pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff
  206. "psrldq $8, %%xmm3 \n\t" // 0:missing bits of d
  207. "pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0
  208. "pxor %%xmm1, %%xmm0 \n\t" // h1:h0
  209. "pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0
  210. "movdqu %%xmm0, (%2) \n\t" // done
  211. :
  212. : "r" (aa), "r" (bb), "r" (cc)
  213. : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5" );
  214. /* Now byte-reverse the outputs */
  215. for( i = 0; i < 16; i++ )
  216. c[i] = cc[15 - i];
  217. return;
  218. }
  219. /*
  220. * Compute decryption round keys from encryption round keys
  221. */
  222. void mbedtls_aesni_inverse_key( unsigned char *invkey,
  223. const unsigned char *fwdkey, int nr )
  224. {
  225. unsigned char *ik = invkey;
  226. const unsigned char *fk = fwdkey + 16 * nr;
  227. memcpy( ik, fk, 16 );
  228. for( fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16 )
  229. asm( "movdqu (%0), %%xmm0 \n\t"
  230. AESIMC xmm0_xmm0 "\n\t"
  231. "movdqu %%xmm0, (%1) \n\t"
  232. :
  233. : "r" (fk), "r" (ik)
  234. : "memory", "xmm0" );
  235. memcpy( ik, fk, 16 );
  236. }
  237. /*
  238. * Key expansion, 128-bit case
  239. */
  240. static void aesni_setkey_enc_128( unsigned char *rk,
  241. const unsigned char *key )
  242. {
  243. asm( "movdqu (%1), %%xmm0 \n\t" // copy the original key
  244. "movdqu %%xmm0, (%0) \n\t" // as round key 0
  245. "jmp 2f \n\t" // skip auxiliary routine
  246. /*
  247. * Finish generating the next round key.
  248. *
  249. * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
  250. * with X = rot( sub( r3 ) ) ^ RCON.
  251. *
  252. * On exit, xmm0 is r7:r6:r5:r4
  253. * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
  254. * and those are written to the round key buffer.
  255. */
  256. "1: \n\t"
  257. "pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X
  258. "pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4
  259. "pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0
  260. "pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4
  261. "pslldq $4, %%xmm0 \n\t" // etc
  262. "pxor %%xmm0, %%xmm1 \n\t"
  263. "pslldq $4, %%xmm0 \n\t"
  264. "pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time!
  265. "add $16, %0 \n\t" // point to next round key
  266. "movdqu %%xmm0, (%0) \n\t" // write it
  267. "ret \n\t"
  268. /* Main "loop" */
  269. "2: \n\t"
  270. AESKEYGENA xmm0_xmm1 ",0x01 \n\tcall 1b \n\t"
  271. AESKEYGENA xmm0_xmm1 ",0x02 \n\tcall 1b \n\t"
  272. AESKEYGENA xmm0_xmm1 ",0x04 \n\tcall 1b \n\t"
  273. AESKEYGENA xmm0_xmm1 ",0x08 \n\tcall 1b \n\t"
  274. AESKEYGENA xmm0_xmm1 ",0x10 \n\tcall 1b \n\t"
  275. AESKEYGENA xmm0_xmm1 ",0x20 \n\tcall 1b \n\t"
  276. AESKEYGENA xmm0_xmm1 ",0x40 \n\tcall 1b \n\t"
  277. AESKEYGENA xmm0_xmm1 ",0x80 \n\tcall 1b \n\t"
  278. AESKEYGENA xmm0_xmm1 ",0x1B \n\tcall 1b \n\t"
  279. AESKEYGENA xmm0_xmm1 ",0x36 \n\tcall 1b \n\t"
  280. :
  281. : "r" (rk), "r" (key)
  282. : "memory", "cc", "0" );
  283. }
  284. /*
  285. * Key expansion, 192-bit case
  286. */
  287. static void aesni_setkey_enc_192( unsigned char *rk,
  288. const unsigned char *key )
  289. {
  290. asm( "movdqu (%1), %%xmm0 \n\t" // copy original round key
  291. "movdqu %%xmm0, (%0) \n\t"
  292. "add $16, %0 \n\t"
  293. "movq 16(%1), %%xmm1 \n\t"
  294. "movq %%xmm1, (%0) \n\t"
  295. "add $8, %0 \n\t"
  296. "jmp 2f \n\t" // skip auxiliary routine
  297. /*
  298. * Finish generating the next 6 quarter-keys.
  299. *
  300. * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
  301. * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
  302. *
  303. * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
  304. * and those are written to the round key buffer.
  305. */
  306. "1: \n\t"
  307. "pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X
  308. "pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4
  309. "pslldq $4, %%xmm0 \n\t" // etc
  310. "pxor %%xmm0, %%xmm2 \n\t"
  311. "pslldq $4, %%xmm0 \n\t"
  312. "pxor %%xmm0, %%xmm2 \n\t"
  313. "pslldq $4, %%xmm0 \n\t"
  314. "pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6
  315. "movdqu %%xmm0, (%0) \n\t"
  316. "add $16, %0 \n\t"
  317. "pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9
  318. "pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10
  319. "pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0
  320. "pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10
  321. "movq %%xmm1, (%0) \n\t"
  322. "add $8, %0 \n\t"
  323. "ret \n\t"
  324. "2: \n\t"
  325. AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
  326. AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
  327. AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
  328. AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
  329. AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
  330. AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
  331. AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
  332. AESKEYGENA xmm1_xmm2 ",0x80 \n\tcall 1b \n\t"
  333. :
  334. : "r" (rk), "r" (key)
  335. : "memory", "cc", "0" );
  336. }
  337. /*
  338. * Key expansion, 256-bit case
  339. */
  340. static void aesni_setkey_enc_256( unsigned char *rk,
  341. const unsigned char *key )
  342. {
  343. asm( "movdqu (%1), %%xmm0 \n\t"
  344. "movdqu %%xmm0, (%0) \n\t"
  345. "add $16, %0 \n\t"
  346. "movdqu 16(%1), %%xmm1 \n\t"
  347. "movdqu %%xmm1, (%0) \n\t"
  348. "jmp 2f \n\t" // skip auxiliary routine
  349. /*
  350. * Finish generating the next two round keys.
  351. *
  352. * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
  353. * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
  354. *
  355. * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
  356. * and those have been written to the output buffer.
  357. */
  358. "1: \n\t"
  359. "pshufd $0xff, %%xmm2, %%xmm2 \n\t"
  360. "pxor %%xmm0, %%xmm2 \n\t"
  361. "pslldq $4, %%xmm0 \n\t"
  362. "pxor %%xmm0, %%xmm2 \n\t"
  363. "pslldq $4, %%xmm0 \n\t"
  364. "pxor %%xmm0, %%xmm2 \n\t"
  365. "pslldq $4, %%xmm0 \n\t"
  366. "pxor %%xmm2, %%xmm0 \n\t"
  367. "add $16, %0 \n\t"
  368. "movdqu %%xmm0, (%0) \n\t"
  369. /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
  370. * and proceed to generate next round key from there */
  371. AESKEYGENA xmm0_xmm2 ",0x00 \n\t"
  372. "pshufd $0xaa, %%xmm2, %%xmm2 \n\t"
  373. "pxor %%xmm1, %%xmm2 \n\t"
  374. "pslldq $4, %%xmm1 \n\t"
  375. "pxor %%xmm1, %%xmm2 \n\t"
  376. "pslldq $4, %%xmm1 \n\t"
  377. "pxor %%xmm1, %%xmm2 \n\t"
  378. "pslldq $4, %%xmm1 \n\t"
  379. "pxor %%xmm2, %%xmm1 \n\t"
  380. "add $16, %0 \n\t"
  381. "movdqu %%xmm1, (%0) \n\t"
  382. "ret \n\t"
  383. /*
  384. * Main "loop" - Generating one more key than necessary,
  385. * see definition of mbedtls_aes_context.buf
  386. */
  387. "2: \n\t"
  388. AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
  389. AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
  390. AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
  391. AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
  392. AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
  393. AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
  394. AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
  395. :
  396. : "r" (rk), "r" (key)
  397. : "memory", "cc", "0" );
  398. }
  399. /*
  400. * Key expansion, wrapper
  401. */
  402. int mbedtls_aesni_setkey_enc( unsigned char *rk,
  403. const unsigned char *key,
  404. size_t bits )
  405. {
  406. switch( bits )
  407. {
  408. case 128: aesni_setkey_enc_128( rk, key ); break;
  409. case 192: aesni_setkey_enc_192( rk, key ); break;
  410. case 256: aesni_setkey_enc_256( rk, key ); break;
  411. default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH );
  412. }
  413. return( 0 );
  414. }
  415. #endif /* MBEDTLS_HAVE_X86_64 */
  416. #endif /* MBEDTLS_AESNI_C */