mach3.c 20 KB

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  1. /*
  2. * $Source$
  3. * $State$
  4. */
  5. /* Integer registers */
  6. 0, GPR, 0, "r0",
  7. 0, GPR, 1, "r1",
  8. 0, GPR, 1, "sp",
  9. 0, GPR, 2, "r2",
  10. 0, GPR, 2, "fp",
  11. 0, GPR, 3, "r3",
  12. 0, GPR, 4, "r4",
  13. 0, GPR, 5, "r5",
  14. 0, GPR, 6, "r6",
  15. 0, GPR, 7, "r7",
  16. 0, GPR, 8, "r8",
  17. 0, GPR, 9, "r9",
  18. 0, GPR, 10, "r10",
  19. 0, GPR, 11, "r11",
  20. 0, GPR, 12, "r12",
  21. 0, GPR, 13, "r13",
  22. 0, GPR, 14, "r14",
  23. 0, GPR, 15, "r15",
  24. 0, GPR, 16, "r16",
  25. 0, GPR, 17, "r17",
  26. 0, GPR, 18, "r18",
  27. 0, GPR, 19, "r19",
  28. 0, GPR, 20, "r20",
  29. 0, GPR, 21, "r21",
  30. 0, GPR, 22, "r22",
  31. 0, GPR, 23, "r23",
  32. 0, GPR, 24, "r24",
  33. 0, GPR, 25, "r25",
  34. 0, GPR, 26, "r26",
  35. 0, GPR, 27, "r27",
  36. 0, GPR, 28, "r28",
  37. 0, GPR, 29, "r29",
  38. 0, GPR, 30, "r30",
  39. 0, GPR, 31, "r31",
  40. /* Floating-point registers */
  41. 0, FPR, 0, "f0",
  42. 0, FPR, 1, "f1",
  43. 0, FPR, 2, "f2",
  44. 0, FPR, 3, "f3",
  45. 0, FPR, 4, "f4",
  46. 0, FPR, 5, "f5",
  47. 0, FPR, 6, "f6",
  48. 0, FPR, 7, "f7",
  49. 0, FPR, 8, "f8",
  50. 0, FPR, 9, "f9",
  51. 0, FPR, 10, "f10",
  52. 0, FPR, 11, "f11",
  53. 0, FPR, 12, "f12",
  54. 0, FPR, 13, "f13",
  55. 0, FPR, 14, "f14",
  56. 0, FPR, 15, "f15",
  57. 0, FPR, 16, "f16",
  58. 0, FPR, 17, "f17",
  59. 0, FPR, 18, "f18",
  60. 0, FPR, 19, "f19",
  61. 0, FPR, 20, "f20",
  62. 0, FPR, 21, "f21",
  63. 0, FPR, 22, "f22",
  64. 0, FPR, 23, "f23",
  65. 0, FPR, 24, "f24",
  66. 0, FPR, 25, "f25",
  67. 0, FPR, 26, "f26",
  68. 0, FPR, 27, "f27",
  69. 0, FPR, 28, "f28",
  70. 0, FPR, 29, "f29",
  71. 0, FPR, 30, "f30",
  72. 0, FPR, 31, "f31",
  73. /* Special registers */
  74. 0, SPR, 32, "xer",
  75. 0, SPR, 256, "lr",
  76. 0, SPR, 288, "ctr",
  77. /* Condition registers */
  78. 0, CR, 0, "cr0",
  79. 0, CR, 1, "cr1",
  80. 0, CR, 2, "cr2",
  81. 0, CR, 3, "cr3",
  82. 0, CR, 4, "cr4",
  83. 0, CR, 5, "cr5",
  84. 0, CR, 6, "cr6",
  85. 0, CR, 7, "cr7",
  86. /* Condition code flag */
  87. 0, C, 0, ".",
  88. /* Special instructions */
  89. 0, OP_la, 0, "la",
  90. /* Branch processor instructions (page 20) */
  91. 0, OP_LIL, 18<<26 | 0<<1 | 0<<0, "b",
  92. 0, OP_LIA, 18<<26 | 1<<1 | 0<<0, "ba",
  93. 0, OP_LIL, 18<<26 | 0<<1 | 1<<0, "bl",
  94. 0, OP_LIA, 18<<26 | 1<<1 | 1<<0, "bla",
  95. 0, OP_BO_BI_BDL, 16<<26 | 0<<1 | 0<<0, "bc",
  96. 0, OP_BO_BI_BDA, 16<<26 | 1<<1 | 0<<0, "bca",
  97. 0, OP_BO_BI_BDL, 16<<26 | 0<<1 | 1<<0, "bcl",
  98. 0, OP_BO_BI_BDA, 16<<26 | 1<<1 | 1<<0, "bcla",
  99. 0, OP_BO_BI_BH, 19<<26 | 16<<1 | 0<<0, "bclr",
  100. 0, OP_BO_BI_BH, 19<<26 | 16<<1 | 1<<0, "bclrl",
  101. 0, OP_BO_BI_BH, 19<<26 | 528<<1 | 0<<0, "bcctr",
  102. 0, OP_BO_BI_BH, 19<<26 | 528<<1 | 1<<0, "bcctrl",
  103. 0, OP_LEV, 17<<26 | 1<<1, "sc",
  104. 0, OP_BT_BA_BB, 19<<26 | 257<<1, "crand",
  105. 0, OP_BT_BA_BB, 19<<26 | 449<<1, "cror",
  106. 0, OP_BT_BA_BB, 19<<26 | 193<<1, "crxor",
  107. 0, OP_BT_BA_BB, 19<<26 | 225<<1, "crnand",
  108. 0, OP_BT_BA_BB, 19<<26 | 33<<1, "crnor",
  109. 0, OP_BT_BA_BB, 19<<26 | 289<<1, "crneqv",
  110. 0, OP_BT_BA_BB, 19<<26 | 129<<1, "crandc",
  111. 0, OP_BT_BA_BB, 19<<26 | 417<<1, "crorc",
  112. 0, OP_BF_BFA, 19<<26 | 0<<1, "mcrf",
  113. /* Fixed point instructions (page 29) */
  114. 0, OP_RT_RA_D, 34<<26, "lbz",
  115. 0, OP_RT_RA_RB, 31<<26 | 87<<1, "lbzx",
  116. 0, OP_RT_RA_D, 35<<26, "lbzu",
  117. 0, OP_RT_RA_RB, 31<<26 | 119<<1, "lbzux",
  118. 0, OP_RT_RA_D, 40<<26, "lhz",
  119. 0, OP_RT_RA_RB, 31<<26 | 279<<1, "lhzx",
  120. 0, OP_RT_RA_D, 41<<26, "lhzu",
  121. 0, OP_RT_RA_RB, 31<<26 | 311<<1, "lhzux",
  122. 0, OP_RT_RA_D, 42<<26, "lha",
  123. 0, OP_RT_RA_RB, 31<<26 | 343<<1, "lhax",
  124. 0, OP_RT_RA_D, 43<<26, "lhau",
  125. 0, OP_RT_RA_RB, 31<<26 | 375<<1, "lhaux",
  126. 0, OP_RT_RA_D, 32<<26, "lwz",
  127. 0, OP_RT_RA_RB, 31<<26 | 23<<1, "lwzx",
  128. 0, OP_RT_RA_D, 33<<26, "lwzu",
  129. 0, OP_RT_RA_RB, 31<<26 | 55<<1, "lwzux",
  130. 0, OP_RT_RA_DS, 58<<26 | 2<<0, "lwa",
  131. 0, OP_RT_RA_RB, 31<<26 | 341<<1, "lwax",
  132. 0, OP_RT_RA_RB, 31<<26 | 363<<1, "lwaux",
  133. 0, OP_RT_RA_DS, 58<<26, "ld",
  134. 0, OP_RT_RA_RB, 31<<26 | 21<<1, "ldx",
  135. 0, OP_RT_RA_DS, 58<<26 | 1<<0, "ldu",
  136. 0, OP_RT_RA_RB, 31<<26 | 53<<1, "ldux",
  137. 0, OP_RS_RA_D, 38<<26, "stb",
  138. 0, OP_RS_RA_RB, 31<<26 | 215<<1, "stbx",
  139. 0, OP_RS_RA_D, 39<<26, "stbu",
  140. 0, OP_RS_RA_RB, 31<<26 | 247<<1, "stbux",
  141. 0, OP_RS_RA_D, 44<<26, "sth",
  142. 0, OP_RS_RA_RB, 31<<26 | 407<<1, "sthx",
  143. 0, OP_RS_RA_D, 45<<26, "sthu",
  144. 0, OP_RS_RA_RB, 31<<26 | 439<<1, "sthux",
  145. 0, OP_RS_RA_D, 36<<26, "stw",
  146. 0, OP_RS_RA_RB, 31<<26 | 151<<1, "stwx",
  147. 0, OP_RS_RA_D, 37<<26, "stwu",
  148. 0, OP_RS_RA_RB, 31<<26 | 183<<1, "stwux",
  149. 0, OP_RS_RA_DS, 62<<26, "std",
  150. 0, OP_RS_RA_RB, 31<<26 | 149<<1, "stdx",
  151. 0, OP_RS_RA_DS, 62<<26 | 1<<0, "stdu",
  152. 0, OP_RS_RA_RB, 31<<26 | 181<<1, "stdux",
  153. /* page 42 */
  154. 0, OP_RT_RA_RB, 31<<26 | 790<<1, "lhbrx",
  155. 0, OP_RT_RA_RB, 31<<26 | 534<<1, "lwbrx",
  156. 0, OP_RS_RA_RB, 31<<26 | 918<<1, "sthbrx",
  157. 0, OP_RS_RA_RB, 31<<26 | 662<<1, "stwbrx",
  158. /* page 44 */
  159. 0, OP_RT_RA_D, 46<<26, "lmw",
  160. 0, OP_RS_RA_D, 47<<26, "stmw",
  161. /* page 45 */
  162. 0, OP_RT_RA_NB, 31<<26 | 597<<1, "lswi",
  163. 0, OP_RT_RA_RB, 31<<26 | 533<<1, "lswx",
  164. 0, OP_RS_RA_NB, 31<<26 | 725<<1, "stswi",
  165. 0, OP_RS_RA_RB, 31<<26 | 661<<1, "stswx",
  166. /* page 49 */
  167. 0, OP_RT_RA_SI, 14<<26, "addi",
  168. 0, OP_RT_RA_SI, 15<<26, "addis",
  169. 0, OP_RT_RA_RB_C, 31<<26 | 0<<10 | 266<<1, "add",
  170. 0, OP_RT_RA_RB_C, 31<<26 | 1<<10 | 266<<1, "addo",
  171. 0, OP_RT_RA_RB_C, 31<<26 | 0<<10 | 40<<1, "subf",
  172. 0, OP_RT_RA_RB_C, 31<<26 | 1<<10 | 40<<1, "subfo",
  173. 0, OP_RT_RA_SI_addic, 12<<26, "addic", /* special case C */
  174. 0, OP_RT_RA_SI, 8<<26, "subfic",
  175. 0, OP_RT_RA_RB_C, 31<<26 | 0<<10 | 138<<1, "adde",
  176. 0, OP_RT_RA_RB_C, 31<<26 | 1<<10 | 138<<1, "addeo",
  177. 0, OP_RT_RA_RB_C, 31<<26 | 0<<10 | 136<<1, "subfe",
  178. 0, OP_RT_RA_RB_C, 31<<26 | 1<<10 | 136<<1, "subfeo",
  179. 0, OP_RT_RA_C, 31<<26 | 0<<10 | 234<<1, "addme",
  180. 0, OP_RT_RA_C, 31<<26 | 1<<10 | 234<<1, "addmeo",
  181. 0, OP_RT_RA_C, 31<<26 | 0<<10 | 232<<1, "subfme",
  182. 0, OP_RT_RA_C, 31<<26 | 1<<10 | 232<<1, "subfmeo",
  183. 0, OP_RT_RA_C, 31<<26 | 0<<10 | 202<<1, "addze",
  184. 0, OP_RT_RA_C, 31<<26 | 1<<10 | 202<<1, "addzeo",
  185. 0, OP_RT_RA_C, 31<<26 | 0<<10 | 200<<1, "subfze",
  186. 0, OP_RT_RA_C, 31<<26 | 1<<10 | 200<<1, "subfzeo",
  187. 0, OP_RT_RA_C, 31<<26 | 0<<10 | 104<<1, "neg",
  188. 0, OP_RT_RA_C, 31<<26 | 1<<10 | 104<<1, "nego",
  189. /* page 54 */
  190. 0, OP_RT_RA_SI, 7<<26, "mulli",
  191. 0, OP_RT_RA_RB_C, 31<<26 | 0<<10 | 233<<1, "mulld",
  192. 0, OP_RT_RA_RB_C, 31<<26 | 1<<10 | 233<<1, "mulldo",
  193. 0, OP_RT_RA_RB_C, 31<<26 | 0<<10 | 235<<1, "mullw",
  194. 0, OP_RT_RA_RB_C, 31<<26 | 1<<10 | 235<<1, "mullwo",
  195. 0, OP_RT_RA_RB_C, 31<<26 | 73<<1, "mulhd",
  196. 0, OP_RT_RA_RB_C, 31<<26 | 75<<1, "mulhw",
  197. 0, OP_RT_RA_RB_C, 31<<26 | 9<<1, "mulhdu",
  198. 0, OP_RT_RA_RB_C, 31<<26 | 11<<1, "mulhwu",
  199. /* page 56 */
  200. 0, OP_RT_RA_RB_C, 31<<26 | 0<<10 | 489<<1, "divd",
  201. 0, OP_RT_RA_RB_C, 31<<26 | 1<<10 | 489<<1, "divdo",
  202. 0, OP_RT_RA_RB_C, 31<<26 | 0<<10 | 491<<1, "divw",
  203. 0, OP_RT_RA_RB_C, 31<<26 | 1<<10 | 491<<1, "divwo",
  204. 0, OP_RT_RA_RB_C, 31<<26 | 0<<10 | 457<<1, "divdu",
  205. 0, OP_RT_RA_RB_C, 31<<26 | 1<<10 | 457<<1, "divduo",
  206. 0, OP_RT_RA_RB_C, 31<<26 | 0<<10 | 459<<1, "divwu",
  207. 0, OP_RT_RA_RB_C, 31<<26 | 1<<10 | 459<<1, "divwuo",
  208. /* page 58 */
  209. 0, OP_BF_L_RA_SI, 11<<26, "cmpi",
  210. 0, OP_BF_L_RA_RB, 31<<26 | 0<<1, "cmp",
  211. 0, OP_BF_L_RA_UI, 10<<26, "cmpli",
  212. 0, OP_BF_L_RA_RB, 31<<26 | 32<<1, "cmpl",
  213. /* page 60 */
  214. 0, OP_TO_RA_SI, 2<<26, "tdi",
  215. 0, OP_TO_RA_SI, 3<<26, "twi",
  216. 0, OP_TO_RA_RB, 31<<26 | 68<<1, "td",
  217. 0, OP_TO_RA_RB, 31<<26 | 4<<1, "tw",
  218. /* page 62 */
  219. 0, OP_RS_RA_UI_CC, 28<<26, "andi", /* C compulsory */
  220. 0, OP_RS_RA_UI_CC, 29<<26, "andis", /* C compulsory */
  221. 0, OP_RS_RA_UI, 24<<26, "ori",
  222. 0, OP_RS_RA_UI, 25<<26, "oris",
  223. 0, OP_RS_RA_UI, 26<<26, "xori",
  224. 0, OP_RS_RA_UI, 27<<26, "xoris",
  225. 0, OP_RS_RA_RB_C, 31<<26 | 28<<1, "and",
  226. 0, OP_RS_RA_RB_C, 31<<26 | 444<<1, "or",
  227. 0, OP_RS_RA_RB_C, 31<<26 | 316<<1, "xor",
  228. 0, OP_RS_RA_RB_C, 31<<26 | 476<<1, "nand",
  229. 0, OP_RS_RA_RB_C, 31<<26 | 124<<1, "nor",
  230. 0, OP_RS_RA_RB_C, 31<<26 | 284<<1, "eqv",
  231. 0, OP_RS_RA_RB_C, 31<<26 | 60<<1, "andc",
  232. 0, OP_RS_RA_RB_C, 31<<26 | 412<<1, "orc",
  233. 0, OP_RS_RA_C, 31<<26 | 954<<1, "extsb",
  234. 0, OP_RS_RA_C, 31<<26 | 922<<1, "extsh",
  235. 0, OP_RS_RA_C, 31<<26 | 986<<1, "extsw",
  236. 0, OP_RS_RA_C, 31<<26 | 58<<1, "cntlzd",
  237. 0, OP_RS_RA_C, 31<<26 | 26<<1, "cntlzw",
  238. /* page 69 */
  239. 0, OP_RS_RA_SH_MB6_SH_C, 30<<26 | 0<<2, "rldicl",
  240. 0, OP_RS_RA_SH_ME6_SH_C, 30<<26 | 1<<2, "rldicr",
  241. 0, OP_RS_RA_SH_MB6_SH_C, 30<<26 | 2<<2, "rldic",
  242. 0, OP_RS_RA_SH_MB5_ME5_C, 21<<26, "rlwinm",
  243. 0, OP_RS_RA_RB_MB6_C, 30<<26 | 8<<1, "rldcl",
  244. 0, OP_RS_RA_RB_ME6_C, 30<<26 | 9<<1, "rldcr",
  245. 0, OP_RS_RA_RB_MB5_ME5_C, 23<<26, "rlwnm",
  246. 0, OP_RS_RA_SH_MB6_SH_C, 30<<26 | 3<<2, "rldimi",
  247. 0, OP_RS_RA_SH_MB5_ME5_C, 20<<26, "rlwimi",
  248. /* page 74 */
  249. 0, OP_RS_RA_RB_C, 31<<26 | 27<<1, "sld",
  250. 0, OP_RS_RA_RB_C, 31<<26 | 24<<1, "slw",
  251. 0, OP_RS_RA_RB_C, 31<<26 | 539<<1, "srd",
  252. 0, OP_RS_RA_RB_C, 31<<26 | 536<<1, "srw",
  253. 0, OP_RS_RA_SH6_C, 31<<26 | 413<<2, "sradi",
  254. 0, OP_RS_RA_SH5_C, 31<<26 | 824<<1, "srawi",
  255. 0, OP_RS_RA_RB_C, 31<<26 | 794<<1, "srad",
  256. 0, OP_RS_RA_RB_C, 31<<26 | 792<<1, "sraw",
  257. /* page 78 */
  258. 0, OP_RS_SPR, 31<<26 | 467<<1, "mtspr",
  259. 0, OP_RT_SPR, 31<<26 | 339<<1, "mfspr",
  260. 0, OP_RS_FXM, 31<<26 | 0<<21 | 144<<1, "mtcrf",
  261. 0, OP_RT, 31<<26 | 0<<21 | 19<<1, "mfcr",
  262. /* Floating point instructions (page 83) */
  263. 0, OP_FRT_RA_D, 48<<26, "lfs",
  264. 0, OP_FRT_RA_RB, 31<<26 | 535<<1, "lfsx",
  265. 0, OP_FRT_RA_D, 49<<26, "lfsu",
  266. 0, OP_FRT_RA_RB, 31<<26 | 567<<1, "lfsux",
  267. 0, OP_FRT_RA_D, 50<<26, "lfd",
  268. 0, OP_FRT_RA_RB, 31<<26 | 599<<1, "lfdx",
  269. 0, OP_FRT_RA_D, 51<<26, "lfdu",
  270. 0, OP_FRT_RA_RB, 31<<26 | 631<<1, "lfdux",
  271. 0, OP_FRS_RA_D, 52<<26, "stfs",
  272. 0, OP_FRS_RA_RB, 31<<26 | 663<<1, "stfsx",
  273. 0, OP_FRS_RA_D, 53<<26, "stfsu",
  274. 0, OP_FRS_RA_RB, 31<<26 | 695<<1, "stfsux",
  275. 0, OP_FRS_RA_D, 54<<26, "stfd",
  276. 0, OP_FRS_RA_RB, 31<<26 | 727<<1, "stfdx",
  277. 0, OP_FRS_RA_D, 55<<26, "stfdu",
  278. 0, OP_FRS_RA_RB, 31<<26 | 759<<1, "stfdux",
  279. 0, OP_FRS_RA_RB, 31<<26 | 983<<1, "stfiwx",
  280. 0, OP_FRT_FRB_C, 63<<26 | 72<<1, "fmr",
  281. 0, OP_FRT_FRB_C, 63<<26 | 40<<1, "fneg",
  282. 0, OP_FRT_FRB_C, 63<<26 | 264<<1, "fabs",
  283. 0, OP_FRT_FRB_C, 63<<26 | 136<<1, "fnabs",
  284. 0, OP_FRT_FRA_FRB_C, 63<<26 | 21<<1, "fadd",
  285. 0, OP_FRT_FRA_FRB_C, 59<<26 | 21<<1, "fadds",
  286. 0, OP_FRT_FRA_FRB_C, 63<<26 | 20<<1, "fsub",
  287. 0, OP_FRT_FRA_FRB_C, 59<<26 | 20<<1, "fsubs",
  288. 0, OP_FRT_FRA_FRC_C, 63<<26 | 25<<1, "fmul",
  289. 0, OP_FRT_FRA_FRC_C, 59<<26 | 25<<1, "fmuls",
  290. 0, OP_FRT_FRA_FRB_C, 63<<26 | 18<<1, "fdiv",
  291. 0, OP_FRT_FRA_FRB_C, 59<<26 | 18<<1, "fdivs",
  292. 0, OP_FRT_FRA_FRC_FRB_C, 63<<26 | 29<<1, "fmadd",
  293. 0, OP_FRT_FRA_FRC_FRB_C, 59<<26 | 29<<1, "fmadds",
  294. 0, OP_FRT_FRA_FRC_FRB_C, 63<<26 | 28<<1, "fmsub",
  295. 0, OP_FRT_FRA_FRC_FRB_C, 59<<26 | 28<<1, "fmsubs",
  296. 0, OP_FRT_FRA_FRC_FRB_C, 63<<26 | 31<<1, "fnmadd",
  297. 0, OP_FRT_FRA_FRC_FRB_C, 59<<26 | 31<<1, "fnmadds",
  298. 0, OP_FRT_FRA_FRC_FRB_C, 63<<26 | 30<<1, "fnmsub",
  299. 0, OP_FRT_FRA_FRC_FRB_C, 59<<26 | 30<<1, "fnmsubs",
  300. 0, OP_FRT_FRB_C, 63<<26 | 12<<1, "frsp",
  301. 0, OP_FRT_FRB_C, 63<<26 | 814<<1, "fctid",
  302. 0, OP_FRT_FRB_C, 63<<26 | 815<<1, "fctidz",
  303. 0, OP_FRT_FRB_C, 63<<26 | 14<<1, "fctiw",
  304. 0, OP_FRT_FRB_C, 63<<26 | 15<<1, "fctiwz",
  305. 0, OP_FRT_FRB_C, 63<<26 | 846<<1, "fcfid",
  306. 0, OP_BF_FRA_FRB, 63<<26 | 0<<1, "fcmpu",
  307. 0, OP_BF_FRA_FRB, 63<<26 | 32<<1, "fcmpo",
  308. 0, OP_FRT_C, 63<<26 | 583<<1, "mffs",
  309. 0, OP_BF_BFA, 63<<26 | 64<<1, "mcrfs",
  310. 0, OP_BF_U_C, 63<<26 | 134<<1, "mtfsfi",
  311. 0, OP_FLM_FRB_C, 63<<26 | 711<<1, "mtfsf",
  312. 0, OP_BT_C, 63<<26 | 70<<1, "mtfsb0",
  313. 0, OP_BT_C, 63<<26 | 38<<1, "mtfsb1",
  314. 0, OP_FRT_FRB_C, 63<<26 | 22<<1, "fsqrt",
  315. 0, OP_FRT_FRB_C, 59<<26 | 22<<1, "fsqrts",
  316. 0, OP_FRT_FRB_C, 59<<26 | 24<<1, "fres",
  317. 0, OP_FRT_FRB_C, 63<<26 | 26<<1, "frsqrte",
  318. 0, OP_FRT_FRA_FRC_FRB_C, 63<<26 | 23<<1, "fsel",
  319. /* page 98 */